llvm.org GIT mirror llvm / ca3cd41
Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156608 91177308-0d34-0410-b5e6-96231b3b80d8 Silviu Baranga 8 years ago
3 changed file(s) with 12 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
913913 // Immediate offset in range [-255, 255].
914914 if (!Memory.OffsetImm) return true;
915915 int64_t Val = Memory.OffsetImm->getValue();
916 return Val > -256 && Val < 256;
916 // The #-0 offset is encoded as INT32_MIN, and we have to check
917 // for this too.
918 return (Val > -256 && Val < 256) || Val == INT32_MIN;
917919 }
918920 bool isAM3Offset() const {
919921 if (Kind != k_Immediate && Kind != k_PostIndexRegister)
425425 return;
426426 }
427427
428 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
428 //If the op is sub we have to print the immediate even if it is 0
429 unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm());
430 ARM_AM::AddrOpc op = ARM_AM::getAM3Op(MO3.getImm());
431
432 if (ImmOffs || (op == ARM_AM::sub))
429433 O << ", #"
430 << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO3.getImm()))
434 << ARM_AM::getAddrOpcStr(op)
431435 << ImmOffs;
432436 O << ']';
433437 }
7373 @ CHECK: cpsie none, #0 @ encoding: [0x00,0x00,0x0a,0xf1]
7474 cpsie none, #0
7575
76 @ CHECK: strh r3, [r2, #-0] @ encoding: [0xb0,0x30,0x42,0xe1]
77 strh r3, [r2, #-0]
78