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Accept 'inreg' attribute on x86 functions as meaning sse_regparm (i.e. float/double values go in XMM0 instead of ST0). Update documentation to reflect reality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56619 91177308-0d34-0410-b5e6-96231b3b80d8 Dale Johannesen 12 years ago
5 changed file(s) with 41 addition(s) and 11 deletion(s). Raw diff Collapse all Expand all
844844 a call to this function.
845845
846846
inreg
847
This indicates that the parameter should be placed in register (if
848 possible) during assembling function call. Support for this attribute is
849 target-specific
847
This indicates that this parameter or return value should be treated
848 in a special target-dependent fashion during while emitting code for a
849 function call or return (usually, by putting it in a register as opposed
850 to memory; in some places it is used to distinguish between two different
851 kinds of registers). Use of this attribute is target-specific
850852
851853
byval
852854
This indicates that the pointer parameter should really be passed by
479479
480480 // RET - Return from function. The first operand is the chain,
481481 // and any subsequent operands are pairs of return value and return value
482 // signness for the function. This operation can have variable number of
483 // operands.
482 // attributes (see CALL for description of attributes) for the function.
483 // This operation can have variable number of operands.
484484 RET,
485485
486486 // INLINEASM - Represents an inline asm block. This node always has two
912912 MVT VT = ValueVTs[j];
913913
914914 // FIXME: C calling convention requires the return type to be promoted to
915 // at least 32-bit. But this is not necessary for non-C calling conventions.
915 // at least 32-bit. But this is not necessary for non-C calling
916 // conventions.
916917 if (VT.isInteger()) {
917918 MVT MinVT = TLI.getRegisterType(MVT::i32);
918919 if (VT.bitsLT(MinVT))
933934 getCopyToParts(DAG, SDValue(RetOp.getNode(), RetOp.getResNo() + j),
934935 &Parts[0], NumParts, PartVT, ExtendKind);
935936
937 // 'inreg' on function refers to return value
938 ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
939 if (F->paramHasAttr(0, ParamAttr::InReg))
940 Flags.setInReg();
936941 for (unsigned i = 0; i < NumParts; ++i) {
937942 NewValues.push_back(Parts[i]);
938 NewValues.push_back(DAG.getArgFlags(ISD::ArgFlagsTy()));
943 NewValues.push_back(DAG.getArgFlags(Flags));
939944 }
940945 }
941946 }
4242
4343 // X86-32 C return-value convention.
4444 def RetCC_X86_32_C : CallingConv<[
45 // The X86-32 calling convention returns FP values in ST0, otherwise it is the
46 // same as the common X86 calling conv.
47 CCIfType<[f32], CCAssignToReg<[ST0, ST1]>>,
48 CCIfType<[f64], CCAssignToReg<[ST0, ST1]>>,
45 // The X86-32 calling convention returns FP values in ST0, unless marked
46 // with "inreg" (used here to distinguish one kind of reg from another,
47 // weirdly; this is really the sse-regparm calling convention) in which
48 // case they use XMM0, otherwise it is the same as the common X86 calling
49 // conv.
50 CCIfInReg
51 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
52 CCIfType<[f32,f64], CCAssignToReg<[ST0, ST1]>>,
4953 CCDelegateTo
5054 ]>;
5155
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movs | count 2
1 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep fld | count 2
2 ; check 'inreg' attribute for sse_regparm
3
4 define double @foo1() inreg nounwind {
5 ret double 1.0
6 }
7
8 define float @foo2() inreg nounwind {
9 ret float 1.0
10 }
11
12 define double @bar() nounwind {
13 ret double 1.0
14 }
15
16 define float @bar2() nounwind {
17 ret float 1.0
18 }