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AMDGPU/GlobalISel: Mark 1-bit integer constants as legal Summary: These are mostly legal, but will probably need special lowering for some cases. Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D33791 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304628 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 2 years ago
2 changed file(s) with 14 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
2727 AMDGPULegalizerInfo::AMDGPULegalizerInfo() {
2828 using namespace TargetOpcode;
2929
30 const LLT S1= LLT::scalar(1);
3031 const LLT S32 = LLT::scalar(32);
3132 const LLT S64 = LLT::scalar(64);
3233 const LLT P1 = LLT::pointer(1, 64);
3334 const LLT P2 = LLT::pointer(2, 64);
3435
36 // FIXME: i1 operands to intrinsics should always be legal, but other i1
37 // values may not be legal. We need to figure out how to distinguish
38 // between these two scenarios.
39 setAction({G_CONSTANT, S1}, Legal);
3540 setAction({G_CONSTANT, S32}, Legal);
3641 setAction({G_CONSTANT, S64}, Legal);
3742
99 entry:
1010 ret void
1111 }
12
13 declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
14
15 attributes #1 = { nounwind }
16
1217 ...
1318
1419 ---
1520 name: test_constant
1621 registers:
1722 - { id: 0, class: _ }
23 - { id: 1, class: _ }
1824 body: |
1925 bb.0.entry:
2026 ; CHECK-LABEL: name: test_constant
2127 ; CHECK: %0(s32) = G_CONSTANT i32 5
28 ; CHECK: %1(s1) = G_CONSTANT i1 false
2229
2330 %0(s32) = G_CONSTANT i32 5
31 %1(s1) = G_CONSTANT i1 0
32 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp.f32), %0, %0, %0, %0, %0, %0, %1, %1;
2433 ...
2534
2635 ---