llvm.org GIT mirror llvm / c978c0f
[ARM][GlobalISel] Legalize narrow scalar ops by widening This is the same as r292827 for AArch64: we widen 8- and 16-bit ADD, SUB and MUL to 32 bits since we only have TableGen patterns for 32 bits. See the commit message for r292827 for more details. At this point we could just remove some of the tests for regbankselect and instruction-select, since we're not going to see any narrow operations at those levels anymore. Instead I decided to update them with G_ANYEXT/G_TRUNC operations, so we can validate the full sequences generated by the legalizer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302782 91177308-0d34-0410-b5e6-96231b3b80d8 Diana Picus 3 years ago
4 changed file(s) with 259 addition(s) and 98 deletion(s). Raw diff Collapse all Expand all
4444 setAction({Op, 1, p0}, Legal);
4545 }
4646
47 for (unsigned Op : {G_ADD, G_SUB, G_MUL})
48 for (auto Ty : {s1, s8, s16, s32})
49 setAction({Op, Ty}, Legal);
47 for (unsigned Op : {G_ADD, G_SUB, G_MUL}) {
48 for (auto Ty : {s1, s8, s16})
49 setAction({Op, Ty}, WidenScalar);
50 setAction({Op, s32}, Legal);
51 }
5052
5153 for (unsigned Op : {G_SDIV, G_UDIV}) {
5254 for (auto Ty : {s8, s16})
240240 - { id: 0, class: gprb }
241241 - { id: 1, class: gprb }
242242 - { id: 2, class: gprb }
243 - { id: 3, class: gprb }
244 - { id: 4, class: gprb }
245 - { id: 5, class: gprb }
243246 # CHECK-DAG: id: 0, class: gpr
244247 # CHECK-DAG: id: 1, class: gpr
245248 # CHECK-DAG: id: 2, class: gpr
249 # CHECK-DAG: id: 3, class: gpr
250 # CHECK-DAG: id: 4, class: gpr
251 # CHECK-DAG: id: 5, class: gpr
246252 body: |
247253 bb.0:
248254 liveins: %r0, %r1
253259 %1(s8) = COPY %r1
254260 ; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
255261
256 %2(s8) = G_ADD %0, %1
257 ; CHECK: [[VREGSUM:%[0-9]+]] = ADDrr [[VREGX]], [[VREGY]], 14, _, _
258
259 %r0 = COPY %2(s8)
260 ; CHECK: %r0 = COPY [[VREGSUM]]
262 %2(s32) = G_ANYEXT %0(s8)
263 ; CHECK: [[VREGXEXT:%[0-9]+]] = COPY [[VREGX]]
264
265 %3(s32) = G_ANYEXT %1(s8)
266 ; CHECK: [[VREGYEXT:%[0-9]+]] = COPY [[VREGY]]
267
268 %4(s32) = G_ADD %2, %3
269 ; CHECK: [[VREGSUM:%[0-9]+]] = ADDrr [[VREGXEXT]], [[VREGYEXT]], 14, _, _
270
271 %5(s8) = G_TRUNC %4(s32)
272 ; CHECK: [[VREGSUMTR:%[0-9]+]] = COPY [[VREGSUM]]
273
274 %r0 = COPY %5(s8)
275 ; CHECK: %r0 = COPY [[VREGSUMTR]]
261276
262277 BX_RET 14, _, implicit %r0
263278 ; CHECK: BX_RET 14, _, implicit %r0
273288 - { id: 0, class: gprb }
274289 - { id: 1, class: gprb }
275290 - { id: 2, class: gprb }
291 - { id: 3, class: gprb }
292 - { id: 4, class: gprb }
293 - { id: 5, class: gprb }
276294 # CHECK-DAG: id: 0, class: gpr
277295 # CHECK-DAG: id: 1, class: gpr
278296 # CHECK-DAG: id: 2, class: gpr
297 # CHECK-DAG: id: 3, class: gpr
298 # CHECK-DAG: id: 4, class: gpr
299 # CHECK-DAG: id: 5, class: gpr
279300 body: |
280301 bb.0:
281302 liveins: %r0, %r1
286307 %1(s16) = COPY %r1
287308 ; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
288309
289 %2(s16) = G_ADD %0, %1
290 ; CHECK: [[VREGSUM:%[0-9]+]] = ADDrr [[VREGX]], [[VREGY]], 14, _, _
291
292 %r0 = COPY %2(s16)
293 ; CHECK: %r0 = COPY [[VREGSUM]]
310 %2(s32) = G_ANYEXT %0(s16)
311 ; CHECK: [[VREGXEXT:%[0-9]+]] = COPY [[VREGX]]
312
313 %3(s32) = G_ANYEXT %1(s16)
314 ; CHECK: [[VREGYEXT:%[0-9]+]] = COPY [[VREGY]]
315
316 %4(s32) = G_ADD %2, %3
317 ; CHECK: [[VREGSUM:%[0-9]+]] = ADDrr [[VREGXEXT]], [[VREGYEXT]], 14, _, _
318
319 %5(s16) = G_TRUNC %4(s32)
320 ; CHECK: [[VREGSUMTR:%[0-9]+]] = COPY [[VREGSUM]]
321
322 %r0 = COPY %5(s16)
323 ; CHECK: %r0 = COPY [[VREGSUMTR]]
294324
295325 BX_RET 14, _, implicit %r0
296326 ; CHECK: BX_RET 14, _, implicit %r0
405435 - { id: 0, class: gprb }
406436 - { id: 1, class: gprb }
407437 - { id: 2, class: gprb }
438 - { id: 3, class: gprb }
439 - { id: 4, class: gprb }
440 - { id: 5, class: gprb }
408441 # CHECK-DAG: id: 0, class: gpr
409442 # CHECK-DAG: id: 1, class: gpr
410443 # CHECK-DAG: id: 2, class: gpr
444 # CHECK-DAG: id: 3, class: gpr
445 # CHECK-DAG: id: 4, class: gpr
446 # CHECK-DAG: id: 5, class: gpr
411447 body: |
412448 bb.0:
413449 liveins: %r0, %r1
418454 %1(s8) = COPY %r1
419455 ; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
420456
421 %2(s8) = G_SUB %0, %1
422 ; CHECK: [[VREGRES:%[0-9]+]] = SUBrr [[VREGX]], [[VREGY]], 14, _, _
423
424 %r0 = COPY %2(s8)
425 ; CHECK: %r0 = COPY [[VREGRES]]
457 %2(s32) = G_ANYEXT %0(s8)
458 ; CHECK: [[VREGXEXT:%[0-9]+]] = COPY [[VREGX]]
459
460 %3(s32) = G_ANYEXT %1(s8)
461 ; CHECK: [[VREGYEXT:%[0-9]+]] = COPY [[VREGY]]
462
463 %4(s32) = G_SUB %2, %3
464 ; CHECK: [[VREGRES:%[0-9]+]] = SUBrr [[VREGXEXT]], [[VREGYEXT]], 14, _, _
465
466 %5(s8) = G_TRUNC %4(s32)
467 ; CHECK: [[VREGRESTR:%[0-9]+]] = COPY [[VREGRES]]
468
469 %r0 = COPY %5(s8)
470 ; CHECK: %r0 = COPY [[VREGRESTR]]
426471
427472 BX_RET 14, _, implicit %r0
428473 ; CHECK: BX_RET 14, _, implicit %r0
438483 - { id: 0, class: gprb }
439484 - { id: 1, class: gprb }
440485 - { id: 2, class: gprb }
486 - { id: 3, class: gprb }
487 - { id: 4, class: gprb }
488 - { id: 5, class: gprb }
441489 # CHECK-DAG: id: 0, class: gpr
442490 # CHECK-DAG: id: 1, class: gpr
443491 # CHECK-DAG: id: 2, class: gpr
492 # CHECK-DAG: id: 3, class: gpr
493 # CHECK-DAG: id: 4, class: gpr
494 # CHECK-DAG: id: 5, class: gpr
444495 body: |
445496 bb.0:
446497 liveins: %r0, %r1
451502 %1(s16) = COPY %r1
452503 ; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
453504
454 %2(s16) = G_SUB %0, %1
455 ; CHECK: [[VREGRES:%[0-9]+]] = SUBrr [[VREGX]], [[VREGY]], 14, _, _
456
457 %r0 = COPY %2(s16)
458 ; CHECK: %r0 = COPY [[VREGRES]]
505 %2(s32) = G_ANYEXT %0(s16)
506 ; CHECK: [[VREGXEXT:%[0-9]+]] = COPY [[VREGX]]
507
508 %3(s32) = G_ANYEXT %1(s16)
509 ; CHECK: [[VREGYEXT:%[0-9]+]] = COPY [[VREGY]]
510
511 %4(s32) = G_SUB %2, %3
512 ; CHECK: [[VREGRES:%[0-9]+]] = SUBrr [[VREGXEXT]], [[VREGYEXT]], 14, _, _
513
514 %5(s16) = G_TRUNC %4(s32)
515 ; CHECK: [[VREGRESTR:%[0-9]+]] = COPY [[VREGRES]]
516
517 %r0 = COPY %5(s16)
518 ; CHECK: %r0 = COPY [[VREGRESTR]]
459519
460520 BX_RET 14, _, implicit %r0
461521 ; CHECK: BX_RET 14, _, implicit %r0
504564 - { id: 0, class: gprb }
505565 - { id: 1, class: gprb }
506566 - { id: 2, class: gprb }
507 # CHECK-DAG: id: 0, class: gprnopc
508 # CHECK-DAG: id: 1, class: gprnopc
567 - { id: 3, class: gprb }
568 - { id: 4, class: gprb }
569 - { id: 5, class: gprb }
570 # CHECK-DAG: id: 0, class: gpr
571 # CHECK-DAG: id: 1, class: gpr
509572 # CHECK-DAG: id: 2, class: gprnopc
573 # CHECK-DAG: id: 3, class: gprnopc
574 # CHECK-DAG: id: 4, class: gprnopc
575 # CHECK-DAG: id: 5, class: gpr
510576 body: |
511577 bb.0:
512578 liveins: %r0, %r1
517583 %1(s8) = COPY %r1
518584 ; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
519585
520 %2(s8) = G_MUL %0, %1
521 ; CHECK: [[VREGRES:%[0-9]+]] = MUL [[VREGX]], [[VREGY]], 14, _, _
522
523 %r0 = COPY %2(s8)
524 ; CHECK: %r0 = COPY [[VREGRES]]
586 %2(s32) = G_ANYEXT %0(s8)
587 ; CHECK: [[VREGXEXT:%[0-9]+]] = COPY [[VREGX]]
588
589 %3(s32) = G_ANYEXT %1(s8)
590 ; CHECK: [[VREGYEXT:%[0-9]+]] = COPY [[VREGY]]
591
592 %4(s32) = G_MUL %2, %3
593 ; CHECK: [[VREGRES:%[0-9]+]] = MUL [[VREGXEXT]], [[VREGYEXT]], 14, _, _
594
595 %5(s8) = G_TRUNC %4(s32)
596 ; CHECK: [[VREGRESTR:%[0-9]+]] = COPY [[VREGRES]]
597
598 %r0 = COPY %5(s8)
599 ; CHECK: %r0 = COPY [[VREGRESTR]]
525600
526601 BX_RET 14, _, implicit %r0
527602 ; CHECK: BX_RET 14, _, implicit %r0
537612 - { id: 0, class: gprb }
538613 - { id: 1, class: gprb }
539614 - { id: 2, class: gprb }
540 # CHECK-DAG: id: 0, class: gprnopc
541 # CHECK-DAG: id: 1, class: gprnopc
615 - { id: 3, class: gprb }
616 - { id: 4, class: gprb }
617 - { id: 5, class: gprb }
618 # CHECK-DAG: id: 0, class: gpr
619 # CHECK-DAG: id: 1, class: gpr
542620 # CHECK-DAG: id: 2, class: gprnopc
621 # CHECK-DAG: id: 3, class: gprnopc
622 # CHECK-DAG: id: 4, class: gprnopc
623 # CHECK-DAG: id: 5, class: gpr
543624 body: |
544625 bb.0:
545626 liveins: %r0, %r1
550631 %1(s16) = COPY %r1
551632 ; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
552633
553 %2(s16) = G_MUL %0, %1
554 ; CHECK: [[VREGRES:%[0-9]+]] = MUL [[VREGX]], [[VREGY]], 14, _, _
555
556 %r0 = COPY %2(s16)
557 ; CHECK: %r0 = COPY [[VREGRES]]
634 %2(s32) = G_ANYEXT %0(s16)
635 ; CHECK: [[VREGXEXT:%[0-9]+]] = COPY [[VREGX]]
636
637 %3(s32) = G_ANYEXT %1(s16)
638 ; CHECK: [[VREGYEXT:%[0-9]+]] = COPY [[VREGY]]
639
640 %4(s32) = G_MUL %2, %3
641 ; CHECK: [[VREGRES:%[0-9]+]] = MUL [[VREGXEXT]], [[VREGYEXT]], 14, _, _
642
643 %5(s16) = G_TRUNC %4(s32)
644 ; CHECK: [[VREGRESTR:%[0-9]+]] = COPY [[VREGRES]]
645
646 %r0 = COPY %5(s16)
647 ; CHECK: %r0 = COPY [[VREGRESTR]]
558648
559649 BX_RET 14, _, implicit %r0
560650 ; CHECK: BX_RET 14, _, implicit %r0
9090 %0(s8) = COPY %r0
9191 %1(s8) = COPY %r1
9292 %2(s8) = G_ADD %0, %1
93 ; G_ADD with s8 is legal, so we should find it unchanged in the output
94 ; CHECK: {{%[0-9]+}}(s8) = G_ADD {{%[0-9]+, %[0-9]+}}
93 ; G_ADD with s8 should widen
94 ; CHECK: {{%[0-9]+}}(s32) = G_ADD {{%[0-9]+, %[0-9]+}}
95 ; CHECK-NOT: {{%[0-9]+}}(s8) = G_ADD {{%[0-9]+, %[0-9]+}}
9596 %r0 = COPY %2(s8)
9697 BX_RET 14, _, implicit %r0
9798 ...
114115 %0(s16) = COPY %r0
115116 %1(s16) = COPY %r1
116117 %2(s16) = G_ADD %0, %1
117 ; G_ADD with s16 is legal, so we should find it unchanged in the output
118 ; CHECK: {{%[0-9]+}}(s16) = G_ADD {{%[0-9]+, %[0-9]+}}
118 ; G_ADD with s16 should widen
119 ; CHECK: {{%[0-9]+}}(s32) = G_ADD {{%[0-9]+, %[0-9]+}}
120 ; CHECK-NOT: {{%[0-9]+}}(s16) = G_ADD {{%[0-9]+, %[0-9]+}}
119121 %r0 = COPY %2(s16)
120122 BX_RET 14, _, implicit %r0
121123
164166 %0(s8) = COPY %r0
165167 %1(s8) = COPY %r1
166168 %2(s8) = G_SUB %0, %1
167 ; G_SUB with s8 is legal, so we should find it unchanged in the output
168 ; CHECK: {{%[0-9]+}}(s8) = G_SUB {{%[0-9]+, %[0-9]+}}
169 ; G_SUB with s8 should widen
170 ; CHECK: {{%[0-9]+}}(s32) = G_SUB {{%[0-9]+, %[0-9]+}}
171 ; CHECK-NOT: {{%[0-9]+}}(s8) = G_SUB {{%[0-9]+, %[0-9]+}}
169172 %r0 = COPY %2(s8)
170173 BX_RET 14, _, implicit %r0
171174 ...
188191 %0(s16) = COPY %r0
189192 %1(s16) = COPY %r1
190193 %2(s16) = G_SUB %0, %1
191 ; G_SUB with s16 is legal, so we should find it unchanged in the output
192 ; CHECK: {{%[0-9]+}}(s16) = G_SUB {{%[0-9]+, %[0-9]+}}
194 ; G_SUB with s16 should widen
195 ; CHECK: {{%[0-9]+}}(s32) = G_SUB {{%[0-9]+, %[0-9]+}}
196 ; CHECK-NOT: {{%[0-9]+}}(s16) = G_SUB {{%[0-9]+, %[0-9]+}}
193197 %r0 = COPY %2(s16)
194198 BX_RET 14, _, implicit %r0
195199
238242 %0(s8) = COPY %r0
239243 %1(s8) = COPY %r1
240244 %2(s8) = G_MUL %0, %1
241 ; G_MUL with s8 is legal, so we should find it unchanged in the output
242 ; CHECK: {{%[0-9]+}}(s8) = G_MUL {{%[0-9]+, %[0-9]+}}
245 ; G_MUL with s8 should widen
246 ; CHECK: {{%[0-9]+}}(s32) = G_MUL {{%[0-9]+, %[0-9]+}}
247 ; CHECK-NOT: {{%[0-9]+}}(s8) = G_MUL {{%[0-9]+, %[0-9]+}}
243248 %r0 = COPY %2(s8)
244249 BX_RET 14, _, implicit %r0
245250 ...
262267 %0(s16) = COPY %r0
263268 %1(s16) = COPY %r1
264269 %2(s16) = G_MUL %0, %1
265 ; G_MUL with s16 is legal, so we should find it unchanged in the output
266 ; CHECK: {{%[0-9]+}}(s16) = G_MUL {{%[0-9]+, %[0-9]+}}
270 ; G_MUL with s16 should widen
271 ; CHECK: {{%[0-9]+}}(s32) = G_MUL {{%[0-9]+, %[0-9]+}}
272 ; CHECK-NOT: {{%[0-9]+}}(s16) = G_MUL {{%[0-9]+, %[0-9]+}}
267273 %r0 = COPY %2(s16)
268274 BX_RET 14, _, implicit %r0
269275
7373 # CHECK: - { id: 0, class: gprb }
7474 # CHECK: - { id: 1, class: gprb }
7575 # CHECK: - { id: 2, class: gprb }
76
77 registers:
78 - { id: 0, class: _ }
79 - { id: 1, class: _ }
80 - { id: 2, class: _ }
76 # CHECK: - { id: 3, class: gprb }
77 # CHECK: - { id: 4, class: gprb }
78 # CHECK: - { id: 5, class: gprb }
79
80 registers:
81 - { id: 0, class: _ }
82 - { id: 1, class: _ }
83 - { id: 2, class: _ }
84 - { id: 3, class: _ }
85 - { id: 4, class: _ }
86 - { id: 5, class: _ }
8187 body: |
8288 bb.0:
8389 liveins: %r0, %r1
8490
8591 %0(s16) = COPY %r0
8692 %1(s16) = COPY %r1
87 %2(s16) = G_ADD %0, %1
88 %r0 = COPY %2(s16)
93 %2(s32) = G_ANYEXT %0(s16)
94 %3(s32) = G_ANYEXT %1(s16)
95 %4(s32) = G_ADD %2, %3
96 %5(s16) = G_TRUNC %4(s32)
97 %r0 = COPY %5(s16)
8998 BX_RET 14, _, implicit %r0
9099
91100 ...
99108 # CHECK: - { id: 0, class: gprb }
100109 # CHECK: - { id: 1, class: gprb }
101110 # CHECK: - { id: 2, class: gprb }
102
103 registers:
104 - { id: 0, class: _ }
105 - { id: 1, class: _ }
106 - { id: 2, class: _ }
111 # CHECK: - { id: 3, class: gprb }
112 # CHECK: - { id: 4, class: gprb }
113 # CHECK: - { id: 5, class: gprb }
114
115 registers:
116 - { id: 0, class: _ }
117 - { id: 1, class: _ }
118 - { id: 2, class: _ }
119 - { id: 3, class: _ }
120 - { id: 4, class: _ }
121 - { id: 5, class: _ }
107122 body: |
108123 bb.0:
109124 liveins: %r0, %r1
110125
111126 %0(s8) = COPY %r0
112127 %1(s8) = COPY %r1
113 %2(s8) = G_ADD %0, %1
114 %r0 = COPY %2(s8)
128 %2(s32) = G_ANYEXT %0(s8)
129 %3(s32) = G_ANYEXT %1(s8)
130 %4(s32) = G_ADD %2, %3
131 %5(s8) = G_TRUNC %4(s32)
132 %r0 = COPY %5(s8)
115133 BX_RET 14, _, implicit %r0
116134
117135 ...
125143 # CHECK: - { id: 0, class: gprb }
126144 # CHECK: - { id: 1, class: gprb }
127145 # CHECK: - { id: 2, class: gprb }
128
129 registers:
130 - { id: 0, class: _ }
131 - { id: 1, class: _ }
132 - { id: 2, class: _ }
146 # CHECK: - { id: 3, class: gprb }
147 # CHECK: - { id: 4, class: gprb }
148 # CHECK: - { id: 5, class: gprb }
149
150 registers:
151 - { id: 0, class: _ }
152 - { id: 1, class: _ }
153 - { id: 2, class: _ }
154 - { id: 3, class: _ }
155 - { id: 4, class: _ }
156 - { id: 5, class: _ }
133157 body: |
134158 bb.0:
135159 liveins: %r0, %r1
136160
137161 %0(s1) = COPY %r0
138162 %1(s1) = COPY %r1
139 %2(s1) = G_ADD %0, %1
140 %r0 = COPY %2(s1)
163 %2(s32) = G_ANYEXT %0(s1)
164 %3(s32) = G_ANYEXT %1(s1)
165 %4(s32) = G_ADD %2, %3
166 %5(s1) = G_TRUNC %4(s32)
167 %r0 = COPY %5(s1)
141168 BX_RET 14, _, implicit %r0
142169
143170 ...
177204 # CHECK: - { id: 0, class: gprb }
178205 # CHECK: - { id: 1, class: gprb }
179206 # CHECK: - { id: 2, class: gprb }
180
181 registers:
182 - { id: 0, class: _ }
183 - { id: 1, class: _ }
184 - { id: 2, class: _ }
207 # CHECK: - { id: 3, class: gprb }
208 # CHECK: - { id: 4, class: gprb }
209 # CHECK: - { id: 5, class: gprb }
210
211 registers:
212 - { id: 0, class: _ }
213 - { id: 1, class: _ }
214 - { id: 2, class: _ }
215 - { id: 3, class: _ }
216 - { id: 4, class: _ }
217 - { id: 5, class: _ }
185218 body: |
186219 bb.0:
187220 liveins: %r0, %r1
188221
189222 %0(s16) = COPY %r0
190223 %1(s16) = COPY %r1
191 %2(s16) = G_SUB %0, %1
192 %r0 = COPY %2(s16)
224 %2(s32) = G_ANYEXT %0(s16)
225 %3(s32) = G_ANYEXT %1(s16)
226 %4(s32) = G_SUB %2, %3
227 %5(s16) = G_TRUNC %4(s32)
228 %r0 = COPY %5(s16)
193229 BX_RET 14, _, implicit %r0
194230
195231 ...
203239 # CHECK: - { id: 0, class: gprb }
204240 # CHECK: - { id: 1, class: gprb }
205241 # CHECK: - { id: 2, class: gprb }
206
207 registers:
208 - { id: 0, class: _ }
209 - { id: 1, class: _ }
210 - { id: 2, class: _ }
242 # CHECK: - { id: 3, class: gprb }
243 # CHECK: - { id: 4, class: gprb }
244 # CHECK: - { id: 5, class: gprb }
245
246 registers:
247 - { id: 0, class: _ }
248 - { id: 1, class: _ }
249 - { id: 2, class: _ }
250 - { id: 3, class: _ }
251 - { id: 4, class: _ }
252 - { id: 5, class: _ }
211253 body: |
212254 bb.0:
213255 liveins: %r0, %r1
214256
215257 %0(s8) = COPY %r0
216258 %1(s8) = COPY %r1
217 %2(s8) = G_SUB %0, %1
218 %r0 = COPY %2(s8)
259 %2(s32) = G_ANYEXT %0(s8)
260 %3(s32) = G_ANYEXT %1(s8)
261 %4(s32) = G_SUB %2, %3
262 %5(s8) = G_TRUNC %4(s32)
263 %r0 = COPY %5(s8)
219264 BX_RET 14, _, implicit %r0
220265
221266 ...
255300 # CHECK: - { id: 0, class: gprb }
256301 # CHECK: - { id: 1, class: gprb }
257302 # CHECK: - { id: 2, class: gprb }
258
259 registers:
260 - { id: 0, class: _ }
261 - { id: 1, class: _ }
262 - { id: 2, class: _ }
303 # CHECK: - { id: 3, class: gprb }
304 # CHECK: - { id: 4, class: gprb }
305 # CHECK: - { id: 5, class: gprb }
306
307 registers:
308 - { id: 0, class: _ }
309 - { id: 1, class: _ }
310 - { id: 2, class: _ }
311 - { id: 3, class: _ }
312 - { id: 4, class: _ }
313 - { id: 5, class: _ }
263314 body: |
264315 bb.0:
265316 liveins: %r0, %r1
266317
267318 %0(s16) = COPY %r0
268319 %1(s16) = COPY %r1
269 %2(s16) = G_MUL %0, %1
270 %r0 = COPY %2(s16)
320 %2(s32) = G_ANYEXT %0(s16)
321 %3(s32) = G_ANYEXT %1(s16)
322 %4(s32) = G_MUL %2, %3
323 %5(s16) = G_TRUNC %4(s32)
324 %r0 = COPY %5(s16)
271325 BX_RET 14, _, implicit %r0
272326
273327 ...
281335 # CHECK: - { id: 0, class: gprb }
282336 # CHECK: - { id: 1, class: gprb }
283337 # CHECK: - { id: 2, class: gprb }
284
285 registers:
286 - { id: 0, class: _ }
287 - { id: 1, class: _ }
288 - { id: 2, class: _ }
338 # CHECK: - { id: 3, class: gprb }
339 # CHECK: - { id: 4, class: gprb }
340 # CHECK: - { id: 5, class: gprb }
341
342 registers:
343 - { id: 0, class: _ }
344 - { id: 1, class: _ }
345 - { id: 2, class: _ }
346 - { id: 3, class: _ }
347 - { id: 4, class: _ }
348 - { id: 5, class: _ }
289349 body: |
290350 bb.0:
291351 liveins: %r0, %r1
292352
293353 %0(s8) = COPY %r0
294354 %1(s8) = COPY %r1
295 %2(s8) = G_MUL %0, %1
296 %r0 = COPY %2(s8)
355 %2(s32) = G_ANYEXT %0(s8)
356 %3(s32) = G_ANYEXT %1(s8)
357 %4(s32) = G_MUL %2, %3
358 %5(s8) = G_TRUNC %4(s32)
359 %r0 = COPY %5(s8)
297360 BX_RET 14, _, implicit %r0
298361
299362 ...