llvm.org GIT mirror llvm / c9672cb
Add an AllocationOrder class that can iterate over the allocatable physical registers for a given virtual register. Reserved registers are filtered from the allocation order, and any valid hint is returned as the first suggestion. For target dependent hints, a number of arcane target hooks are invoked. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121497 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 9 years ago
4 changed file(s) with 127 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
0 //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements an allocation order for virtual registers.
10 //
11 // The preferred allocation order for a virtual register depends on allocation
12 // hints and target hooks. The AllocationOrder class encapsulates all of that.
13 //
14 //===----------------------------------------------------------------------===//
15
16 #include "AllocationOrder.h"
17 #include "VirtRegMap.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19
20 using namespace llvm;
21
22 // Compare VirtRegMap::getRegAllocPref().
23 AllocationOrder::AllocationOrder(unsigned VirtReg,
24 const VirtRegMap &VRM,
25 const BitVector &ReservedRegs)
26 : Pos(0), Reserved(ReservedRegs) {
27 const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg);
28 std::pair HintPair =
29 VRM.getRegInfo().getRegAllocationHint(VirtReg);
30
31 // HintPair.second is a register, phys or virt.
32 Hint = HintPair.second;
33
34 // Translate to physreg, or 0 if not assigned yet.
35 if (Hint && TargetRegisterInfo::isVirtualRegister(Hint))
36 Hint = VRM.getPhys(Hint);
37
38 // Target-dependent hints require resolution.
39 if (HintPair.first)
40 Hint = VRM.getTargetRegInfo().ResolveRegAllocHint(HintPair.first, Hint,
41 VRM.getMachineFunction());
42
43 // The hint must be a valid physreg for allocation.
44 if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
45 !RC->contains(Hint) || ReservedRegs.test(Hint)))
46 Hint = 0;
47
48 // The remaining allocation order may also depend on the hint.
49 tie(Begin, End) = VRM.getTargetRegInfo()
50 .getAllocationOrder(RC, HintPair.first, Hint, VRM.getMachineFunction());
51 }
52
53 unsigned AllocationOrder::next() {
54 // First take the hint.
55 if (!Pos) {
56 Pos = Begin;
57 if (Hint)
58 return Hint;
59 }
60 // Then look at the order from TRI.
61 while(Pos != End) {
62 unsigned Reg = *Pos++;
63 if (Reg != Hint && !Reserved.test(Reg))
64 return Reg;
65 }
66 return 0;
67 }
0 //===-- llvm/CodeGen/AllocationOrder.h - Allocation Order -*- C++ -*-------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements an allocation order for virtual registers.
10 //
11 // The preferred allocation order for a virtual register depends on allocation
12 // hints and target hooks. The AllocationOrder class encapsulates all of that.
13 //
14 //===----------------------------------------------------------------------===//
15
16 #ifndef LLVM_CODEGEN_ALLOCATIONORDER_H
17 #define LLVM_CODEGEN_ALLOCATIONORDER_H
18
19 namespace llvm {
20
21 class BitVector;
22 class VirtRegMap;
23
24 class AllocationOrder {
25 const unsigned *Begin;
26 const unsigned *End;
27 const unsigned *Pos;
28 const BitVector &Reserved;
29 unsigned Hint;
30 public:
31
32 /// AllocationOrder - Create a new AllocationOrder for VirtReg.
33 /// @param VirtReg Virtual register to allocate for.
34 /// @param VRM Virtual register map for function.
35 /// @param ReservedRegs Set of reserved registers as returned by
36 /// TargetRegisterInfo::getReservedRegs().
37 AllocationOrder(unsigned VirtReg,
38 const VirtRegMap &VRM,
39 const BitVector &ReservedRegs);
40
41 /// next - Return the next physical register in the allocation order, or 0.
42 /// It is safe to call next again after it returned 0.
43 /// It will keep returning 0 until rewind() is called.
44 unsigned next();
45
46 /// rewind - Start over from the beginning.
47 void rewind() { Pos = 0; }
48
49 };
50
51 } // end namespace llvm
52
53 #endif
0 add_llvm_library(LLVMCodeGen
11 AggressiveAntiDepBreaker.cpp
2 AllocationOrder.cpp
23 Analysis.cpp
34 BranchFolding.cpp
45 CalcSpillWeights.cpp
155155 }
156156
157157 MachineFunction &getMachineFunction() const {
158 assert(MF && "getMachineFunction called before runOnMAchineFunction");
158 assert(MF && "getMachineFunction called before runOnMachineFunction");
159159 return *MF;
160160 }
161
162 MachineRegisterInfo &getRegInfo() const { return *MRI; }
163 const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
161164
162165 void grow();
163166