llvm.org GIT mirror llvm / c8ecf53
Refine the ARM EHABI test cases. Since we have ARM unwind directive parser and assembler, we can check the correctness in two stages: 1. From LLVM assembly (.ll) to ARM assembly (.s) 2. From ARM assembly (.s) to ELF object file (.o) We already have several "*.s to *.o" test cases. This CL adds some "*.ll to *.s" test cases and removes the redundant "*.ll to *.o" test cases. New test cases to check "*.ll to *.s" code generator: - ehabi.ll: Check the correctness of the generated unwind directives. - section-name.ll: Check the section name of functions. Removed test cases: - ehabi-mc-cantunwind.ll (Covered by ehabi-cantunwind.ll, and eh-directive-cantunwind.s) - ehabi-mc-compact-pr0.ll (Covered by ehabi.ll, eh-compact-pr0.s, eh-directive-save.s, and eh-directive-setfp.s) - ehabi-mc-compact-pr1.ll (Covered by ehabi.ll, eh-compact-pr1.s, eh-directive-save.s, and eh-directive-setfp.s) - ehabi-mc.ll (Covered by ehabi.ll, and eh-directive-integrated-test.s) - ehabi-mc-section-group.ll (Covered by section-name.ll, and eh-directive-section-comdat.s) - ehabi-mc-section.ll (Covered by section-name.ll, and eh-directive-section.s) - ehabi-mc-sh_link.ll (Covered by eh-directive-text-section.s, and eh-directive-section.s) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183628 91177308-0d34-0410-b5e6-96231b3b80d8 Logan Chien 6 years ago
9 changed file(s) with 323 addition(s) and 413 deletion(s). Raw diff Collapse all Expand all
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test/CodeGen/ARM/ehabi-mc-cantunwind.ll less more
None ; RUN: llc -mtriple arm-unknown-linux-gnueabi \
1 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
2 ; RUN: -filetype=obj -o - %s \
3 ; RUN: | llvm-objdump -s - \
4 ; RUN: | FileCheck %s
5
6 define void @test() nounwind {
7 entry:
8 ret void
9 }
10
11 ; CHECK: section .text
12 ; CHECK: section .ARM.exidx
13 ; CHECK-NEXT: 0000 00000000 01000000
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test/CodeGen/ARM/ehabi-mc-compact-pr0.ll less more
None ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
1 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
2 ; RUN: -disable-fp-elim -filetype=obj -o - %s \
3 ; RUN: | llvm-objdump -s - \
4 ; RUN: | FileCheck %s --check-prefix=CHECK
5
6 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
7 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
8 ; RUN: -filetype=obj -o - %s \
9 ; RUN: | llvm-objdump -s - \
10 ; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM
11
12 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
13 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
14 ; RUN: -disable-fp-elim -filetype=obj -o - %s \
15 ; RUN: | llvm-objdump -r - \
16 ; RUN: | FileCheck %s --check-prefix=CHECK-RELOC
17
18 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
19 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
20 ; RUN: -filetype=obj -o - %s \
21 ; RUN: | llvm-objdump -r - \
22 ; RUN: | FileCheck %s --check-prefix=CHECK-RELOC
23
24 define void @_Z4testv() {
25 entry:
26 tail call void @_Z15throw_exceptionv()
27 ret void
28 }
29
30 declare void @_Z15throw_exceptionv()
31
32 ; CHECK-NOT: section .ARM.extab
33 ; CHECK: section .text
34 ; CHECK-NOT: section .ARM.extab
35 ; CHECK: section .ARM.exidx
36 ; CHECK-NEXT: 0000 00000000 80849b80
37 ; CHECK-NOT: section .ARM.extab
38
39 ; CHECK-FP-ELIM-NOT: section .ARM.extab
40 ; CHECK-FP-ELIM: section .text
41 ; CHECK-FP-ELIM-NOT: section .ARM.extab
42 ; CHECK-FP-ELIM: section .ARM.exidx
43 ; CHECK-FP-ELIM-NEXT: 0000 00000000 b0808480
44 ; CHECK-FP-ELIM-NOT: section .ARM.extab
45
46 ; CHECK-RELOC: RELOCATION RECORDS FOR [.rel.ARM.exidx]
47 ; CHECK-RELOC-NEXT: 0 R_ARM_PREL31 .text
48 ; CHECK-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr0
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test/CodeGen/ARM/ehabi-mc-compact-pr1.ll less more
None ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
1 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
2 ; RUN: -disable-fp-elim -filetype=obj -o - %s \
3 ; RUN: | llvm-objdump -s - \
4 ; RUN: | FileCheck %s --check-prefix=CHECK
5
6 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
7 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
8 ; RUN: -filetype=obj -o - %s \
9 ; RUN: | llvm-objdump -s - \
10 ; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM
11
12 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
13 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
14 ; RUN: -disable-fp-elim -filetype=obj -o - %s \
15 ; RUN: | llvm-objdump -r - \
16 ; RUN: | FileCheck %s --check-prefix=CHECK-RELOC
17
18 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
19 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
20 ; RUN: -filetype=obj -o - %s \
21 ; RUN: | llvm-objdump -r - \
22 ; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM-RELOC
23
24 define i32 @_Z3addiiiiiiii(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) {
25 entry:
26 %add = add nsw i32 %b, %a
27 %add1 = add nsw i32 %add, %c
28 %add2 = add nsw i32 %add1, %d
29 tail call void @_Z15throw_exceptioni(i32 %add2)
30 %add3 = add nsw i32 %f, %e
31 %add4 = add nsw i32 %add3, %g
32 %add5 = add nsw i32 %add4, %h
33 tail call void @_Z15throw_exceptioni(i32 %add5)
34 %add6 = add nsw i32 %add5, %add2
35 ret i32 %add6
36 }
37
38 declare void @_Z15throw_exceptioni(i32)
39
40 ; CHECK-NOT: section .ARM.extab
41 ; CHECK: section .text
42 ; CHECK: section .ARM.extab
43 ; CHECK-NEXT: 0000 419b0181 b0b08384
44 ; CHECK: section .ARM.exidx
45 ; CHECK-NEXT: 0000 00000000 00000000
46 ; CHECK-NOT: section .ARM.extab
47
48 ; CHECK-FP-ELIM-NOT: section .ARM.extab
49 ; CHECK-FP-ELIM: section .text
50 ; CHECK-FP-ELIM-NOT: section .ARM.extab
51 ; CHECK-FP-ELIM: section .ARM.exidx
52 ; CHECK-FP-ELIM-NEXT: 0000 00000000 b0838480
53 ; CHECK-FP-ELIM-NOT: section .ARM.extab
54
55 ; CHECK-RELOC: RELOCATION RECORDS FOR [.rel.ARM.exidx]
56 ; CHECK-RELOC-NEXT: 0 R_ARM_PREL31 .text
57 ; CHECK-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr1
58
59 ; CHECK-FP-ELIM-RELOC: RELOCATION RECORDS FOR [.rel.ARM.exidx]
60 ; CHECK-FP-ELIM-RELOC-NEXT: 0 R_ARM_PREL31 .text
61 ; CHECK-FP-ELIM-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr0
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test/CodeGen/ARM/ehabi-mc-section-group.ll less more
None ; Test section group of the function with linkonce_odr
1
2 ; The instantiation of C++ function template will come with linkonce_odr,
3 ; which indicates that the linker can remove the duplicated instantiation.
4 ; However, to make this feature work, we have to group the section properly.
5 ; .text, .ARM.extab, and .ARM.exidx should be grouped together.
6
7 ; RUN: llc -mtriple arm-unknown-linux-gnueabi \
8 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
9 ; RUN: -filetype=obj -o - %s \
10 ; RUN: | llvm-readobj -s -sd \
11 ; RUN: | FileCheck %s
12
13 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
14 target triple = "armv4t--linux-gnueabi"
15
16 define void @_Z11instantiatev() {
17 entry:
18 tail call void @_Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_(i32 1, i32 2, i32 3, i32 4, i32 5, double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, double 5.000000e-01)
19 ret void
20 }
21
22 define linkonce_odr void @_Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_(i32 %u1, i32 %u2, i32 %u3, i32 %u4, i32 %u5, double %v1, double %v2, double %v3, double %v4, double %v5) {
23 entry:
24 invoke void @_Z5printiiiii(i32 %u1, i32 %u2, i32 %u3, i32 %u4, i32 %u5)
25 to label %try.cont unwind label %lpad
26
27 lpad: ; preds = %entry
28 %0 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
29 catch i8* null
30 %1 = extractvalue { i8*, i32 } %0, 0
31 %2 = tail call i8* @__cxa_begin_catch(i8* %1) nounwind
32 invoke void @_Z5printddddd(double %v1, double %v2, double %v3, double %v4, double %v5)
33 to label %invoke.cont2 unwind label %lpad1
34
35 invoke.cont2: ; preds = %lpad
36 tail call void @__cxa_end_catch()
37 br label %try.cont
38
39 try.cont: ; preds = %entry, %invoke.cont2
40 ret void
41
42 lpad1: ; preds = %lpad
43 %3 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
44 cleanup
45 invoke void @__cxa_end_catch()
46 to label %eh.resume unwind label %terminate.lpad
47
48 eh.resume: ; preds = %lpad1
49 resume { i8*, i32 } %3
50
51 terminate.lpad: ; preds = %lpad1
52 %4 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
53 catch i8* null
54 tail call void @_ZSt9terminatev() noreturn nounwind
55 unreachable
56 }
57
58 declare void @_Z5printiiiii(i32, i32, i32, i32, i32)
59
60 declare i32 @__gxx_personality_v0(...)
61
62 declare i8* @__cxa_begin_catch(i8*)
63
64 declare void @_Z5printddddd(double, double, double, double, double)
65
66 declare void @__cxa_end_catch()
67
68 declare void @_ZSt9terminatev()
69
70 ; CHECK: Section {
71 ; CHECK: Index: 1
72 ; CHECK-NEXT: Name: .group (47)
73 ; CHECK: SectionData (
74 ; CHECK-NEXT: 0000: 01000000 09000000 0B000000 0D000000
75 ; CHECK-NEXT: )
76
77 ; CHECK: Section {
78 ; CHECK: Index: 9
79 ; CHECK-NEXT: Name: .text._Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_ (214)
80
81 ; CHECK: Section {
82 ; CHECK: Index: 11
83 ; CHECK-NEXT: Name: .ARM.extab.text._Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_ (204)
84
85 ; CHECK: Section {
86 ; CHECK: Index: 13
87 ; CHECK-NEXT: Name: .ARM.exidx.text._Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_ (90)
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test/CodeGen/ARM/ehabi-mc-section.ll less more
None ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
1 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
2 ; RUN: -disable-fp-elim -filetype=obj -o - %s \
3 ; RUN: | llvm-objdump -s - \
4 ; RUN: | FileCheck %s --check-prefix=CHECK
5
6 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
7 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
8 ; RUN: -filetype=obj -o - %s \
9 ; RUN: | llvm-objdump -s - \
10 ; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM
11
12 define void @_Z4testiiiiiddddd(i32 %u1, i32 %u2, i32 %u3, i32 %u4, i32 %u5, double %v1, double %v2, double %v3, double %v4, double %v5) section ".test_section" {
13 entry:
14 invoke void @_Z5printiiiii(i32 %u1, i32 %u2, i32 %u3, i32 %u4, i32 %u5)
15 to label %try.cont unwind label %lpad
16
17 lpad: ; preds = %entry
18 %0 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
19 catch i8* null
20 %1 = extractvalue { i8*, i32 } %0, 0
21 %2 = tail call i8* @__cxa_begin_catch(i8* %1) nounwind
22 invoke void @_Z5printddddd(double %v1, double %v2, double %v3, double %v4, double %v5)
23 to label %invoke.cont2 unwind label %lpad1
24
25 invoke.cont2: ; preds = %lpad
26 tail call void @__cxa_end_catch()
27 br label %try.cont
28
29 try.cont: ; preds = %entry, %invoke.cont2
30 ret void
31
32 lpad1: ; preds = %lpad
33 %3 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
34 cleanup
35 invoke void @__cxa_end_catch()
36 to label %eh.resume unwind label %terminate.lpad
37
38 eh.resume: ; preds = %lpad1
39 resume { i8*, i32 } %3
40
41 terminate.lpad: ; preds = %lpad1
42 %4 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
43 catch i8* null
44 tail call void @_ZSt9terminatev() noreturn nounwind
45 unreachable
46 }
47
48 declare void @_Z5printiiiii(i32, i32, i32, i32, i32)
49
50 declare i32 @__gxx_personality_v0(...)
51
52 declare i8* @__cxa_begin_catch(i8*)
53
54 declare void @_Z5printddddd(double, double, double, double, double)
55
56 declare void @__cxa_end_catch()
57
58 declare void @_ZSt9terminatev()
59
60 ; CHECK: section .test_section
61 ; CHECK: section .ARM.extab.test_section
62 ; CHECK-NEXT: 0000 00000000 c94a9b01 b0818484
63 ; CHECK: section .ARM.exidx.test_section
64 ; CHECK-NEXT: 0000 00000000 00000000
65
66 ; CHECK-FP-ELIM: section .test_section
67 ; CHECK-FP-ELIM: section .ARM.extab.test_section
68 ; CHECK-FP-ELIM-NEXT: 0000 00000000 84c90501 b0b0b0a8
69 ; CHECK-FP-ELIM: section .ARM.exidx.test_section
70 ; CHECK-FP-ELIM-NEXT: 0000 00000000 00000000
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test/CodeGen/ARM/ehabi-mc-sh_link.ll less more
None ; Test the sh_link in Elf32_Shdr.
1
2 ; The .ARM.exidx section should be linked with corresponding text section.
3 ; The sh_link in Elf32_Shdr should be filled with the section index of
4 ; the text section.
5
6 ; RUN: llc -mtriple arm-unknown-linux-gnueabi \
7 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
8 ; RUN: -filetype=obj -o - %s \
9 ; RUN: | llvm-readobj -s \
10 ; RUN: | FileCheck %s
11
12 define void @test1() nounwind {
13 entry:
14 ret void
15 }
16
17 define void @test2() nounwind section ".test_section" {
18 entry:
19 ret void
20 }
21
22 ; CHECK: Sections [
23 ; CHECK: Section {
24 ; CHECK: Index: 1
25 ; CHECK-NEXT: Name: .text (16)
26
27 ; CHECK: Section {
28 ; CHECK: Name: .ARM.exidx (5)
29 ; CHECK-NEXT: Type: SHT_ARM_EXIDX
30 ; CHECK-NEXT: Flags [ (0x82)
31 ; CHECK-NEXT: SHF_ALLOC
32 ; CHECK-NEXT: SHF_LINK_ORDER
33 ; CHECK-NEXT: ]
34 ; CHECK-NEXT: Address: 0x0
35 ; CHECK-NEXT: Offset: 0x5C
36 ; CHECK-NEXT: Size: 8
37 ; CHECK-NEXT: Link: 1
38 ; CHECK-NEXT: Info: 0
39 ; CHECK-NEXT: AddressAlignment: 4
40
41 ; CHECK: Section {
42 ; CHECK: Index: 7
43 ; CHECK-NEXT: Name: .test_section (57)
44
45 ; CHECK: Section {
46 ; CHECK: Name: .ARM.exidx.test_section (47)
47 ; CHECK-NEXT: Type: SHT_ARM_EXIDX
48 ; CHECK-NEXT: Flags [ (0x82)
49 ; CHECK-NEXT: SHF_ALLOC
50 ; CHECK-NEXT: SHF_LINK_ORDER
51 ; CHECK-NEXT: ]
52 ; CHECK-NEXT: Address: 0x0
53 ; CHECK-NEXT: Offset: 0x68
54 ; CHECK-NEXT: Size: 8
55 ; CHECK-NEXT: Link: 7
56 ; CHECK-NEXT: Info: 0
57 ; CHECK-NEXT: AddressAlignment: 4
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test/CodeGen/ARM/ehabi-mc.ll less more
None ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
1 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
2 ; RUN: -disable-fp-elim -filetype=obj -o - %s \
3 ; RUN: | llvm-objdump -s - \
4 ; RUN: | FileCheck %s --check-prefix=CHECK
5
6 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
7 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
8 ; RUN: -filetype=obj -o - %s \
9 ; RUN: | llvm-objdump -s - \
10 ; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM
11
12 define void @_Z4testiiiiiddddd(i32 %u1, i32 %u2, i32 %u3, i32 %u4, i32 %u5, double %v1, double %v2, double %v3, double %v4, double %v5) {
13 entry:
14 invoke void @_Z5printiiiii(i32 %u1, i32 %u2, i32 %u3, i32 %u4, i32 %u5)
15 to label %try.cont unwind label %lpad
16
17 lpad: ; preds = %entry
18 %0 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
19 catch i8* null
20 %1 = extractvalue { i8*, i32 } %0, 0
21 %2 = tail call i8* @__cxa_begin_catch(i8* %1) nounwind
22 invoke void @_Z5printddddd(double %v1, double %v2, double %v3, double %v4, double %v5)
23 to label %invoke.cont2 unwind label %lpad1
24
25 invoke.cont2: ; preds = %lpad
26 tail call void @__cxa_end_catch()
27 br label %try.cont
28
29 try.cont: ; preds = %entry, %invoke.cont2
30 ret void
31
32 lpad1: ; preds = %lpad
33 %3 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
34 cleanup
35 invoke void @__cxa_end_catch()
36 to label %eh.resume unwind label %terminate.lpad
37
38 eh.resume: ; preds = %lpad1
39 resume { i8*, i32 } %3
40
41 terminate.lpad: ; preds = %lpad1
42 %4 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
43 catch i8* null
44 tail call void @_ZSt9terminatev() noreturn nounwind
45 unreachable
46 }
47
48 declare void @_Z5printiiiii(i32, i32, i32, i32, i32)
49
50 declare i32 @__gxx_personality_v0(...)
51
52 declare i8* @__cxa_begin_catch(i8*)
53
54 declare void @_Z5printddddd(double, double, double, double, double)
55
56 declare void @__cxa_end_catch()
57
58 declare void @_ZSt9terminatev()
59
60 ; CHECK: section .text
61 ; CHECK: section .ARM.extab
62 ; CHECK-NEXT: 0000 00000000 c94a9b01 b0818484
63 ; CHECK: section .ARM.exidx
64 ; CHECK-NEXT: 0000 00000000 00000000
65
66 ; CHECK-FP-ELIM: section .text
67 ; CHECK-FP-ELIM: section .ARM.extab
68 ; CHECK-FP-ELIM-NEXT: 0000 00000000 84c90501 b0b0b0a8
69 ; CHECK-FP-ELIM: section .ARM.exidx
70 ; CHECK-FP-ELIM-NEXT: 0000 00000000 00000000
0 ; ARM EHABI integrated test
1
2 ; This test case checks whether the ARM unwind directives are properly
3 ; generated or not.
4
5 ; The purpose of the test:
6 ; (1) .fnstart and .fnend directives should wrap the function.
7 ; (2) .setfp directive should be available if frame pointer is not eliminated.
8 ; (3) .save directive should come with push instruction.
9 ; (4) .vsave directive should come with vpush instruction.
10 ; (5) .pad directive should come with stack pointer adjustment.
11 ; (6) .cantunwind directive should be available if the function is marked with
12 ; nounwind function attribute.
13
14 ; We have to check several cases:
15 ; (1) arm with -disable-fp-elim
16 ; (2) arm without -disable-fp-elim
17 ; (3) armv7 with -disable-fp-elim
18 ; (4) armv7 without -disable-fp-elim
19
20 ; RUN: llc -mtriple arm-unknown-linux-gnueabi \
21 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
22 ; RUN: -disable-fp-elim -filetype=asm -o - %s \
23 ; RUN: | FileCheck %s --check-prefix=CHECK-FP
24
25 ; RUN: llc -mtriple arm-unknown-linux-gnueabi \
26 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
27 ; RUN: -filetype=asm -o - %s \
28 ; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM
29
30 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
31 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
32 ; RUN: -disable-fp-elim -filetype=asm -o - %s \
33 ; RUN: | FileCheck %s --check-prefix=CHECK-V7-FP
34
35 ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
36 ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
37 ; RUN: -filetype=asm -o - %s \
38 ; RUN: | FileCheck %s --check-prefix=CHECK-V7-FP-ELIM
39
40 ;-------------------------------------------------------------------------------
41 ; Test 1
42 ;-------------------------------------------------------------------------------
43 ; This is the LLVM assembly generated from following C++ code:
44 ;
45 ; extern void print(int, int, int, int, int);
46 ; extern void print(double, double, double, double, double);
47 ;
48 ; void test(int a, int b, int c, int d, int e,
49 ; double m, double n, double p, double q, double r) {
50 ; try {
51 ; print(a, b, c, d, e);
52 ; } catch (...) {
53 ; print(m, n, p, q, r);
54 ; }
55 ; }
56
57 declare void @_Z5printiiiii(i32, i32, i32, i32, i32)
58
59 declare void @_Z5printddddd(double, double, double, double, double)
60
61 define void @_Z4testiiiiiddddd(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e,
62 double %m, double %n, double %p,
63 double %q, double %r) {
64 entry:
65 invoke void @_Z5printiiiii(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e)
66 to label %try.cont unwind label %lpad
67
68 lpad:
69 %0 = landingpad { i8*, i32 }
70 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
71 catch i8* null
72 %1 = extractvalue { i8*, i32 } %0, 0
73 %2 = tail call i8* @__cxa_begin_catch(i8* %1)
74 invoke void @_Z5printddddd(double %m, double %n, double %p,
75 double %q, double %r)
76 to label %invoke.cont2 unwind label %lpad1
77
78 invoke.cont2:
79 tail call void @__cxa_end_catch()
80 br label %try.cont
81
82 try.cont:
83 ret void
84
85 lpad1:
86 %3 = landingpad { i8*, i32 }
87 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
88 cleanup
89 invoke void @__cxa_end_catch()
90 to label %eh.resume unwind label %terminate.lpad
91
92 eh.resume:
93 resume { i8*, i32 } %3
94
95 terminate.lpad:
96 %4 = landingpad { i8*, i32 }
97 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
98 catch i8* null
99 %5 = extractvalue { i8*, i32 } %4, 0
100 tail call void @__clang_call_terminate(i8* %5)
101 unreachable
102 }
103
104 declare void @__clang_call_terminate(i8*)
105
106 declare i32 @__gxx_personality_v0(...)
107
108 declare i8* @__cxa_begin_catch(i8*)
109
110 declare void @__cxa_end_catch()
111
112 declare void @_ZSt9terminatev()
113
114 ; CHECK-FP: _Z4testiiiiiddddd:
115 ; CHECK-FP: .fnstart
116 ; CHECK-FP: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
117 ; CHECK-FP: push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
118 ; CHECK-FP: .setfp r11, sp, #28
119 ; CHECK-FP: add r11, sp, #28
120 ; CHECK-FP: .pad #28
121 ; CHECK-FP: sub sp, sp, #28
122 ; CHECK-FP: .personality __gxx_personality_v0
123 ; CHECK-FP: .handlerdata
124 ; CHECK-FP: .fnend
125
126 ; CHECK-FP-ELIM: _Z4testiiiiiddddd:
127 ; CHECK-FP-ELIM: .fnstart
128 ; CHECK-FP-ELIM: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
129 ; CHECK-FP-ELIM: push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
130 ; CHECK-FP-ELIM: .pad #28
131 ; CHECK-FP-ELIM: sub sp, sp, #28
132 ; CHECK-FP-ELIM: .personality __gxx_personality_v0
133 ; CHECK-FP-ELIM: .handlerdata
134 ; CHECK-FP-ELIM: .fnend
135
136 ; CHECK-V7-FP: _Z4testiiiiiddddd:
137 ; CHECK-V7-FP: .fnstart
138 ; CHECK-V7-FP: .save {r4, r11, lr}
139 ; CHECK-V7-FP: push {r4, r11, lr}
140 ; CHECK-V7-FP: .setfp r11, sp, #4
141 ; CHECK-V7-FP: add r11, sp, #4
142 ; CHECK-V7-FP: .vsave {d8, d9, d10, d11, d12}
143 ; CHECK-V7-FP: vpush {d8, d9, d10, d11, d12}
144 ; CHECK-V7-FP: .pad #28
145 ; CHECK-V7-FP: sub sp, sp, #28
146 ; CHECK-V7-FP: .personality __gxx_personality_v0
147 ; CHECK-V7-FP: .handlerdata
148 ; CHECK-V7-FP: .fnend
149
150 ; CHECK-V7-FP-ELIM: _Z4testiiiiiddddd:
151 ; CHECK-V7-FP-ELIM: .fnstart
152 ; CHECK-V7-FP-ELIM: .save {r4, lr}
153 ; CHECK-V7-FP-ELIM: push {r4, lr}
154 ; CHECK-V7-FP-ELIM: .vsave {d8, d9, d10, d11, d12}
155 ; CHECK-V7-FP-ELIM: vpush {d8, d9, d10, d11, d12}
156 ; CHECK-V7-FP-ELIM: .pad #24
157 ; CHECK-V7-FP-ELIM: sub sp, sp, #24
158 ; CHECK-V7-FP-ELIM: .personality __gxx_personality_v0
159 ; CHECK-V7-FP-ELIM: .handlerdata
160 ; CHECK-V7-FP-ELIM: .fnend
161
162
163 ;-------------------------------------------------------------------------------
164 ; Test 2
165 ;-------------------------------------------------------------------------------
166
167 declare void @throw_exception_2()
168
169 define void @test2() {
170 entry:
171 tail call void @throw_exception_2()
172 ret void
173 }
174
175 ; CHECK-FP: test2:
176 ; CHECK-FP: .fnstart
177 ; CHECK-FP: .save {r11, lr}
178 ; CHECK-FP: push {r11, lr}
179 ; CHECK-FP: .setfp r11, sp
180 ; CHECK-FP: mov r11, sp
181 ; CHECK-FP: pop {r11, lr}
182 ; CHECK-FP: mov pc, lr
183 ; CHECK-FP: .fnend
184
185 ; CHECK-FP-ELIM: test2:
186 ; CHECK-FP-ELIM: .fnstart
187 ; CHECK-FP-ELIM: .save {r11, lr}
188 ; CHECK-FP-ELIM: push {r11, lr}
189 ; CHECK-FP-ELIM: pop {r11, lr}
190 ; CHECK-FP-ELIM: mov pc, lr
191 ; CHECK-FP-ELIM: .fnend
192
193 ; CHECK-V7-FP: test2:
194 ; CHECK-V7-FP: .fnstart
195 ; CHECK-V7-FP: .save {r11, lr}
196 ; CHECK-V7-FP: push {r11, lr}
197 ; CHECK-V7-FP: .setfp r11, sp
198 ; CHECK-V7-FP: mov r11, sp
199 ; CHECK-V7-FP: pop {r11, pc}
200 ; CHECK-V7-FP: .fnend
201
202 ; CHECK-V7-FP-ELIM: test2:
203 ; CHECK-V7-FP-ELIM: .fnstart
204 ; CHECK-V7-FP-ELIM: .save {r11, lr}
205 ; CHECK-V7-FP-ELIM: push {r11, lr}
206 ; CHECK-V7-FP-ELIM: pop {r11, pc}
207 ; CHECK-V7-FP-ELIM: .fnend
208
209
210 ;-------------------------------------------------------------------------------
211 ; Test 3
212 ;-------------------------------------------------------------------------------
213
214 declare void @throw_exception_3(i32)
215
216 define i32 @test3(i32 %a, i32 %b, i32 %c, i32 %d,
217 i32 %e, i32 %f, i32 %g, i32 %h) {
218 entry:
219 %add = add nsw i32 %b, %a
220 %add1 = add nsw i32 %add, %c
221 %add2 = add nsw i32 %add1, %d
222 tail call void @throw_exception_3(i32 %add2)
223 %add3 = add nsw i32 %f, %e
224 %add4 = add nsw i32 %add3, %g
225 %add5 = add nsw i32 %add4, %h
226 tail call void @throw_exception_3(i32 %add5)
227 %add6 = add nsw i32 %add5, %add2
228 ret i32 %add6
229 }
230
231 ; CHECK-FP: test3:
232 ; CHECK-FP: .fnstart
233 ; CHECK-FP: .save {r4, r5, r11, lr}
234 ; CHECK-FP: push {r4, r5, r11, lr}
235 ; CHECK-FP: .setfp r11, sp, #8
236 ; CHECK-FP: add r11, sp, #8
237 ; CHECK-FP: pop {r4, r5, r11, lr}
238 ; CHECK-FP: mov pc, lr
239 ; CHECK-FP: .fnend
240
241 ; CHECK-FP-ELIM: test3:
242 ; CHECK-FP-ELIM: .fnstart
243 ; CHECK-FP-ELIM: .save {r4, r5, r11, lr}
244 ; CHECK-FP-ELIM: push {r4, r5, r11, lr}
245 ; CHECK-FP-ELIM: pop {r4, r5, r11, lr}
246 ; CHECK-FP-ELIM: mov pc, lr
247 ; CHECK-FP-ELIM: .fnend
248
249 ; CHECK-V7-FP: test3:
250 ; CHECK-V7-FP: .fnstart
251 ; CHECK-V7-FP: .save {r4, r5, r11, lr}
252 ; CHECK-V7-FP: push {r4, r5, r11, lr}
253 ; CHECK-V7-FP: .setfp r11, sp, #8
254 ; CHECK-V7-FP: add r11, sp, #8
255 ; CHECK-V7-FP: pop {r4, r5, r11, pc}
256 ; CHECK-V7-FP: .fnend
257
258 ; CHECK-V7-FP-ELIM: test3:
259 ; CHECK-V7-FP-ELIM: .fnstart
260 ; CHECK-V7-FP-ELIM: .save {r4, r5, r11, lr}
261 ; CHECK-V7-FP-ELIM: push {r4, r5, r11, lr}
262 ; CHECK-V7-FP-ELIM: pop {r4, r5, r11, pc}
263 ; CHECK-V7-FP-ELIM: .fnend
264
265
266 ;-------------------------------------------------------------------------------
267 ; Test 4
268 ;-------------------------------------------------------------------------------
269
270 define void @test4() nounwind {
271 entry:
272 ret void
273 }
274
275 ; CHECK-FP: test4:
276 ; CHECK-FP: .fnstart
277 ; CHECK-FP: mov pc, lr
278 ; CHECK-FP: .cantunwind
279 ; CHECK-FP: .fnend
280
281 ; CHECK-FP-ELIM: test4:
282 ; CHECK-FP-ELIM: .fnstart
283 ; CHECK-FP-ELIM: mov pc, lr
284 ; CHECK-FP-ELIM: .cantunwind
285 ; CHECK-FP-ELIM: .fnend
286
287 ; CHECK-V7-FP: test4:
288 ; CHECK-V7-FP: .fnstart
289 ; CHECK-V7-FP: bx lr
290 ; CHECK-V7-FP: .cantunwind
291 ; CHECK-V7-FP: .fnend
292
293 ; CHECK-V7-FP-ELIM: test4:
294 ; CHECK-V7-FP-ELIM: .fnstart
295 ; CHECK-V7-FP-ELIM: bx lr
296 ; CHECK-V7-FP-ELIM: .cantunwind
297 ; CHECK-V7-FP-ELIM: .fnend
0 ; RUN: llc < %s -mtriple=arm-unknown-linux-gnueabi | FileCheck %s
1
2 ; CHECK: .text
3 ; CHECK: .globl test1
4 ; CHECK: .type test1,%function
5 define void @test1() {
6 entry:
7 ret void
8 }
9
10 ; CHECK: .section .test2,"ax",%progbits
11 ; CHECK: .globl test2
12 ; CHECK: .type test2,%function
13 define void @test2() section ".test2" {
14 entry:
15 ret void
16 }
17
18 ; CHECK: .section .text.test3,"axG",%progbits,test3,comdat
19 ; CHECK: .weak test3
20 ; CHECK: .type test3,%function
21 define linkonce_odr void @test3() {
22 entry:
23 ret void
24 }