llvm.org GIT mirror llvm / c8afc56
Merge 80370 from mainline. Short-term workaround for frame-related weirdness on win64. Some other minor win64 fixes as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_26@81690 91177308-0d34-0410-b5e6-96231b3b80d8 Tanya Lattner 11 years ago
3 changed file(s) with 6 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
20362036 if (MI != MBB.end()) DL = MI->getDebugLoc();
20372037
20382038 bool is64Bit = TM.getSubtarget().is64Bit();
2039 bool isWin64 = TM.getSubtarget().isTargetWin64();
20392040 unsigned SlotSize = is64Bit ? 8 : 4;
20402041
20412042 MachineFunction &MF = *MBB.getParent();
20522053 if (Reg == FPReg)
20532054 // X86RegisterInfo::emitPrologue will handle spilling of frame register.
20542055 continue;
2055 if (RegClass != &X86::VR128RegClass) {
2056 if (RegClass != &X86::VR128RegClass && !isWin64) {
20562057 CalleeFrameSize += SlotSize;
20572058 BuildMI(MBB, MI, DL, get(Opc)).addReg(Reg, RegState::Kill);
20582059 } else {
20762077 MachineFunction &MF = *MBB.getParent();
20772078 unsigned FPReg = RI.getFrameRegister(MF);
20782079 bool is64Bit = TM.getSubtarget().is64Bit();
2080 bool isWin64 = TM.getSubtarget().isTargetWin64();
20792081 unsigned Opc = is64Bit ? X86::POP64r : X86::POP32r;
20802082 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
20812083 unsigned Reg = CSI[i].getReg();
20832085 // X86RegisterInfo::emitEpilogue will handle restoring of frame register.
20842086 continue;
20852087 const TargetRegisterClass *RegClass = CSI[i].getRegClass();
2086 if (RegClass != &X86::VR128RegClass) {
2088 if (RegClass != &X86::VR128RegClass && !isWin64) {
20872089 BuildMI(MBB, MI, DL, get(Opc), Reg);
20882090 } else {
20892091 loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RegClass);
2323 using namespace llvm;
2424
2525 // Determine the platform we're running on
26 #if defined (__x86_64__) || defined (_M_AMD64)
26 #if defined (__x86_64__) || defined (_M_AMD64) || defined (_M_X64)
2727 # define X86_64_JIT
2828 #elif defined(__i386__) || defined(i386) || defined(_M_IX86)
2929 # define X86_32_JIT
159159 /// specified arguments. If we can't run cpuid on the host, return true.
160160 bool X86::GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
161161 unsigned *rECX, unsigned *rEDX) {
162 #if defined(__x86_64__) || defined(_M_AMD64)
162 #if defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
163163 #if defined(__GNUC__)
164164 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
165165 asm ("movq\t%%rbx, %%rsi\n\t"