llvm.org GIT mirror llvm / c83994e
eliminate more redundant constraint type analysis git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36546 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 13 years ago
1 changed file(s) with 2 addition(s) and 6 deletion(s). Raw diff Collapse all Expand all
33193319
33203320 switch (OpInfo.Type) {
33213321 case InlineAsm::isOutput: {
3322 TargetLowering::ConstraintType CTy = TargetLowering::C_RegisterClass;
3323 if (OpInfo.ConstraintCode.size() == 1) // not a physreg name.
3324 CTy = TLI.getConstraintType(OpInfo.ConstraintCode);
3325
3326 if (CTy != TargetLowering::C_RegisterClass &&
3327 CTy != TargetLowering::C_Register) {
3322 if (OpInfo.ConstraintType != TargetLowering::C_RegisterClass &&
3323 OpInfo.ConstraintType != TargetLowering::C_Register) {
33283324 // Memory output, or 'other' output (e.g. 'X' constraint).
33293325 SDOperand InOperandVal = OpInfo.CallOperand;
33303326