llvm.org GIT mirror llvm / c76507d
x32. Fixes a bug in i8mem_NOREX declaration. The old implementation assumed LP64 which is broken for x32. Specifically, the MOVE8rm_NOREX and MOVE8mr_NOREX, when selected, would cause a 'Cannot emit physreg copy instruction' error message to be reported. This patch also enable the h-register*ll tests for x32. Differential Revision: http://reviews.llvm.org/D12336 Patch by João Porto git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247058 91177308-0d34-0410-b5e6-96231b3b80d8 Derek Schuff 4 years ago
6 changed file(s) with 37 addition(s) and 14 deletion(s). Raw diff Collapse all Expand all
340340 def vz32mem : X86VMemOperand;
341341 def vz64mem : X86VMemOperand;
342342
343 // A version of i8mem for use on x86-64 that uses GR64_NOREX instead of
344 // plain GR64, so that it doesn't potentially require a REX prefix.
345 def i8mem_NOREX : Operand {
343 // A version of i8mem for use on x86-64 and x32 that uses a NOREX GPR instead
344 // of a plain GPR, so that it doesn't potentially require a REX prefix.
345 def ptr_rc_norex : PointerLikeRegClass<2>;
346 def ptr_rc_norex_nosp : PointerLikeRegClass<3>;
347
348 def i8mem_NOREX : Operand {
346349 let PrintMethod = "printi8mem";
347 let MIOperandInfo = (ops GR64_NOREX, i8imm, GR64_NOREX_NOSP, i32imm, i8imm);
350 let MIOperandInfo = (ops ptr_rc_norex, i8imm, ptr_rc_norex_nosp, i32imm, i8imm);
348351 let ParserMatchClass = X86Mem8AsmOperand;
349352 let OperandType = "OPERAND_MEMORY";
350353 }
351354
352355 // GPRs available for tailcall.
353356 // It represents GR32_TC, GR64_TC or GR64_TCW64.
354 def ptr_rc_tailcall : PointerLikeRegClass<2>;
357 def ptr_rc_tailcall : PointerLikeRegClass<4>;
355358
356359 // Special i32mem for addresses of load folding tail calls. These are not
357360 // allowed to use callee-saved registers since they must be scheduled
167167 if (Subtarget.isTarget64BitLP64())
168168 return &X86::GR64_NOSPRegClass;
169169 return &X86::GR32_NOSPRegClass;
170 case 2: // Available for tailcall (not callee-saved GPRs).
170 case 2: // NOREX GPRs.
171 if (Subtarget.isTarget64BitLP64())
172 return &X86::GR64_NOREXRegClass;
173 return &X86::GR32_NOREXRegClass;
174 case 3: // NOREX GPRs except the stack pointer (for encoding reasons).
175 if (Subtarget.isTarget64BitLP64())
176 return &X86::GR64_NOREX_NOSPRegClass;
177 return &X86::GR32_NOREX_NOSPRegClass;
178 case 4: // Available for tailcall (not callee-saved GPRs).
171179 const Function *F = MF.getFunction();
172180 if (IsWin64 || (F && F->getCallingConv() == CallingConv::X86_64_Win64))
173181 return &X86::GR64_TCW64RegClass;
55 ; X64: mov
66 ; X64-NEXT: movb %ah, (%rsi)
77 ; X64-NOT: mov
8
9 ; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X32
10 ; X32: mov
11 ; X32-NEXT: movb %ah, (%esi)
12 ; X32: mov
13 ; X32-NEXT: movb %ah, (%esi)
14 ; X32: mov
15 ; X32-NEXT: movb %ah, (%esi)
16 ; X32-NOT: mov
817
918 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=W64
1019 ; W64-NOT: mov
1524 ; W64: movb %ch, (%rdx)
1625 ; W64-NOT: mov
1726
18 ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
19 ; X32-NOT: mov
20 ; X32: movb %ah, (%e
21 ; X32-NOT: mov
22 ; X32: movb %ah, (%e
23 ; X32-NOT: mov
24 ; X32: movb %ah, (%e
25 ; X32-NOT: mov
27 ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X86
28 ; X86-NOT: mov
29 ; X86: movb %ah, (%e
30 ; X86-NOT: mov
31 ; X86: movb %ah, (%e
32 ; X86-NOT: mov
33 ; X86: movb %ah, (%e
34 ; X86-NOT: mov
2635
2736 ; Use h-register extract and store.
2837
0 ; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
1 ; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X86-64
12 ; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
23 ; RUN: llc < %s -mattr=-bmi -march=x86 | FileCheck %s -check-prefix=X86-32
34
0 ; RUN: llc -mattr=-bmi < %s -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc -mattr=-bmi < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
12
23 ; LLVM creates virtual registers for values live across blocks
34 ; based on the type of the value. Make sure that the extracts
0 ; RUN: llc < %s -march=x86 | grep mov | count 1
11 ; RUN: llc < %s -march=x86-64 | grep mov | count 1
2 ; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | grep mov | count 1
23
34 define zeroext i8 @foo() nounwind ssp {
45 entry: