llvm.org GIT mirror llvm / c6a0661
[X86] Fix a bad bitcast in the load form of vXi16 uniform shift patterns for EVEX encoded instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344563 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 1 year, 27 days ago
4 changed file(s) with 16 addition(s) and 21 deletion(s). Raw diff Collapse all Expand all
58255825
58265826 multiclass avx512_shift_rrm opc, string OpcodeStr, SDNode OpNode,
58275827 X86FoldableSchedWrite sched, ValueType SrcVT,
5828 PatFrag bc_frag, X86VectorVTInfo _> {
5828 X86VectorVTInfo _> {
58295829 // src2 is always 128-bit
58305830 let ExeDomain = _.ExeDomain in {
58315831 defm rr : AVX512_maskable
58365836 defm rm : AVX512_maskable
58375837 (ins _.RC:$src1, i128mem:$src2), OpcodeStr,
58385838 "$src2, $src1", "$src1, $src2",
5839 (_.VT (OpNode _.RC:$src1, (bc_frag (loadv2i64 addr:$src2))))>,
5839 (_.VT (OpNode _.RC:$src1,
5840 (SrcVT (bitconvert (loadv2i64 addr:$src2)))))>,
58405841 AVX512BIBase,
58415842 EVEX_4V, Sched<[sched.Folded, sched.ReadAfterFold]>;
58425843 }
58445845
58455846 multiclass avx512_shift_sizes opc, string OpcodeStr, SDNode OpNode,
58465847 X86SchedWriteWidths sched, ValueType SrcVT,
5847 PatFrag bc_frag, AVX512VLVectorVTInfo VTInfo,
5848 AVX512VLVectorVTInfo VTInfo,
58485849 Predicate prd> {
58495850 let Predicates = [prd] in
58505851 defm Z : avx512_shift_rrm
5851 bc_frag, VTInfo.info512>, EVEX_V512,
5852 VTInfo.info512>, EVEX_V512,
58525853 EVEX_CD8 ;
58535854 let Predicates = [prd, HasVLX] in {
58545855 defm Z256 : avx512_shift_rrm
5855 bc_frag, VTInfo.info256>, EVEX_V256,
5856 VTInfo.info256>, EVEX_V256,
58565857 EVEX_CD8;
58575858 defm Z128 : avx512_shift_rrm
5858 bc_frag, VTInfo.info128>, EVEX_V128,
5859 VTInfo.info128>, EVEX_V128,
58595860 EVEX_CD8;
58605861 }
58615862 }
58655866 X86SchedWriteWidths sched,
58665867 bit NotEVEX2VEXConvertibleQ = 0> {
58675868 defm D : avx512_shift_sizes
5868 bc_v4i32, avx512vl_i32_info, HasAVX512>;
5869 avx512vl_i32_info, HasAVX512>;
58695870 let notEVEX2VEXConvertible = NotEVEX2VEXConvertibleQ in
58705871 defm Q : avx512_shift_sizes
5871 bc_v2i64, avx512vl_i64_info, HasAVX512>, VEX_W;
5872 avx512vl_i64_info, HasAVX512>, VEX_W;
58725873 defm W : avx512_shift_sizes
5873 bc_v2i64, avx512vl_i16_info, HasBWI>;
5874 avx512vl_i16_info, HasBWI>;
58745875 }
58755876
58765877 multiclass avx512_shift_rmi_sizes opc, Format ImmFormR, Format ImmFormM,
540540 ; X86-AVX512VL-LABEL: test_x86_avx2_psrl_w_load:
541541 ; X86-AVX512VL: ## %bb.0:
542542 ; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
543 ; X86-AVX512VL-NEXT: vmovdqa (%eax), %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0x08]
544 ; X86-AVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xd1,0xc1]
543 ; X86-AVX512VL-NEXT: vpsrlw (%eax), %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xd1,0x00]
545544 ; X86-AVX512VL-NEXT: retl ## encoding: [0xc3]
546545 ;
547546 ; X64-AVX-LABEL: test_x86_avx2_psrl_w_load:
551550 ;
552551 ; X64-AVX512VL-LABEL: test_x86_avx2_psrl_w_load:
553552 ; X64-AVX512VL: ## %bb.0:
554 ; X64-AVX512VL-NEXT: vmovdqa (%rdi), %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0x0f]
555 ; X64-AVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xd1,0xc1]
553 ; X64-AVX512VL-NEXT: vpsrlw (%rdi), %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xd1,0x07]
556554 ; X64-AVX512VL-NEXT: retq ## encoding: [0xc3]
557555 %a1 = load <8 x i16>, <8 x i16>* %p
558556 %res = call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1]
19511951 ; X86-LABEL: test_x86_avx512_psrl_w_512_load:
19521952 ; X86: # %bb.0:
19531953 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
1954 ; X86-NEXT: vmovdqa (%eax), %xmm1 # encoding: [0xc5,0xf9,0x6f,0x08]
1955 ; X86-NEXT: vpsrlw %xmm1, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7d,0x48,0xd1,0xc1]
1954 ; X86-NEXT: vpsrlw (%eax), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7d,0x48,0xd1,0x00]
19561955 ; X86-NEXT: retl # encoding: [0xc3]
19571956 ;
19581957 ; X64-LABEL: test_x86_avx512_psrl_w_512_load:
19591958 ; X64: # %bb.0:
1960 ; X64-NEXT: vmovdqa (%rdi), %xmm1 # encoding: [0xc5,0xf9,0x6f,0x0f]
1961 ; X64-NEXT: vpsrlw %xmm1, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7d,0x48,0xd1,0xc1]
1959 ; X64-NEXT: vpsrlw (%rdi), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7d,0x48,0xd1,0x07]
19621960 ; X64-NEXT: retq # encoding: [0xc3]
19631961 %a1 = load <8 x i16>, <8 x i16>* %p
19641962 %res = call <32 x i16> @llvm.x86.avx512.psrl.w.512(<32 x i16> %a0, <8 x i16> %a1) ; <<32 x i16>> [#uses=1]
14331433 ; X86-AVX512-LABEL: test_x86_sse2_psrl_w_load:
14341434 ; X86-AVX512: ## %bb.0:
14351435 ; X86-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
1436 ; X86-AVX512-NEXT: vmovdqa (%eax), %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0x08]
1437 ; X86-AVX512-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd1,0xc1]
1436 ; X86-AVX512-NEXT: vpsrlw (%eax), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd1,0x00]
14381437 ; X86-AVX512-NEXT: retl ## encoding: [0xc3]
14391438 ;
14401439 ; X64-SSE-LABEL: test_x86_sse2_psrl_w_load:
14491448 ;
14501449 ; X64-AVX512-LABEL: test_x86_sse2_psrl_w_load:
14511450 ; X64-AVX512: ## %bb.0:
1452 ; X64-AVX512-NEXT: vmovdqa (%rdi), %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0x0f]
1453 ; X64-AVX512-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd1,0xc1]
1451 ; X64-AVX512-NEXT: vpsrlw (%rdi), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd1,0x07]
14541452 ; X64-AVX512-NEXT: retq ## encoding: [0xc3]
14551453 %a1 = load <8 x i16>, <8 x i16>* %p
14561454 %res = call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]