llvm.org GIT mirror llvm / c627bff
Issue diagnostics when returning FP values on x86_64 without SSE1/2 Avoid using report_fatal_error, because it will ask the user to file a bug. If the user attempts to disable SSE on x86_64 and them use floating point, that's a bug in their code, not a bug in the compiler. This is just a start. There are other ways to crash the backend in this configuration, but they should be updated to follow this pattern. Differential Revision: https://reviews.llvm.org/D27522 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302835 91177308-0d34-0410-b5e6-96231b3b80d8 Reid Kleckner 3 years ago
1 changed file(s) with 25 addition(s) and 10 deletion(s). Raw diff Collapse all Expand all
3939 #include "llvm/IR/CallingConv.h"
4040 #include "llvm/IR/Constants.h"
4141 #include "llvm/IR/DerivedTypes.h"
42 #include "llvm/IR/DiagnosticInfo.h"
4243 #include "llvm/IR/Function.h"
4344 #include "llvm/IR/GlobalAlias.h"
4445 #include "llvm/IR/GlobalVariable.h"
7778 "(the last x86-experimental-pref-loop-alignment bits"
7879 " of the loop header PC will be 0)."),
7980 cl::Hidden);
81
82 /// Call this when the user attempts to do something unsupported, like
83 /// returning a double without SSE2 enabled on x86_64. This is not fatal, unlike
84 /// report_fatal_error, so calling code should attempt to recover without
85 /// crashing.
86 static void errorUnsupported(SelectionDAG &DAG, const SDLoc &dl,
87 const char *Msg) {
88 MachineFunction &MF = DAG.getMachineFunction();
89 DAG.getContext()->diagnose(
90 DiagnosticInfoUnsupported(*MF.getFunction(), Msg, dl.getDebugLoc()));
91 }
8092
8193 X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
8294 const X86Subtarget &STI)
22042216 // or SSE or MMX vectors.
22052217 if ((ValVT == MVT::f32 || ValVT == MVT::f64 ||
22062218 VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) &&
2207 (Subtarget.is64Bit() && !Subtarget.hasSSE1())) {
2208 report_fatal_error("SSE register return with SSE disabled");
2209 }
2210 // Likewise we can't return F64 values with SSE1 only. gcc does so, but
2211 // llvm-gcc has never done it right and no one has noticed, so this
2212 // should be OK for now.
2213 if (ValVT == MVT::f64 &&
2214 (Subtarget.is64Bit() && !Subtarget.hasSSE2()))
2215 report_fatal_error("SSE2 register return with SSE2 disabled");
2219 (Subtarget.is64Bit() && !Subtarget.hasSSE1())) {
2220 errorUnsupported(DAG, dl, "SSE register return with SSE disabled");
2221 VA.convertToReg(X86::FP0); // Set reg to FP0, avoid hitting asserts.
2222 } else if (ValVT == MVT::f64 &&
2223 (Subtarget.is64Bit() && !Subtarget.hasSSE2())) {
2224 // Likewise we can't return F64 values with SSE1 only. gcc does so, but
2225 // llvm-gcc has never done it right and no one has noticed, so this
2226 // should be OK for now.
2227 errorUnsupported(DAG, dl, "SSE2 register return with SSE2 disabled");
2228 VA.convertToReg(X86::FP0); // Set reg to FP0, avoid hitting asserts.
2229 }
22162230
22172231 // Returns in ST0/ST1 are handled specially: these are pushed as operands to
22182232 // the RET instruction and handled by the FP Stackifier.
25252539 // If this is x86-64, and we disabled SSE, we can't return FP values
25262540 if ((CopyVT == MVT::f32 || CopyVT == MVT::f64 || CopyVT == MVT::f128) &&
25272541 ((Is64Bit || Ins[InsIndex].Flags.isInReg()) && !Subtarget.hasSSE1())) {
2528 report_fatal_error("SSE register return with SSE disabled");
2542 errorUnsupported(DAG, dl, "SSE register return with SSE disabled");
2543 VA.convertToReg(X86::FP0); // Set reg to FP0, avoid hitting asserts.
25292544 }
25302545
25312546 // If we prefer to use the value in xmm registers, copy it out as f80 and