llvm.org GIT mirror llvm / c61ed35
[mips] Remove CPU-only triples from llvm-objdump commands. Summary: They aren't necessary since llvm-objdump can auto-detect the architecture. Reviewers: sdardis Subscribers: jfb, dsanders, llvm-commits, sdardis Differential Revision: http://reviews.llvm.org/D20904 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271653 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 4 years ago
7 changed file(s) with 11 addition(s) and 12 deletion(s). Raw diff Collapse all Expand all
0 # RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux -mcpu=mips64r2 %s \
1 # RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s
1 # RUN: | llvm-objdump -disassemble - | FileCheck %s
22
33 # RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux -mcpu=mips64r2 %s \
4 # RUN: | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
4 # RUN: | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
55
66
77 # Test that R_MIPS_HIGHER and R_MIPS_HIGHEST relocations are created. By using
0 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \
11 # RUN: -mattr=+micromips 2>&1 -filetype=obj > %t.o
2 # RUN: llvm-objdump %t.o -triple mipsel -mattr=+micromips -d | FileCheck %s
2 # RUN: llvm-objdump %t.o -mattr=+micromips -d | FileCheck %s
33
44 # Check that fixup data is written in the microMIPS specific little endian
55 # byte order.
0 ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \
1 ; RUN: | llvm-objdump -disassemble -triple mips64el -mattr +mips64r2 - \
2 ; RUN: | FileCheck %s
1 ; RUN: | llvm-objdump -disassemble -mattr +mips64r2 - | FileCheck %s
32
43 define i64 @dext(i64 %i) nounwind readnone {
54 entry:
0 ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - \
1 ; RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s
1 ; RUN: | llvm-objdump -disassemble - | FileCheck %s
22
33 ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \
4 ; RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s
4 ; RUN: | llvm-objdump -disassemble - | FileCheck %s
55
66 define i64 @f3(i64 %a0) nounwind readnone {
77 entry:
0 # RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-nacl %s \
1 # RUN: | llvm-objdump -triple mipsel -disassemble -no-show-raw-insn - \
2 # RUN: | FileCheck %s
1 # RUN: | llvm-objdump -disassemble -no-show-raw-insn - | FileCheck %s
32
43 # This test tests that address-masking sandboxing is added when given assembly
54 # input.
None ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - | llvm-objdump -disassemble -triple mips64el - | FileCheck %s
0 ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - | \
1 ; RUN: llvm-objdump -disassemble - | FileCheck %s
12
23 ; Sign extend from 32 to 64 was creating nonsense opcodes
34
None RUN: llvm-objdump -disassemble -triple mips64el -mattr +mips64r2 %p/../Inputs/dext-test.elf-mips64r2 \
1 RUN: | FileCheck %s
0 RUN: llvm-objdump -disassemble -mattr +mips64r2 %p/../Inputs/dext-test.elf-mips64r2 \
1 RUN: | FileCheck %s
22
33 CHECK: Disassembly of section .text:
44 CHECK: dext: