llvm.org GIT mirror llvm / c4e8bec
Revert r56675 - it breaks unwinding runtime everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57048 91177308-0d34-0410-b5e6-96231b3b80d8 Anton Korobeynikov 12 years ago
3 changed file(s) with 11 addition(s) and 21 deletion(s). Raw diff Collapse all Expand all
18321832 }
18331833
18341834 bool X86InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
1835 MachineBasicBlock::iterator MI,
1835 MachineBasicBlock::iterator MI,
18361836 const std::vector &CSI) const {
18371837 if (CSI.empty())
18381838 return false;
18391839
1840 bool is64Bit = TM.getSubtarget().is64Bit();
1841 unsigned SlotSize = is64Bit ? 8 : 4;
1842
18401843 MachineFunction &MF = *MBB.getParent();
1841 bool is64Bit = TM.getSubtarget().is64Bit();
1842 unsigned FrameReg = is64Bit ? X86::RBP : X86::EBP;
1844 X86MachineFunctionInfo *X86FI = MF.getInfo();
1845 X86FI->setCalleeSavedFrameSize(CSI.size() * SlotSize);
1846
18431847 unsigned Opc = is64Bit ? X86::PUSH64r : X86::PUSH32r;
1844 unsigned CSSize = 0;
18451848 for (unsigned i = CSI.size(); i != 0; --i) {
18461849 unsigned Reg = CSI[i-1].getReg();
1847 if (Reg == FrameReg && RI.hasFP(MF))
1848 // It will be saved as part of the prologue.
1849 continue;
18501850 // Add the callee-saved register as live-in. It's killed at the spill.
18511851 MBB.addLiveIn(Reg);
18521852 BuildMI(MBB, MI, get(Opc)).addReg(Reg);
1853 ++CSSize;
1854 }
1855
1856 X86MachineFunctionInfo *X86FI = MF.getInfo();
1857 unsigned SlotSize = is64Bit ? 8 : 4;
1858 X86FI->setCalleeSavedFrameSize(CSSize * SlotSize);
1853 }
18591854 return true;
18601855 }
18611856
18621857 bool X86InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
1863 MachineBasicBlock::iterator MI,
1858 MachineBasicBlock::iterator MI,
18641859 const std::vector &CSI) const {
18651860 if (CSI.empty())
18661861 return false;
18671862
1868 MachineFunction &MF = *MBB.getParent();
18691863 bool is64Bit = TM.getSubtarget().is64Bit();
1870 unsigned FrameReg = is64Bit ? X86::RBP : X86::EBP;
18711864
18721865 unsigned Opc = is64Bit ? X86::POP64r : X86::POP32r;
18731866 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
18741867 unsigned Reg = CSI[i].getReg();
1875 if (Reg == FrameReg && RI.hasFP(MF))
1876 // It will be restored as part of the epilogue.
1877 continue;
18781868 BuildMI(MBB, MI, get(Opc), Reg);
18791869 }
18801870 return true;
0 ; Check that eh_return & unwind_init were properly lowered
1 ; RUN: llvm-as < %s | llc | grep %ebp | count 7
1 ; RUN: llvm-as < %s | llc | grep %ebp | count 9
22 ; RUN: llvm-as < %s | llc | grep %ecx | count 5
33
44 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
0 ; Check that eh_return & unwind_init were properly lowered
1 ; RUN: llvm-as < %s | llc | grep %rbp | count 5
1 ; RUN: llvm-as < %s | llc | grep %rbp | count 7
22 ; RUN: llvm-as < %s | llc | grep %rcx | count 3
33
44 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"