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[PowerPC][Altivec] Add vnot extended mnemonic Adds the vnot extended mnemonic for the vnor instruction. Committing on behalf of brunoalr (Bruno Rosa). Differential Revision: https://reviews.llvm.org/D29225 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294330 91177308-0d34-0410-b5e6-96231b3b80d8 Nemanja Ivanovic 3 years ago
3 changed file(s) with 24 addition(s) and 20 deletion(s). Raw diff Collapse all Expand all
852852
853853 // Extended mnemonics
854854 def : InstAlias<"vmr $vD, $vA", (VOR vrrc:$vD, vrrc:$vA, vrrc:$vA)>;
855 def : InstAlias<"vnot $vD, $vA", (VNOR vrrc:$vD, vrrc:$vA, vrrc:$vA)>;
855856
856857 // Loads.
857858 def : Pat<(v4i32 (load xoaddr:$src)), (LVX xoaddr:$src)>;
5353 }
5454 ; CHECK-LABEL: v16si8_cmp_ne:
5555 ; CHECK: vcmpequb [[RET:[0-9]+]], 2, 3
56 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
56 ; CHECK-NEXT: vnot 2, [[RET]]
5757
5858 define <16 x i8> @v16si8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
5959 entry:
6363 }
6464 ; CHECK-LABEL: v16si8_cmp_le:
6565 ; CHECK: vcmpgtsb [[RET:[0-9]+]], 2, 3
66 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
66 ; CHECK-NEXT: vnot 2, [[RET]]
6767
6868 define <16 x i8> @v16ui8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
6969 entry:
7373 }
7474 ; CHECK-LABEL: v16ui8_cmp_le:
7575 ; CHECK: vcmpgtub [[RET:[0-9]+]], 2, 3
76 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
76 ; CHECK-NEXT: vnot 2, [[RET]]
7777
7878 define <16 x i8> @v16si8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
7979 entry:
119119 }
120120 ; CHECK-LABEL: v16si8_cmp_ge:
121121 ; CHECK: vcmpgtsb [[RET:[0-9]+]], 3, 2
122 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
122 ; CHECK-NEXT: vnot 2, [[RET]]
123123
124124 define <16 x i8> @v16ui8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
125125 entry:
129129 }
130130 ; CHECK-LABEL: v16ui8_cmp_ge:
131131 ; CHECK: vcmpgtub [[RET:[0-9]+]], 3, 2
132 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
132 ; CHECK-NEXT: vnot 2, [[RET]]
133133
134134
135135 define <32 x i8> @v32si8_cmp(<32 x i8> %x, <32 x i8> %y) nounwind readnone {
179179 }
180180 ; CHECK-LABEL: v8si16_cmp_ne:
181181 ; CHECK: vcmpequh [[RET:[0-9]+]], 2, 3
182 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
182 ; CHECK-NEXT: vnot 2, [[RET]]
183183
184184 define <8 x i16> @v8si16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
185185 entry:
189189 }
190190 ; CHECK-LABEL: v8si16_cmp_le:
191191 ; CHECK: vcmpgtsh [[RET:[0-9]+]], 2, 3
192 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
192 ; CHECK-NEXT: vnot 2, [[RET]]
193193
194194 define <8 x i16> @v8ui16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
195195 entry:
199199 }
200200 ; CHECK-LABEL: v8ui16_cmp_le:
201201 ; CHECK: vcmpgtuh [[RET:[0-9]+]], 2, 3
202 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
202 ; CHECK-NEXT: vnot 2, [[RET]]
203203
204204 define <8 x i16> @v8si16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
205205 entry:
245245 }
246246 ; CHECK-LABEL: v8si16_cmp_ge:
247247 ; CHECK: vcmpgtsh [[RET:[0-9]+]], 3, 2
248 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
248 ; CHECK-NEXT: vnot 2, [[RET]]
249249
250250 define <8 x i16> @v8ui16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
251251 entry:
255255 }
256256 ; CHECK-LABEL: v8ui16_cmp_ge:
257257 ; CHECK: vcmpgtuh [[RET:[0-9]+]], 3, 2
258 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
258 ; CHECK-NEXT: vnot 2, [[RET]]
259259
260260
261261 define <16 x i16> @v16si16_cmp(<16 x i16> %x, <16 x i16> %y) nounwind readnone {
308308 }
309309 ; CHECK-LABEL: v4si32_cmp_ne:
310310 ; CHECK: vcmpequw [[RCMP:[0-9]+]], 2, 3
311 ; CHECK-NEXT: vnor 2, [[RCMP]], [[RCMP]]
311 ; CHECK-NEXT: vnot 2, [[RCMP]]
312312
313313 define <4 x i32> @v4si32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
314314 entry:
318318 }
319319 ; CHECK-LABEL: v4si32_cmp_le:
320320 ; CHECK: vcmpgtsw [[RET:[0-9]+]], 2, 3
321 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
321 ; CHECK-NEXT: vnot 2, [[RET]]
322322
323323 define <4 x i32> @v4ui32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
324324 entry:
328328 }
329329 ; CHECK-LABEL: v4ui32_cmp_le:
330330 ; CHECK: vcmpgtuw [[RET:[0-9]+]], 2, 3
331 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
331 ; CHECK-NEXT: vnot 2, [[RET]]
332332
333333 define <4 x i32> @v4si32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
334334 entry:
374374 }
375375 ; CHECK-LABEL: v4si32_cmp_ge:
376376 ; CHECK: vcmpgtsw [[RET:[0-9]+]], 3, 2
377 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
377 ; CHECK-NEXT: vnot 2, [[RET]]
378378
379379 define <4 x i32> @v4ui32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
380380 entry:
384384 }
385385 ; CHECK-LABEL: v4ui32_cmp_ge:
386386 ; CHECK: vcmpgtuw [[RET:[0-9]+]], 3, 2
387 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
387 ; CHECK-NEXT: vnot 2, [[RET]]
388388
389389
390390 define <8 x i32> @v8si32_cmp(<8 x i32> %x, <8 x i32> %y) nounwind readnone {
457457 }
458458 ; CHECK-LABEL: v4f32_cmp_ne:
459459 ; CHECK: vcmpeqfp [[RET:[0-9]+]], 2, 3
460 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
460 ; CHECK-NEXT: vnot 2, [[RET]]
461461
462462 define <4 x float> @v4f32_cmp_le(<4 x float> %x, <4 x float> %y) nounwind readnone {
463463 entry:
508508 }
509509 ; CHECK-LABEL: v4f32_cmp_ule:
510510 ; CHECK: vcmpgtfp [[RET:[0-9]+]], 2, 3
511 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
511 ; CHECK-NEXT: vnot 2, [[RET]]
512512
513513 define <4 x float> @v4f32_cmp_ult(<4 x float> %x, <4 x float> %y) nounwind readnone {
514514 entry:
519519 }
520520 ; CHECK-LABEL: v4f32_cmp_ult:
521521 ; CHECK: vcmpgefp [[RET:[0-9]+]], 2, 3
522 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
522 ; CHECK-NEXT: vnot 2, [[RET]]
523523
524524 define <4 x float> @v4f32_cmp_uge(<4 x float> %x, <4 x float> %y) nounwind readnone {
525525 entry:
530530 }
531531 ; CHECK-LABEL: v4f32_cmp_uge:
532532 ; CHECK: vcmpgtfp [[RET:[0-9]+]], 3, 2
533 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
533 ; CHECK-NEXT: vnot 2, [[RET]]
534534
535535 define <4 x float> @v4f32_cmp_ugt(<4 x float> %x, <4 x float> %y) nounwind readnone {
536536 entry:
541541 }
542542 ; CHECK-LABEL: v4f32_cmp_ugt:
543543 ; CHECK: vcmpgefp [[RET:[0-9]+]], 3, 2
544 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
544 ; CHECK-NEXT: vnot 2, [[RET]]
545545
546546
547547 define <8 x float> @v8f32_cmp(<8 x float> %x, <8 x float> %y) nounwind readnone {
549549 # CHECK-BE: vnor 2, 3, 4 # encoding: [0x10,0x43,0x25,0x04]
550550 # CHECK-LE: vnor 2, 3, 4 # encoding: [0x04,0x25,0x43,0x10]
551551 vnor 2, 3, 4
552 # CHECK-BE: vnot 2, 3 # encoding: [0x10,0x43,0x1d,0x04]
553 # CHECK-LE: vnot 2, 3 # encoding: [0x04,0x1d,0x43,0x10]
554 vnot 2, 3
552555 # CHECK-BE: vor 2, 3, 4 # encoding: [0x10,0x43,0x24,0x84]
553556 # CHECK-LE: vor 2, 3, 4 # encoding: [0x84,0x24,0x43,0x10]
554557 vor 2, 3, 4