llvm.org GIT mirror llvm / c3ee699
[SCEV] Add some extra tests for IndVarSimplifys loop exit values. NFC. Add some tests for various loops of the form: while(S >= 32) { S -= 32; something(); }; return S; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355389 91177308-0d34-0410-b5e6-96231b3b80d8 David Green 7 months ago
1 changed file(s) with 232 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
0 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1 ; RUN: opt -indvars -S < %s | FileCheck %s
2
3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
4
5 define i32 @remove_loop(i32 %size) {
6 ; CHECK-LABEL: @remove_loop(
7 ; CHECK-NEXT: entry:
8 ; CHECK-NEXT: [[TMP0:%.*]] = sub i32 -1, [[SIZE:%.*]]
9 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], -32
10 ; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 -32
11 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SIZE]], [[UMAX]]
12 ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 32
13 ; CHECK-NEXT: [[TMP4:%.*]] = lshr i32 [[TMP3]], 5
14 ; CHECK-NEXT: [[TMP5:%.*]] = shl i32 [[TMP4]], 5
15 ; CHECK-NEXT: br label [[WHILE_COND:%.*]]
16 ; CHECK: while.cond:
17 ; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ]
18 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SIZE_ADDR_0]], 31
19 ; CHECK-NEXT: [[SUB]] = add i32 [[SIZE_ADDR_0]], -32
20 ; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_COND]], label [[WHILE_END:%.*]]
21 ; CHECK: while.end:
22 ; CHECK-NEXT: [[TMP6:%.*]] = sub i32 [[SIZE]], [[TMP5]]
23 ; CHECK-NEXT: ret i32 [[TMP6]]
24 ;
25 entry:
26 br label %while.cond
27
28 while.cond: ; preds = %while.cond, %entry
29 %size.addr.0 = phi i32 [ %size, %entry ], [ %sub, %while.cond ]
30 %cmp = icmp ugt i32 %size.addr.0, 31
31 %sub = add i32 %size.addr.0, -32
32 br i1 %cmp, label %while.cond, label %while.end
33
34 while.end: ; preds = %while.cond
35 %size.lcssa = phi i32 [ %size.addr.0, %while.cond ]
36 ret i32 %size.lcssa
37 }
38
39 define i32 @used_loop(i32 %size) minsize {
40 ; CHECK-LABEL: @used_loop(
41 ; CHECK-NEXT: entry:
42 ; CHECK-NEXT: [[TMP0:%.*]] = sub i32 -1, [[SIZE:%.*]]
43 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], -32
44 ; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 -32
45 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SIZE]], [[UMAX]]
46 ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 32
47 ; CHECK-NEXT: [[TMP4:%.*]] = lshr i32 [[TMP3]], 5
48 ; CHECK-NEXT: [[TMP5:%.*]] = shl i32 [[TMP4]], 5
49 ; CHECK-NEXT: br label [[WHILE_COND:%.*]]
50 ; CHECK: while.cond:
51 ; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ]
52 ; CHECK-NEXT: tail call void @call()
53 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SIZE_ADDR_0]], 31
54 ; CHECK-NEXT: [[SUB]] = add i32 [[SIZE_ADDR_0]], -32
55 ; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_COND]], label [[WHILE_END:%.*]]
56 ; CHECK: while.end:
57 ; CHECK-NEXT: [[TMP6:%.*]] = sub i32 [[SIZE]], [[TMP5]]
58 ; CHECK-NEXT: ret i32 [[TMP6]]
59 ;
60 entry:
61 br label %while.cond
62
63 while.cond: ; preds = %while.cond, %entry
64 %size.addr.0 = phi i32 [ %size, %entry ], [ %sub, %while.cond ]
65 tail call void @call()
66 %cmp = icmp ugt i32 %size.addr.0, 31
67 %sub = add i32 %size.addr.0, -32
68 br i1 %cmp, label %while.cond, label %while.end
69
70 while.end: ; preds = %while.cond
71 %size.lcssa = phi i32 [ %size.addr.0, %while.cond ]
72 ret i32 %size.lcssa
73 }
74
75
76 define i32 @test_signed_while(i32 %S) {
77 ; CHECK-LABEL: @test_signed_while(
78 ; CHECK-NEXT: entry:
79 ; CHECK-NEXT: [[TMP0:%.*]] = sub i32 -1, [[S:%.*]]
80 ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], -32
81 ; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 -32
82 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[S]], [[SMAX]]
83 ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 32
84 ; CHECK-NEXT: [[TMP4:%.*]] = lshr i32 [[TMP3]], 5
85 ; CHECK-NEXT: [[TMP5:%.*]] = shl i32 [[TMP4]], 5
86 ; CHECK-NEXT: br label [[WHILE_COND:%.*]]
87 ; CHECK: while.cond:
88 ; CHECK-NEXT: [[S_ADDR_0:%.*]] = phi i32 [ [[S]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_BODY:%.*]] ]
89 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[S_ADDR_0]], 31
90 ; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[WHILE_END:%.*]]
91 ; CHECK: while.body:
92 ; CHECK-NEXT: [[SUB]] = add nsw i32 [[S_ADDR_0]], -32
93 ; CHECK-NEXT: tail call void @call()
94 ; CHECK-NEXT: br label [[WHILE_COND]]
95 ; CHECK: while.end:
96 ; CHECK-NEXT: [[TMP6:%.*]] = sub i32 [[S]], [[TMP5]]
97 ; CHECK-NEXT: ret i32 [[TMP6]]
98 ;
99 entry:
100 br label %while.cond
101
102 while.cond: ; preds = %while.body, %entry
103 %S.addr.0 = phi i32 [ %S, %entry ], [ %sub, %while.body ]
104 %cmp = icmp sgt i32 %S.addr.0, 31
105 br i1 %cmp, label %while.body, label %while.end
106
107 while.body: ; preds = %while.cond
108 %sub = add nsw i32 %S.addr.0, -32
109 tail call void @call()
110 br label %while.cond
111
112 while.end: ; preds = %while.cond
113 %S.addr.0.lcssa = phi i32 [ %S.addr.0, %while.cond ]
114 ret i32 %S.addr.0.lcssa
115 }
116
117 define i32 @test_signed_do(i32 %S) {
118 ; CHECK-LABEL: @test_signed_do(
119 ; CHECK-NEXT: entry:
120 ; CHECK-NEXT: [[TMP0:%.*]] = sub i32 15, [[S:%.*]]
121 ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], -16
122 ; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 -16
123 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[S]], [[SMAX]]
124 ; CHECK-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 4
125 ; CHECK-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 4
126 ; CHECK-NEXT: br label [[DO_BODY:%.*]]
127 ; CHECK: do.body:
128 ; CHECK-NEXT: [[S_ADDR_0:%.*]] = phi i32 [ [[S]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[DO_BODY]] ]
129 ; CHECK-NEXT: [[SUB]] = add nsw i32 [[S_ADDR_0]], -16
130 ; CHECK-NEXT: tail call void @call()
131 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[SUB]], 15
132 ; CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY]], label [[DO_END:%.*]]
133 ; CHECK: do.end:
134 ; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[S]], -16
135 ; CHECK-NEXT: [[TMP6:%.*]] = sub i32 [[TMP5]], [[TMP4]]
136 ; CHECK-NEXT: ret i32 [[TMP6]]
137 ;
138 entry:
139 br label %do.body
140
141 do.body: ; preds = %do.body, %entry
142 %S.addr.0 = phi i32 [ %S, %entry ], [ %sub, %do.body ]
143 %sub = add nsw i32 %S.addr.0, -16
144 tail call void @call()
145 %cmp = icmp sgt i32 %sub, 15
146 br i1 %cmp, label %do.body, label %do.end
147
148 do.end: ; preds = %do.body
149 %sub.lcssa = phi i32 [ %sub, %do.body ]
150 ret i32 %sub.lcssa
151 }
152
153 define i32 @test_unsigned_while(i32 %S) {
154 ; CHECK-LABEL: @test_unsigned_while(
155 ; CHECK-NEXT: entry:
156 ; CHECK-NEXT: [[TMP0:%.*]] = sub i32 -1, [[S:%.*]]
157 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], -16
158 ; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 -16
159 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[S]], [[UMAX]]
160 ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 16
161 ; CHECK-NEXT: [[TMP4:%.*]] = lshr i32 [[TMP3]], 4
162 ; CHECK-NEXT: [[TMP5:%.*]] = shl i32 [[TMP4]], 4
163 ; CHECK-NEXT: br label [[WHILE_COND:%.*]]
164 ; CHECK: while.cond:
165 ; CHECK-NEXT: [[S_ADDR_0:%.*]] = phi i32 [ [[S]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_BODY:%.*]] ]
166 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[S_ADDR_0]], 15
167 ; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[WHILE_END:%.*]]
168 ; CHECK: while.body:
169 ; CHECK-NEXT: [[SUB]] = add i32 [[S_ADDR_0]], -16
170 ; CHECK-NEXT: tail call void @call()
171 ; CHECK-NEXT: br label [[WHILE_COND]]
172 ; CHECK: while.end:
173 ; CHECK-NEXT: [[TMP6:%.*]] = sub i32 [[S]], [[TMP5]]
174 ; CHECK-NEXT: ret i32 [[TMP6]]
175 ;
176 entry:
177 br label %while.cond
178
179 while.cond: ; preds = %while.body, %entry
180 %S.addr.0 = phi i32 [ %S, %entry ], [ %sub, %while.body ]
181 %cmp = icmp ugt i32 %S.addr.0, 15
182 br i1 %cmp, label %while.body, label %while.end
183
184 while.body: ; preds = %while.cond
185 %sub = add i32 %S.addr.0, -16
186 tail call void @call()
187 br label %while.cond
188
189 while.end: ; preds = %while.cond
190 %S.addr.0.lcssa = phi i32 [ %S.addr.0, %while.cond ]
191 ret i32 %S.addr.0.lcssa
192 }
193
194 define i32 @test_unsigned_do(i32 %S) {
195 ; CHECK-LABEL: @test_unsigned_do(
196 ; CHECK-NEXT: entry:
197 ; CHECK-NEXT: [[TMP0:%.*]] = sub i32 15, [[S:%.*]]
198 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], -16
199 ; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 -16
200 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[S]], [[UMAX]]
201 ; CHECK-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 4
202 ; CHECK-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 4
203 ; CHECK-NEXT: br label [[DO_BODY:%.*]]
204 ; CHECK: do.body:
205 ; CHECK-NEXT: [[S_ADDR_0:%.*]] = phi i32 [ [[S]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[DO_BODY]] ]
206 ; CHECK-NEXT: [[SUB]] = add i32 [[S_ADDR_0]], -16
207 ; CHECK-NEXT: tail call void @call()
208 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SUB]], 15
209 ; CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY]], label [[DO_END:%.*]]
210 ; CHECK: do.end:
211 ; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[S]], -16
212 ; CHECK-NEXT: [[TMP6:%.*]] = sub i32 [[TMP5]], [[TMP4]]
213 ; CHECK-NEXT: ret i32 [[TMP6]]
214 ;
215 entry:
216 br label %do.body
217
218 do.body: ; preds = %do.body, %entry
219 %S.addr.0 = phi i32 [ %S, %entry ], [ %sub, %do.body ]
220 %sub = add i32 %S.addr.0, -16
221 tail call void @call()
222 %cmp = icmp ugt i32 %sub, 15
223 br i1 %cmp, label %do.body, label %do.end
224
225 do.end: ; preds = %do.body
226 %sub.lcssa = phi i32 [ %sub, %do.body ]
227 ret i32 %sub.lcssa
228 }
229
230
231 declare void @call()