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Revert r249123 - [mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend The author was not credited and most of the commit message is missing. Will re-commit with this fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249415 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 4 years ago
2 changed file(s) with 5 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
352352 defm FABS : ABSS_M<"abs.d", II_ABS, fabs>, ABSS_FM<0x5, 17>;
353353 defm FNEG : ABSS_M<"neg.d", II_NEG, fneg>, ABSS_FM<0x7, 17>;
354354
355 def FSQRT_S : MMRel, StdMMR6Rel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd,
356 II_SQRT_S, fsqrt>, ABSS_FM<0x4, 16>, ISA_MIPS2;
355 let AdditionalPredicates = [NotInMicroMips] in {
356 def FSQRT_S : MMRel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd, II_SQRT_S, fsqrt>,
357 ABSS_FM<0x4, 16>, ISA_MIPS2;
358 }
359
357360 defm FSQRT : ABSS_M<"sqrt.d", II_SQRT_D, fsqrt>, ABSS_FM<0x4, 17>, ISA_MIPS2;
358361
359362 // The odd-numbered registers are only referenced when doing loads,
+0
-13
test/CodeGen/Mips/llvm-ir/sqrt.ll less more
None ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
1 ; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
2 ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s
3
4 define float @sqrt_fn(float %value) #0 {
5 entry:
6 %sqrtf = tail call float @sqrtf(float %value) #0
7 ret float %sqrtf
8 }
9
10 declare float @sqrtf(float)
11
12 ; CHECK: sqrt.s $f0, $f12