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These tests used intrinsics with the wrong prototype. They weren't caught because the old verifier just checked that something "was a pointer", but not that the pointee was correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157544 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 8 years ago
4 changed file(s) with 28 addition(s) and 26 deletion(s). Raw diff Collapse all Expand all
7474 ret <8 x i8> %tmp5
7575 }
7676
77 define <4 x i16> @vld2dupi16(i16* %A) nounwind {
77 define <4 x i16> @vld2dupi16(i8* %A) nounwind {
7878 ;CHECK: vld2dupi16:
7979 ;Check that a power-of-two alignment smaller than the total size of the memory
8080 ;being loaded is ignored.
8181 ;CHECK: vld2.16 {d16[], d17[]}, [r0]
82 %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
82 %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
8383 %tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0
8484 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
8585 %tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1
9393 ;CHECK: vld2dupi16_update:
9494 ;CHECK: vld2.16 {d16[], d17[]}, [r1]!
9595 %A = load i16** %ptr
96 %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
96 %A2 = bitcast i16* %A to i8*
97 %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %A2, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
9798 %tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0
9899 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
99100 %tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1
104105 ret <4 x i16> %tmp5
105106 }
106107
107 define <2 x i32> @vld2dupi32(i32* %A) nounwind {
108 define <2 x i32> @vld2dupi32(i8* %A) nounwind {
108109 ;CHECK: vld2dupi32:
109110 ;Check the alignment value. Max for this instruction is 64 bits:
110111 ;CHECK: vld2.32 {d16[], d17[]}, [r0, :64]
111 %tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16)
112 %tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16)
112113 %tmp1 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 0
113114 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer
114115 %tmp3 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 1
118119 }
119120
120121 declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
121 declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
122 declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
122 declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
123 declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
123124
124125 %struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
125126 %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
143144 ret <8 x i8> %tmp8
144145 }
145146
146 define <4 x i16> @vld3dupi16(i16* %A) nounwind {
147 define <4 x i16> @vld3dupi16(i8* %A) nounwind {
147148 ;CHECK: vld3dupi16:
148149 ;Check the (default) alignment value. VLD3 does not support alignment.
149150 ;CHECK: vld3.16 {d16[], d17[], d18[]}, [r0]
150 %tmp0 = tail call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 8)
151 %tmp0 = tail call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 8)
151152 %tmp1 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 0
152153 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
153154 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 1
160161 }
161162
162163 declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
163 declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
164 declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
164165
165166 %struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
166167 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
170171 ;CHECK: vld4dupi16_update:
171172 ;CHECK: vld4.16 {d16[], d17[], d18[], d19[]}, [r1]!
172173 %A = load i16** %ptr
173 %tmp0 = tail call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 1)
174 %A2 = bitcast i16* %A to i8*
175 %tmp0 = tail call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %A2, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 1)
174176 %tmp1 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 0
175177 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
176178 %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 1
187189 ret <4 x i16> %tmp11
188190 }
189191
190 define <2 x i32> @vld4dupi32(i32* %A) nounwind {
192 define <2 x i32> @vld4dupi32(i8* %A) nounwind {
191193 ;CHECK: vld4dupi32:
192194 ;Check the alignment value. An 8-byte alignment is allowed here even though
193195 ;it is smaller than the total size of the memory being loaded.
194196 ;CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r0, :64]
195 %tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 8)
197 %tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 8)
196198 %tmp1 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 0
197199 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer
198200 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 1
207209 ret <2 x i32> %tmp11
208210 }
209211
210 declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
211 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
212 declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
213 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
44
55 define msp430_intrcc void @foo() nounwind {
66 entry:
7 %fa = call i16* @llvm.frameaddress(i32 0)
8 store i16 0, i16* %fa
7 %fa = call i8* @llvm.frameaddress(i32 0)
8 store i8 0, i8* %fa
99 ret void
1010 }
1111
12 declare i16* @llvm.frameaddress(i32)
12 declare i8* @llvm.frameaddress(i32)
0 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4a | FileCheck %s
11
2 define void @test1(float* %p, <4 x float> %a) nounwind optsize ssp {
2 define void @test1(i8* %p, <4 x float> %a) nounwind optsize ssp {
33 ; CHECK: movntss
44 entry:
5 tail call void @llvm.x86.sse4a.movnt.ss(float* %p, <4 x float> %a) nounwind
5 tail call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a) nounwind
66 ret void
77 }
88
9 declare void @llvm.x86.sse4a.movnt.ss(float*, <4 x float>)
9 declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>)
1010
11 define void @test2(double* %p, <2 x double> %a) nounwind optsize ssp {
11 define void @test2(i8* %p, <2 x double> %a) nounwind optsize ssp {
1212 ; CHECK: movntsd
1313 entry:
14 tail call void @llvm.x86.sse4a.movnt.sd(double* %p, <2 x double> %a) nounwind
14 tail call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a) nounwind
1515 ret void
1616 }
1717
18 declare void @llvm.x86.sse4a.movnt.sd(double*, <2 x double>)
18 declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>)
22
33 define void @x(i8* %a, i8* %src, i64 %len, i32 %align) nounwind {
44 entry:
5 tail call void @llvm.memcpy.i64( i8* %a, i8* %src, i64 %len, i32 %align) nounwind
5 tail call void @llvm.memcpy.p0i8.p0i8.i64( i8* %a, i8* %src, i64 %len, i32 %align, i1 false) nounwind
66 ret void
77 }
88
9 declare void @llvm.memcpy.i64( i8* %a, i8* %src, i64 %len, i32)
9 declare void @llvm.memcpy.p0i8.p0i8.i64( i8* %a, i8* %src, i64 %len, i32, i1)
1010