llvm.org GIT mirror llvm / c2b861d
Fix naming inconsistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32823 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 12 years ago
12 changed file(s) with 57 addition(s) and 57 deletion(s). Raw diff Collapse all Expand all
156156 return NULL;
157157 }
158158
159 const unsigned* ARMRegisterInfo::getCalleeSaveRegs() const {
160 static const unsigned CalleeSaveRegs[] = {
159 const unsigned* ARMRegisterInfo::getCalleeSavedRegs() const {
160 static const unsigned CalleeSavedRegs[] = {
161161 ARM::R4, ARM::R5, ARM::R6, ARM::R7,
162162 ARM::R8, ARM::R9, ARM::R10, ARM::R11,
163163 ARM::R14, 0
164164 };
165 return CalleeSaveRegs;
165 return CalleeSavedRegs;
166166 }
167167
168168 const TargetRegisterClass* const *
169 ARMRegisterInfo::getCalleeSaveRegClasses() const {
170 static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
169 ARMRegisterInfo::getCalleeSavedRegClasses() const {
170 static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
171171 &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass,
172172 &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass,
173173 &ARM::IntRegsRegClass, 0
174174 };
175 return CalleeSaveRegClasses;
175 return CalleeSavedRegClasses;
176176 }
177177
178178 void ARMRegisterInfo::
4646 unsigned OpNum,
4747 int FrameIndex) const;
4848
49 const unsigned *getCalleeSaveRegs() const;
49 const unsigned *getCalleeSavedRegs() const;
5050
51 const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
51 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
5252
5353 void eliminateCallFramePseudoInstr(MachineFunction &MF,
5454 MachineBasicBlock &MBB,
150150 }
151151 }
152152
153 const unsigned* AlphaRegisterInfo::getCalleeSaveRegs() const {
154 static const unsigned CalleeSaveRegs[] = {
153 const unsigned* AlphaRegisterInfo::getCalleeSavedRegs() const {
154 static const unsigned CalleeSavedRegs[] = {
155155 Alpha::R9, Alpha::R10,
156156 Alpha::R11, Alpha::R12,
157157 Alpha::R13, Alpha::R14,
160160 Alpha::F6, Alpha::F7,
161161 Alpha::F8, Alpha::F9, 0
162162 };
163 return CalleeSaveRegs;
163 return CalleeSavedRegs;
164164 }
165165
166166 const TargetRegisterClass* const*
167 AlphaRegisterInfo::getCalleeSaveRegClasses() const {
168 static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
167 AlphaRegisterInfo::getCalleeSavedRegClasses() const {
168 static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
169169 &Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
170170 &Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
171171 &Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
174174 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass,
175175 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass, 0
176176 };
177 return CalleeSaveRegClasses;
177 return CalleeSavedRegClasses;
178178 }
179179
180180 //===----------------------------------------------------------------------===//
4444 unsigned DestReg, unsigned SrcReg,
4545 const TargetRegisterClass *RC) const;
4646
47 const unsigned *getCalleeSaveRegs() const;
47 const unsigned *getCalleeSavedRegs() const;
4848
49 const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
49 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
5050
5151 void eliminateCallFramePseudoInstr(MachineFunction &MF,
5252 MachineBasicBlock &MBB,
9090 BuildMI(MBB, MI, TII.get(IA64::MOV), DestReg).addReg(SrcReg);
9191 }
9292
93 const unsigned* IA64RegisterInfo::getCalleeSaveRegs() const {
94 static const unsigned CalleeSaveRegs[] = {
93 const unsigned* IA64RegisterInfo::getCalleeSavedRegs() const {
94 static const unsigned CalleeSavedRegs[] = {
9595 IA64::r5, 0
9696 };
97 return CalleeSaveRegs;
97 return CalleeSavedRegs;
9898 }
9999
100100 const TargetRegisterClass* const*
101 IA64RegisterInfo::getCalleeSaveRegClasses() const {
102 static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
101 IA64RegisterInfo::getCalleeSavedRegClasses() const {
102 static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
103103 &IA64::GRRegClass, 0
104104 };
105 return CalleeSaveRegClasses;
105 return CalleeSavedRegClasses;
106106 }
107107
108108 //===----------------------------------------------------------------------===//
4343 unsigned DestReg, unsigned SrcReg,
4444 const TargetRegisterClass *RC) const;
4545
46 const unsigned *getCalleeSaveRegs() const;
46 const unsigned *getCalleeSavedRegs() const;
4747
48 const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
48 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
4949
5050 void eliminateCallFramePseudoInstr(MachineFunction &MF,
5151 MachineBasicBlock &MBB,
237237 }
238238 }
239239
240 const unsigned* PPCRegisterInfo::getCalleeSaveRegs() const {
240 const unsigned* PPCRegisterInfo::getCalleeSavedRegs() const {
241241 // 32-bit Darwin calling convention.
242 static const unsigned Darwin32_CalleeSaveRegs[] = {
242 static const unsigned Darwin32_CalleeSavedRegs[] = {
243243 PPC::R13, PPC::R14, PPC::R15,
244244 PPC::R16, PPC::R17, PPC::R18, PPC::R19,
245245 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
260260 PPC::LR, 0
261261 };
262262 // 64-bit Darwin calling convention.
263 static const unsigned Darwin64_CalleeSaveRegs[] = {
263 static const unsigned Darwin64_CalleeSavedRegs[] = {
264264 PPC::X14, PPC::X15,
265265 PPC::X16, PPC::X17, PPC::X18, PPC::X19,
266266 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
281281 PPC::LR8, 0
282282 };
283283
284 return Subtarget.isPPC64() ? Darwin64_CalleeSaveRegs :
285 Darwin32_CalleeSaveRegs;
284 return Subtarget.isPPC64() ? Darwin64_CalleeSavedRegs :
285 Darwin32_CalleeSavedRegs;
286286 }
287287
288288 const TargetRegisterClass* const*
289 PPCRegisterInfo::getCalleeSaveRegClasses() const {
289 PPCRegisterInfo::getCalleeSavedRegClasses() const {
290290 // 32-bit Darwin calling convention.
291 static const TargetRegisterClass * const Darwin32_CalleeSaveRegClasses[] = {
291 static const TargetRegisterClass * const Darwin32_CalleeSavedRegClasses[] = {
292292 &PPC::GPRCRegClass,&PPC::GPRCRegClass,&PPC::GPRCRegClass,
293293 &PPC::GPRCRegClass,&PPC::GPRCRegClass,&PPC::GPRCRegClass,&PPC::GPRCRegClass,
294294 &PPC::GPRCRegClass,&PPC::GPRCRegClass,&PPC::GPRCRegClass,&PPC::GPRCRegClass,
311311 };
312312
313313 // 64-bit Darwin calling convention.
314 static const TargetRegisterClass * const Darwin64_CalleeSaveRegClasses[] = {
314 static const TargetRegisterClass * const Darwin64_CalleeSavedRegClasses[] = {
315315 &PPC::G8RCRegClass,&PPC::G8RCRegClass,
316316 &PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
317317 &PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
333333 &PPC::G8RCRegClass, 0
334334 };
335335
336 return Subtarget.isPPC64() ? Darwin64_CalleeSaveRegClasses :
337 Darwin32_CalleeSaveRegClasses;
336 return Subtarget.isPPC64() ? Darwin64_CalleeSavedRegClasses :
337 Darwin32_CalleeSavedRegClasses;
338338 }
339339
340340 /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
5353 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
5454 int FrameIndex) const;
5555
56 const unsigned *getCalleeSaveRegs() const;
56 const unsigned *getCalleeSavedRegs() const;
5757
58 const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
58 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
5959
6060 void eliminateCallFramePseudoInstr(MachineFunction &MF,
6161 MachineBasicBlock &MBB,
110110 return NewMI;
111111 }
112112
113 const unsigned* SparcRegisterInfo::getCalleeSaveRegs() const {
114 static const unsigned CalleeSaveRegs[] = { 0 };
115 return CalleeSaveRegs;
113 const unsigned* SparcRegisterInfo::getCalleeSavedRegs() const {
114 static const unsigned CalleeSavedRegs[] = { 0 };
115 return CalleeSavedRegs;
116116 }
117117
118118 const TargetRegisterClass* const*
119 SparcRegisterInfo::getCalleeSaveRegClasses() const {
120 static const TargetRegisterClass * const CalleeSaveRegClasses[] = { 0 };
121 return CalleeSaveRegClasses;
119 SparcRegisterInfo::getCalleeSavedRegClasses() const {
120 static const TargetRegisterClass * const CalleeSavedRegClasses[] = { 0 };
121 return CalleeSavedRegClasses;
122122 }
123123
124124
4747 unsigned OpNum,
4848 int FrameIndex) const;
4949
50 const unsigned *getCalleeSaveRegs() const;
50 const unsigned *getCalleeSavedRegs() const;
5151
52 const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
52 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
5353
5454 void eliminateCallFramePseudoInstr(MachineFunction &MF,
5555 MachineBasicBlock &MBB,
852852 }
853853
854854
855 const unsigned *X86RegisterInfo::getCalleeSaveRegs() const {
856 static const unsigned CalleeSaveRegs32Bit[] = {
855 const unsigned *X86RegisterInfo::getCalleeSavedRegs() const {
856 static const unsigned CalleeSavedRegs32Bit[] = {
857857 X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0
858858 };
859 static const unsigned CalleeSaveRegs64Bit[] = {
859 static const unsigned CalleeSavedRegs64Bit[] = {
860860 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0
861861 };
862862
863 return Is64Bit ? CalleeSaveRegs64Bit : CalleeSaveRegs32Bit;
863 return Is64Bit ? CalleeSavedRegs64Bit : CalleeSavedRegs32Bit;
864864 }
865865
866866 const TargetRegisterClass* const*
867 X86RegisterInfo::getCalleeSaveRegClasses() const {
868 static const TargetRegisterClass * const CalleeSaveRegClasses32Bit[] = {
867 X86RegisterInfo::getCalleeSavedRegClasses() const {
868 static const TargetRegisterClass * const CalleeSavedRegClasses32Bit[] = {
869869 &X86::GR32RegClass, &X86::GR32RegClass,
870870 &X86::GR32RegClass, &X86::GR32RegClass, 0
871871 };
872 static const TargetRegisterClass * const CalleeSaveRegClasses64Bit[] = {
872 static const TargetRegisterClass * const CalleeSavedRegClasses64Bit[] = {
873873 &X86::GR64RegClass, &X86::GR64RegClass,
874874 &X86::GR64RegClass, &X86::GR64RegClass,
875875 &X86::GR64RegClass, &X86::GR64RegClass, 0
876876 };
877877
878 return Is64Bit ? CalleeSaveRegClasses64Bit : CalleeSaveRegClasses32Bit;
878 return Is64Bit ? CalleeSavedRegClasses64Bit : CalleeSavedRegClasses32Bit;
879879 }
880880
881881 //===----------------------------------------------------------------------===//
6868 unsigned OpNum,
6969 int FrameIndex) const;
7070
71 /// getCalleeSaveRegs - Return a null-terminated list of all of the
71 /// getCalleeSavedRegs - Return a null-terminated list of all of the
7272 /// callee-save registers on this target.
73 const unsigned *getCalleeSaveRegs() const;
73 const unsigned *getCalleeSavedRegs() const;
7474
75 /// getCalleeSaveRegClasses - Return a null-terminated list of the preferred
75 /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
7676 /// register classes to spill each callee-saved register with. The order and
77 /// length of this list match the getCalleeSaveRegs() list.
78 const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
77 /// length of this list match the getCalleeSavedRegs() list.
78 const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
7979
8080 void eliminateCallFramePseudoInstr(MachineFunction &MF,
8181 MachineBasicBlock &MBB,