llvm.org GIT mirror llvm / c249168
MIR Serialization: Serialize the sub register indices. This commit serializes the sub register indices from the register machine operands. Reviewers: Duncan P. N. Exon Smith git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242084 91177308-0d34-0410-b5e6-96231b3b80d8 Alex Lorenz 5 years ago
7 changed file(s) with 146 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
178178 return MIToken::comma;
179179 case '=':
180180 return MIToken::equal;
181 case ':':
182 return MIToken::colon;
181183 default:
182184 return MIToken::Error;
183185 }
3434 comma,
3535 equal,
3636 underscore,
37 colon,
3738
3839 // Keywords
3940 kw_implicit,
5555 StringMap Names2Regs;
5656 /// Maps from register mask names to register masks.
5757 StringMap Names2RegMasks;
58 /// Maps from subregister names to subregister indices.
59 StringMap Names2SubRegIndices;
5860
5961 public:
6062 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
7880
7981 bool parseRegister(unsigned &Reg);
8082 bool parseRegisterFlag(unsigned &Flags);
83 bool parseSubRegisterIndex(unsigned &SubReg);
8184 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
8285 bool parseImmediateOperand(MachineOperand &Dest);
8386 bool parseMBBReference(MachineBasicBlock *&MBB);
114117 ///
115118 /// Return null if the identifier isn't a register mask.
116119 const uint32_t *getRegMask(StringRef Identifier);
120
121 void initNames2SubRegIndices();
122
123 /// Check if the given identifier is a name of a subregister index.
124 ///
125 /// Return 0 if the name isn't a subregister index class.
126 unsigned getSubRegIndex(StringRef Name);
117127 };
118128
119129 } // end anonymous namespace
331341 return false;
332342 }
333343
344 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
345 assert(Token.is(MIToken::colon));
346 lex();
347 if (Token.isNot(MIToken::Identifier))
348 return error("expected a subregister index after ':'");
349 auto Name = Token.stringValue();
350 SubReg = getSubRegIndex(Name);
351 if (!SubReg)
352 return error(Twine("use of unknown subregister index '") + Name + "'");
353 lex();
354 return false;
355 }
356
334357 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
335358 unsigned Reg;
336359 unsigned Flags = IsDef ? RegState::Define : 0;
343366 if (parseRegister(Reg))
344367 return true;
345368 lex();
346 // TODO: Parse subregister.
369 unsigned SubReg = 0;
370 if (Token.is(MIToken::colon)) {
371 if (parseSubRegisterIndex(SubReg))
372 return true;
373 }
347374 Dest = MachineOperand::CreateReg(
348375 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
349 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef);
376 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
377 /*isEarlyClobber=*/false, SubReg);
350378 return false;
351379 }
352380
524552 return RegMaskInfo->getValue();
525553 }
526554
555 void MIParser::initNames2SubRegIndices() {
556 if (!Names2SubRegIndices.empty())
557 return;
558 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
559 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
560 Names2SubRegIndices.insert(
561 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
562 }
563
564 unsigned MIParser::getSubRegIndex(StringRef Name) {
565 initNames2SubRegIndices();
566 auto SubRegInfo = Names2SubRegIndices.find(Name);
567 if (SubRegInfo == Names2SubRegIndices.end())
568 return 0;
569 return SubRegInfo->getValue();
570 }
571
527572 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM,
528573 MachineFunction &MF, StringRef Src,
529574 const PerFunctionMIParsingState &PFS,
302302 if (Op.isUndef())
303303 OS << "undef ";
304304 printReg(Op.getReg(), OS, TRI);
305 // TODO: Print sub register.
305 // Print the sub register.
306 if (Op.getSubReg() != 0)
307 OS << ':' << TRI->getSubRegIndexName(Op.getSubReg());
306308 break;
307309 case MachineOperand::MO_Immediate:
308310 OS << Op.getImm();
0 # RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
1
2 --- |
3
4 define zeroext i1 @t(i1 %c) {
5 entry:
6 ret i1 %c
7 }
8
9 ...
10 ---
11 name: t
12 isSSA: true
13 tracksRegLiveness: true
14 registers:
15 - { id: 0, class: gr32 }
16 - { id: 1, class: gr8 }
17 - { id: 2, class: gr8 }
18 body:
19 - name: entry
20 id: 0
21 instructions:
22 - '%0 = COPY %edi'
23 # CHECK: [[@LINE+1]]:25: expected a subregister index after ':'
24 - '%1 = COPY %0 : 42'
25 - '%2 = AND8ri %1, 1, implicit-def %eflags'
26 - '%al = COPY %2'
27 - 'RETQ %al'
28 ...
0 # RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
1 # This test ensures that the MIR parser parses subregisters in register operands
2 # correctly.
3
4 --- |
5
6 define zeroext i1 @t(i1 %c) {
7 entry:
8 ret i1 %c
9 }
10
11 ...
12 ---
13 name: t
14 isSSA: true
15 tracksRegLiveness: true
16 registers:
17 - { id: 0, class: gr32 }
18 - { id: 1, class: gr8 }
19 - { id: 2, class: gr8 }
20 body:
21 - name: entry
22 id: 0
23 instructions:
24 # CHECK: %0 = COPY %edi
25 # CHECK-NEXT: %1 = COPY %0:sub_8bit
26 - '%0 = COPY %edi'
27 - '%1 = COPY %0:sub_8bit'
28 - '%2 = AND8ri %1, 1, implicit-def %eflags'
29 - '%al = COPY %2'
30 - 'RETQ %al'
31 ...
32
0 # RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
1 # This test ensures that an error is reported when an unknown subregister index
2 # is encountered.
3
4 --- |
5
6 define zeroext i1 @t(i1 %c) {
7 entry:
8 ret i1 %c
9 }
10
11 ...
12 ---
13 name: t
14 isSSA: true
15 tracksRegLiveness: true
16 registers:
17 - { id: 0, class: gr32 }
18 - { id: 1, class: gr8 }
19 - { id: 2, class: gr8 }
20 body:
21 - name: entry
22 id: 0
23 instructions:
24 - '%0 = COPY %edi'
25 # CHECK: [[@LINE+1]]:23: use of unknown subregister index 'bit8'
26 - '%1 = COPY %0:bit8'
27 - '%2 = AND8ri %1, 1, implicit-def %eflags'
28 - '%al = COPY %2'
29 - 'RETQ %al'
30 ...