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llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8 Torok Edwin 10 years ago
172 changed file(s) with 816 addition(s) and 815 deletion(s). Raw diff Collapse all Expand all
583583 case scCouldNotCompute:
584584 return ((SC*)this)->visitCouldNotCompute((const SCEVCouldNotCompute*)S);
585585 default:
586 LLVM_UNREACHABLE("Unknown SCEV type!");
586 llvm_unreachable("Unknown SCEV type!");
587587 }
588588 }
589589
590590 RetVal visitCouldNotCompute(const SCEVCouldNotCompute *S) {
591 LLVM_UNREACHABLE("Invalid use of SCEVCouldNotCompute!");
591 llvm_unreachable("Invalid use of SCEVCouldNotCompute!");
592592 return RetVal();
593593 }
594594 };
119119
120120 virtual void destroyConstant();
121121 virtual void replaceUsesOfWithOnConstant(Value *From, Value *To, Use *U) {
122 LLVM_UNREACHABLE("This should never be called because MDNodes have no ops");
122 llvm_unreachable("This should never be called because MDNodes have no ops");
123123 }
124124
125125 /// Methods for support type inquiry through isa, cast, and dyn_cast:
4646 void llvm_report_error(const std::string &reason) NORETURN;
4747
4848 /// This function calls abort(), and prints the optional message to stderr.
49 /// Call this instead of assert(0), so that compiler knows the path is not
50 /// reachable even for NDEBUG builds.
51 /// Use the LLVM_UNREACHABLE macro instead that adds location info.
52 void llvm_unreachable(const char *msg=0, const char *file=0,
53 unsigned line=0) NORETURN;
49 /// Use the llvm_unreachable macro (that adds location info), instead of
50 /// calling this function directly.
51 void llvm_unreachable_internal(const char *msg=0, const char *file=0,
52 unsigned line=0) NORETURN;
5453 }
5554
56 /// Macro that calls llvm_unreachable with location info and message in
57 /// debug mode. In NDEBUG mode it calls llvm_unreachable with no message.
55 /// Prints the message and location info to stderr in !NDEBUG builds.
56 /// In NDEBUG mode it only prints "UNREACHABLE executed".
57 /// Use this instead of assert(0), so that the compiler knows this path
58 /// is not reachable even for NDEBUG builds.
5859 #ifndef NDEBUG
59 #define LLVM_UNREACHABLE(msg) llvm_unreachable(msg, __FILE__, __LINE__)
60 #define llvm_unreachable(msg) llvm_unreachable_internal(msg, __FILE__, __LINE__)
6061 #else
61 #define LLVM_UNREACHABLE(msg) llvm_unreachable()
62 #define llvm_unreachable(msg) llvm_unreachable_internal()
6263 #endif
6364
6465 #endif
113113 //
114114 RetTy visit(Instruction &I) {
115115 switch (I.getOpcode()) {
116 default: LLVM_UNREACHABLE("Unknown instruction type encountered!");
116 default: llvm_unreachable("Unknown instruction type encountered!");
117117 // Build the switch statement using the Instruction.def file...
118118 #define HANDLE_INST(NUM, OPCODE, CLASS) \
119119 case Instruction::OPCODE: return \
6767 if (findOption(P->getPassArgument()) != getNumOptions()) {
6868 cerr << "Two passes with the same argument (-"
6969 << P->getPassArgument() << ") attempted to be registered!\n";
70 LLVM_UNREACHABLE(0);
70 llvm_unreachable(0);
7171 }
7272 addLiteralOption(P->getPassArgument(), P, P->getPassName());
7373 }
428428 /// point.
429429 virtual void insertNoop(MachineBasicBlock &MBB,
430430 MachineBasicBlock::iterator MI) const {
431 LLVM_UNREACHABLE("Target didn't implement insertNoop!");
431 llvm_unreachable("Target didn't implement insertNoop!");
432432 }
433433
434434 /// isPredicated - Returns true if the instruction is already predicated.
131131
132132 const char *AliasString;
133133 switch (R) {
134 default: LLVM_UNREACHABLE("Unknown alias type!");
134 default: llvm_unreachable("Unknown alias type!");
135135 case NoAlias: No++; AliasString = "No alias"; break;
136136 case MayAlias: May++; AliasString = "May alias"; break;
137137 case MustAlias: Must++; AliasString = "Must alias"; break;
156156
157157 const char *MRString;
158158 switch (R) {
159 default: LLVM_UNREACHABLE("Unknown mod/ref type!");
159 default: llvm_unreachable("Unknown mod/ref type!");
160160 case NoModRef: NoMR++; MRString = "NoModRef"; break;
161161 case Ref: JustRef++; MRString = "JustRef"; break;
162162 case Mod: JustMod++; MRString = "JustMod"; break;
539539 case Refs : OS << "Ref "; break;
540540 case Mods : OS << "Mod "; break;
541541 case ModRef : OS << "Mod/Ref "; break;
542 default: LLVM_UNREACHABLE("Bad value for AccessTy!");
542 default: llvm_unreachable("Bad value for AccessTy!");
543543 }
544544 if (isVolatile()) OS << "[volatile] ";
545545 if (Forward)
157157
158158 virtual void getArgumentAccesses(Function *F, CallSite CS,
159159 std::vector &Info) {
160 LLVM_UNREACHABLE("This method may not be called on this function!");
160 llvm_unreachable("This method may not be called on this function!");
161161 }
162162
163163 virtual void getMustAliases(Value *P, std::vector &RetVals) { }
365365 return 0;
366366 case Instruction::ICmp:
367367 case Instruction::FCmp:
368 LLVM_UNREACHABLE("This function is invalid for compares: no predicate specified");
368 llvm_unreachable("This function is invalid for compares: no predicate specified");
369369 case Instruction::PtrToInt:
370370 // If the input is a inttoptr, eliminate the pair. This requires knowing
371371 // the width of a pointer, so it can't be done in ConstantExpr::getCast.
690690 return Context->getConstantFP(APFloat((float)V));
691691 if (Ty == Type::DoubleTy)
692692 return Context->getConstantFP(APFloat(V));
693 LLVM_UNREACHABLE("Can only constant fold float/double");
693 llvm_unreachable("Can only constant fold float/double");
694694 return 0; // dummy return to suppress warning
695695 }
696696
709709 return Context->getConstantFP(APFloat((float)V));
710710 if (Ty == Type::DoubleTy)
711711 return Context->getConstantFP(APFloat(V));
712 LLVM_UNREACHABLE("Can only constant fold float/double");
712 llvm_unreachable("Can only constant fold float/double");
713713 return 0; // dummy return to suppress warning
714714 }
715715
507507 #ifndef NDEBUG
508508 V->dump();
509509 #endif
510 LLVM_UNREACHABLE("Value does not have a node in the points-to graph!");
510 llvm_unreachable("Value does not have a node in the points-to graph!");
511511 }
512512 return I->second;
513513 }
826826 return getNodeForConstantPointer(CE->getOperand(0));
827827 default:
828828 cerr << "Constant Expr not yet handled: " << *CE << "\n";
829 llvm_unreachable();
829 llvm_unreachable(0);
830830 }
831831 } else {
832 LLVM_UNREACHABLE("Unknown constant pointer!");
832 llvm_unreachable("Unknown constant pointer!");
833833 }
834834 return 0;
835835 }
853853 return getNodeForConstantPointerTarget(CE->getOperand(0));
854854 default:
855855 cerr << "Constant Expr not yet handled: " << *CE << "\n";
856 llvm_unreachable();
856 llvm_unreachable(0);
857857 }
858858 } else {
859 LLVM_UNREACHABLE("Unknown constant pointer!");
859 llvm_unreachable("Unknown constant pointer!");
860860 }
861861 return 0;
862862 }
11531153 default:
11541154 // Is this something we aren't handling yet?
11551155 cerr << "Unknown instruction: " << I;
1156 llvm_unreachable();
1156 llvm_unreachable(0);
11571157 }
11581158 }
11591159
12431243 }
12441244
12451245 void Andersens::visitVAArg(VAArgInst &I) {
1246 LLVM_UNREACHABLE("vaarg not handled yet!");
1246 llvm_unreachable("vaarg not handled yet!");
12471247 }
12481248
12491249 /// AddConstraintsForCall - Add constraints for a call with actual arguments
4747
4848 void visitInstruction(Instruction &I) {
4949 cerr << "Instruction Count does not know about " << I;
50 llvm_unreachable();
50 llvm_unreachable(0);
5151 }
5252 public:
5353 static char ID; // Pass identification, replacement for typeid
6363 return i->getPointerOperand();
6464 if (StoreInst *i = dyn_cast(I))
6565 return i->getPointerOperand();
66 LLVM_UNREACHABLE("Value is no load or store instruction!");
66 llvm_unreachable("Value is no load or store instruction!");
6767 // Never reached.
6868 return 0;
6969 }
147147 SCEV(FoldingSetNodeID(), scCouldNotCompute) {}
148148
149149 bool SCEVCouldNotCompute::isLoopInvariant(const Loop *L) const {
150 LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
150 llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!");
151151 return false;
152152 }
153153
154154 const Type *SCEVCouldNotCompute::getType() const {
155 LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
155 llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!");
156156 return 0;
157157 }
158158
159159 bool SCEVCouldNotCompute::hasComputableLoopEvolution(const Loop *L) const {
160 LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
160 llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!");
161161 return false;
162162 }
163163
284284 else if (isa(this))
285285 return SE.getUMaxExpr(NewOps);
286286 else
287 LLVM_UNREACHABLE("Unknown commutative expr!");
287 llvm_unreachable("Unknown commutative expr!");
288288 }
289289 }
290290 return this;
505505 return operator()(LC->getOperand(), RC->getOperand());
506506 }
507507
508 LLVM_UNREACHABLE("Unknown SCEV kind!");
508 llvm_unreachable("Unknown SCEV kind!");
509509 return false;
510510 }
511511 };
34743474 if (Idx >= ATy->getNumElements()) return 0; // Bogus program
34753475 Init = Context->getNullValue(ATy->getElementType());
34763476 } else {
3477 LLVM_UNREACHABLE("Unknown constant aggregate type!");
3477 llvm_unreachable("Unknown constant aggregate type!");
34783478 }
34793479 return 0;
34803480 } else {
38843884 return getSMaxExpr(NewOps);
38853885 if (isa(Comm))
38863886 return getUMaxExpr(NewOps);
3887 LLVM_UNREACHABLE("Unknown commutative SCEV type!");
3887 llvm_unreachable("Unknown commutative SCEV type!");
38883888 }
38893889 }
38903890 // If we got here, all operands are loop invariant.
39353935 return getTruncateExpr(Op, Cast->getType());
39363936 }
39373937
3938 LLVM_UNREACHABLE("Unknown SCEV type!");
3938 llvm_unreachable("Unknown SCEV type!");
39393939 return 0;
39403940 }
39413941
699699
700700 uint64_t Pair[2];
701701 switch (Kind) {
702 default: LLVM_UNREACHABLE("Unknown kind!");
702 default: llvm_unreachable("Unknown kind!");
703703 case 'K':
704704 // F80HexFPConstant - x87 long double in hexadecimal format (10 bytes)
705705 FP80HexToIntPair(TokStart+3, CurPtr, Pair);
20402040 return Error(ID.Loc, "functions are not values, refer to them as pointers");
20412041
20422042 switch (ID.Kind) {
2043 default: LLVM_UNREACHABLE("Unknown ValID!");
2043 default: llvm_unreachable("Unknown ValID!");
20442044 case ValID::t_LocalID:
20452045 case ValID::t_LocalName:
20462046 return Error(ID.Loc, "invalid use of function-local name");
28352835
28362836 bool Valid;
28372837 switch (OperandType) {
2838 default: LLVM_UNREACHABLE("Unknown operand type!");
2838 default: llvm_unreachable("Unknown operand type!");
28392839 case 0: // int or FP.
28402840 Valid = LHS->getType()->isIntOrIntVector() ||
28412841 LHS->getType()->isFPOrFPVector();
5858
5959 static unsigned GetEncodedCastOpcode(unsigned Opcode) {
6060 switch (Opcode) {
61 default: LLVM_UNREACHABLE("Unknown cast instruction!");
61 default: llvm_unreachable("Unknown cast instruction!");
6262 case Instruction::Trunc : return bitc::CAST_TRUNC;
6363 case Instruction::ZExt : return bitc::CAST_ZEXT;
6464 case Instruction::SExt : return bitc::CAST_SEXT;
7676
7777 static unsigned GetEncodedBinaryOpcode(unsigned Opcode) {
7878 switch (Opcode) {
79 default: LLVM_UNREACHABLE("Unknown binary instruction!");
79 default: llvm_unreachable("Unknown binary instruction!");
8080 case Instruction::Add:
8181 case Instruction::FAdd: return bitc::BINOP_ADD;
8282 case Instruction::Sub:
200200 unsigned Code = 0;
201201
202202 switch (T->getTypeID()) {
203 default: LLVM_UNREACHABLE("Unknown type!");
203 default: llvm_unreachable("Unknown type!");
204204 case Type::VoidTyID: Code = bitc::TYPE_CODE_VOID; break;
205205 case Type::FloatTyID: Code = bitc::TYPE_CODE_FLOAT; break;
206206 case Type::DoubleTyID: Code = bitc::TYPE_CODE_DOUBLE; break;
278278
279279 static unsigned getEncodedLinkage(const GlobalValue *GV) {
280280 switch (GV->getLinkage()) {
281 default: LLVM_UNREACHABLE("Invalid linkage!");
281 default: llvm_unreachable("Invalid linkage!");
282282 case GlobalValue::GhostLinkage: // Map ghost linkage onto external.
283283 case GlobalValue::ExternalLinkage: return 0;
284284 case GlobalValue::WeakAnyLinkage: return 1;
298298
299299 static unsigned getEncodedVisibility(const GlobalValue *GV) {
300300 switch (GV->getVisibility()) {
301 default: LLVM_UNREACHABLE("Invalid visibility!");
301 default: llvm_unreachable("Invalid visibility!");
302302 case GlobalValue::DefaultVisibility: return 0;
303303 case GlobalValue::HiddenVisibility: return 1;
304304 case GlobalValue::ProtectedVisibility: return 2;
712712 }
713713 }
714714 } else {
715 LLVM_UNREACHABLE("Unknown constant!");
715 llvm_unreachable("Unknown constant!");
716716 }
717717 Stream.EmitRecord(Code, Record, AbbrevToUse);
718718 Record.clear();
11261126 Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8));
11271127 if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
11281128 Abbv) != VST_ENTRY_8_ABBREV)
1129 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1129 llvm_unreachable("Unexpected abbrev ordering!");
11301130 }
11311131
11321132 { // 7-bit fixed width VST_ENTRY strings.
11371137 Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 7));
11381138 if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
11391139 Abbv) != VST_ENTRY_7_ABBREV)
1140 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1140 llvm_unreachable("Unexpected abbrev ordering!");
11411141 }
11421142 { // 6-bit char6 VST_ENTRY strings.
11431143 BitCodeAbbrev *Abbv = new BitCodeAbbrev();
11471147 Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6));
11481148 if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
11491149 Abbv) != VST_ENTRY_6_ABBREV)
1150 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1150 llvm_unreachable("Unexpected abbrev ordering!");
11511151 }
11521152 { // 6-bit char6 VST_BBENTRY strings.
11531153 BitCodeAbbrev *Abbv = new BitCodeAbbrev();
11571157 Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6));
11581158 if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
11591159 Abbv) != VST_BBENTRY_6_ABBREV)
1160 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1160 llvm_unreachable("Unexpected abbrev ordering!");
11611161 }
11621162
11631163
11691169 Log2_32_Ceil(VE.getTypes().size()+1)));
11701170 if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
11711171 Abbv) != CONSTANTS_SETTYPE_ABBREV)
1172 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1172 llvm_unreachable("Unexpected abbrev ordering!");
11731173 }
11741174
11751175 { // INTEGER abbrev for CONSTANTS_BLOCK.
11781178 Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 8));
11791179 if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
11801180 Abbv) != CONSTANTS_INTEGER_ABBREV)
1181 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1181 llvm_unreachable("Unexpected abbrev ordering!");
11821182 }
11831183
11841184 { // CE_CAST abbrev for CONSTANTS_BLOCK.
11911191
11921192 if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
11931193 Abbv) != CONSTANTS_CE_CAST_Abbrev)
1194 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1194 llvm_unreachable("Unexpected abbrev ordering!");
11951195 }
11961196 { // NULL abbrev for CONSTANTS_BLOCK.
11971197 BitCodeAbbrev *Abbv = new BitCodeAbbrev();
11981198 Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_NULL));
11991199 if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
12001200 Abbv) != CONSTANTS_NULL_Abbrev)
1201 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1201 llvm_unreachable("Unexpected abbrev ordering!");
12021202 }
12031203
12041204 // FIXME: This should only use space for first class types!
12111211 Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 1)); // volatile
12121212 if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
12131213 Abbv) != FUNCTION_INST_LOAD_ABBREV)
1214 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1214 llvm_unreachable("Unexpected abbrev ordering!");
12151215 }
12161216 { // INST_BINOP abbrev for FUNCTION_BLOCK.
12171217 BitCodeAbbrev *Abbv = new BitCodeAbbrev();
12211221 Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 4)); // opc
12221222 if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
12231223 Abbv) != FUNCTION_INST_BINOP_ABBREV)
1224 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1224 llvm_unreachable("Unexpected abbrev ordering!");
12251225 }
12261226 { // INST_CAST abbrev for FUNCTION_BLOCK.
12271227 BitCodeAbbrev *Abbv = new BitCodeAbbrev();
12321232 Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 4)); // opc
12331233 if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
12341234 Abbv) != FUNCTION_INST_CAST_ABBREV)
1235 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1235 llvm_unreachable("Unexpected abbrev ordering!");
12361236 }
12371237
12381238 { // INST_RET abbrev for FUNCTION_BLOCK.
12401240 Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_RET));
12411241 if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
12421242 Abbv) != FUNCTION_INST_RET_VOID_ABBREV)
1243 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1243 llvm_unreachable("Unexpected abbrev ordering!");
12441244 }
12451245 { // INST_RET abbrev for FUNCTION_BLOCK.
12461246 BitCodeAbbrev *Abbv = new BitCodeAbbrev();
12481248 Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // ValID
12491249 if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
12501250 Abbv) != FUNCTION_INST_RET_VAL_ABBREV)
1251 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1251 llvm_unreachable("Unexpected abbrev ordering!");
12521252 }
12531253 { // INST_UNREACHABLE abbrev for FUNCTION_BLOCK.
12541254 BitCodeAbbrev *Abbv = new BitCodeAbbrev();
12551255 Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_UNREACHABLE));
12561256 if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
12571257 Abbv) != FUNCTION_INST_UNREACHABLE_ABBREV)
1258 LLVM_UNREACHABLE("Unexpected abbrev ordering!");
1258 llvm_unreachable("Unexpected abbrev ordering!");
12591259 }
12601260
12611261 Stream.ExitBlock();
237237 else if (I->hasWeakLinkage())
238238 O << TAI->getWeakRefDirective() << Name << '\n';
239239 else if (!I->hasLocalLinkage())
240 LLVM_UNREACHABLE("Invalid alias linkage");
240 llvm_unreachable("Invalid alias linkage");
241241
242242 printVisibility(Name, I->getVisibility());
243243
901901 case Instruction::SIToFP:
902902 case Instruction::FPToUI:
903903 case Instruction::FPToSI:
904 LLVM_UNREACHABLE("FIXME: Don't yet support this kind of constant cast expr");
904 llvm_unreachable("FIXME: Don't yet support this kind of constant cast expr");
905905 break;
906906 case Instruction::BitCast:
907907 return EmitConstantValueOnly(CE->getOperand(0));
967967 O << ')';
968968 break;
969969 default:
970 LLVM_UNREACHABLE("Unsupported operator!");
970 llvm_unreachable("Unsupported operator!");
971971 }
972972 } else {
973 LLVM_UNREACHABLE("Unknown constant value!");
973 llvm_unreachable("Unknown constant value!");
974974 }
975975 }
976976
12091209 O << '\n';
12101210 }
12111211 return;
1212 } else LLVM_UNREACHABLE("Floating point constant type not handled");
1212 } else llvm_unreachable("Floating point constant type not handled");
12131213 }
12141214
12151215 void AsmPrinter::EmitGlobalConstantLargeInt(const ConstantInt *CI,
13011301
13021302 void AsmPrinter::EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
13031303 // Target doesn't support this yet!
1304 LLVM_UNREACHABLE("Target does not support EmitMachineConstantPoolValue");
1304 llvm_unreachable("Target does not support EmitMachineConstantPoolValue");
13051305 }
13061306
13071307 /// PrintSpecial - Print information related to the specified machine instr
16601660 "Target cannot handle 64-bit constant exprs!");
16611661 O << TAI->getData64bitsDirective(AddrSpace);
16621662 } else {
1663 LLVM_UNREACHABLE("Target cannot handle given data directive width!");
1663 llvm_unreachable("Target cannot handle given data directive width!");
16641664 }
16651665 break;
16661666 }
17461746 }
17471747
17481748 cerr << "no GCMetadataPrinter registered for GC: " << Name << "\n";
1749 llvm_unreachable();
1749 llvm_unreachable(0);
17501750 }
17511751
17521752 /// EmitComments - Pretty-print comments for instructions
206206 case dwarf::DW_FORM_data8: Asm->EmitInt64(Integer); break;
207207 case dwarf::DW_FORM_udata: Asm->EmitULEB128Bytes(Integer); break;
208208 case dwarf::DW_FORM_sdata: Asm->EmitSLEB128Bytes(Integer); break;
209 default: LLVM_UNREACHABLE("DIE Value form not supported yet");
209 default: llvm_unreachable("DIE Value form not supported yet");
210210 }
211211 }
212212
225225 case dwarf::DW_FORM_data8: return sizeof(int64_t);
226226 case dwarf::DW_FORM_udata: return TargetAsmInfo::getULEB128Size(Integer);
227227 case dwarf::DW_FORM_sdata: return TargetAsmInfo::getSLEB128Size(Integer);
228 default: LLVM_UNREACHABLE("DIE Value form not supported yet"); break;
228 default: llvm_unreachable("DIE Value form not supported yet"); break;
229229 }
230230 return 0;
231231 }
481481 case dwarf::DW_FORM_block2: Asm->EmitInt16(Size); break;
482482 case dwarf::DW_FORM_block4: Asm->EmitInt32(Size); break;
483483 case dwarf::DW_FORM_block: Asm->EmitULEB128Bytes(Size); break;
484 default: LLVM_UNREACHABLE("Improper form for block"); break;
484 default: llvm_unreachable("Improper form for block"); break;
485485 }
486486
487487 const SmallVector &AbbrevData = Abbrev.getData();
499499 case dwarf::DW_FORM_block2: return Size + sizeof(int16_t);
500500 case dwarf::DW_FORM_block4: return Size + sizeof(int32_t);
501501 case dwarf::DW_FORM_block: return Size + TargetAsmInfo::getULEB128Size(Size);
502 default: LLVM_UNREACHABLE("Improper form for block"); break;
502 default: llvm_unreachable("Improper form for block"); break;
503503 }
504504 return 0;
505505 }
190190 Asm->EmitULEB128Bytes(Offset);
191191 Asm->EOL("Offset");
192192 } else {
193 LLVM_UNREACHABLE("Machine move not supported yet.");
193 llvm_unreachable("Machine move not supported yet.");
194194 }
195195 } else if (Src.isReg() &&
196196 Src.getReg() == MachineLocation::VirtualFP) {
200200 Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), isEH));
201201 Asm->EOL("Register");
202202 } else {
203 LLVM_UNREACHABLE("Machine move not supported yet.");
203 llvm_unreachable("Machine move not supported yet.");
204204 }
205205 } else {
206206 unsigned Reg = RI->getDwarfRegNum(Src.getReg(), isEH);
461461 // _GLIBCXX_DEBUG checks strict weak ordering, which involves comparing
462462 // an object with itself.
463463 #ifndef _GLIBCXX_DEBUG
464 LLVM_UNREACHABLE("Predecessor appears twice");
464 llvm_unreachable("Predecessor appears twice");
465465 #endif
466466 return false;
467467 }
107107 MR.setResultPointer((void*)Addr);
108108 MR.setConstantVal(JumpTableSectionIdx);
109109 } else {
110 LLVM_UNREACHABLE("Unhandled relocation type");
110 llvm_unreachable("Unhandled relocation type");
111111 }
112112 ES->addRelocation(MR);
113113 }
148148 unsigned ELFWriter::getGlobalELFVisibility(const GlobalValue *GV) {
149149 switch (GV->getVisibility()) {
150150 default:
151 LLVM_UNREACHABLE("unknown visibility type");
151 llvm_unreachable("unknown visibility type");
152152 case GlobalValue::DefaultVisibility:
153153 return ELFSym::STV_DEFAULT;
154154 case GlobalValue::HiddenVisibility:
358358 else if (CFP->getType() == Type::FloatTy)
359359 GblS.emitWord32(Val);
360360 else if (CFP->getType() == Type::X86_FP80Ty) {
361 LLVM_UNREACHABLE("X86_FP80Ty global emission not implemented");
361 llvm_unreachable("X86_FP80Ty global emission not implemented");
362362 } else if (CFP->getType() == Type::PPC_FP128Ty)
363 LLVM_UNREACHABLE("PPC_FP128Ty global emission not implemented");
363 llvm_unreachable("PPC_FP128Ty global emission not implemented");
364364 return;
365365 } else if (const ConstantInt *CI = dyn_cast(CV)) {
366366 if (Size == 4)
368368 else if (Size == 8)
369369 GblS.emitWord64(CI->getZExtValue());
370370 else
371 LLVM_UNREACHABLE("LargeInt global emission not implemented");
371 llvm_unreachable("LargeInt global emission not implemented");
372372 return;
373373 } else if (const ConstantVector *CP = dyn_cast(CV)) {
374374 const VectorType *PTy = CP->getType();
376376 EmitGlobalConstant(CP->getOperand(I), GblS);
377377 return;
378378 }
379 LLVM_UNREACHABLE("unknown global constant");
379 llvm_unreachable("unknown global constant");
380380 }
381381
382382
9494 }
9595
9696 cerr << "unsupported GC: " << Name << "\n";
97 llvm_unreachable();
97 llvm_unreachable(0);
9898 }
9999
100100 GCFunctionInfo &GCModuleInfo::getFunctionInfo(const Function &F) {
143143
144144 static const char *DescKind(GC::PointKind Kind) {
145145 switch (Kind) {
146 default: LLVM_UNREACHABLE("Unknown GC point kind");
146 default: llvm_unreachable("Unknown GC point kind");
147147 case GC::Loop: return "loop";
148148 case GC::Return: return "return";
149149 case GC::PreCall: return "pre-call";
108108
109109 bool GCStrategy::performCustomLowering(Function &F) {
110110 cerr << "gc " << getName() << " must override performCustomLowering.\n";
111 llvm_unreachable();
111 llvm_unreachable(0);
112112 return 0;
113113 }
114114
11341134 #ifndef NDEBUG
11351135 cerr << "Unable to predicate " << *I << "!\n";
11361136 #endif
1137 llvm_unreachable();
1137 llvm_unreachable(0);
11381138 }
11391139 }
11401140
11701170 #ifndef NDEBUG
11711171 cerr << "Unable to predicate " << *I << "!\n";
11721172 #endif
1173 llvm_unreachable();
1173 llvm_unreachable(0);
11741174 }
11751175 }
11761176
156156 IRBuilder<> Builder(IP->getParent(), IP);
157157
158158 switch(BitSize) {
159 default: LLVM_UNREACHABLE("Unhandled type size of value to byteswap!");
159 default: llvm_unreachable("Unhandled type size of value to byteswap!");
160160 case 16: {
161161 Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8),
162162 "bswap.2");
294294 const char *Dname,
295295 const char *LDname) {
296296 switch (CI->getOperand(1)->getType()->getTypeID()) {
297 default: LLVM_UNREACHABLE("Invalid type in intrinsic");
297 default: llvm_unreachable("Invalid type in intrinsic");
298298 case Type::FloatTyID:
299299 ReplaceCallWith(Fname, CI, CI->op_begin() + 1, CI->op_end(),
300300 Type::FloatTy);
11011101 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
11021102 if (tii_->isMoveInstr(*VNI->copy, SrcReg, DstReg, SrcSubReg, DstSubReg))
11031103 return SrcReg;
1104 LLVM_UNREACHABLE("Unrecognized copy instruction!");
1104 llvm_unreachable("Unrecognized copy instruction!");
11051105 return 0;
11061106 }
11071107
104104 // FIXME: This should be a set or something that uniques
105105 MOW.PendingGlobals.push_back(MR.getGlobalValue());
106106 } else {
107 LLVM_UNREACHABLE("Unhandled relocation type");
107 llvm_unreachable("Unhandled relocation type");
108108 }
109109 MOS->addRelocation(MR);
110110 }
634634 case Instruction::Add:
635635 default:
636636 cerr << "ConstantExpr not handled as global var init: " << *CE << "\n";
637 llvm_unreachable();
637 llvm_unreachable(0);
638638 }
639639 } else if (PC->getType()->isSingleValueType()) {
640640 unsigned char *ptr = (unsigned char *)PA;
668668 ptr[6] = val >> 48;
669669 ptr[7] = val >> 56;
670670 } else {
671 LLVM_UNREACHABLE("Not implemented: bit widths > 64");
671 llvm_unreachable("Not implemented: bit widths > 64");
672672 }
673673 break;
674674 }
709709 ScatteredOffset));
710710 ScatteredOffset = 0;
711711 } else
712 LLVM_UNREACHABLE("Unknown constant pointer type!");
712 llvm_unreachable("Unknown constant pointer type!");
713713 break;
714714 default:
715715 std::string msg;
732732 PA+SL->getElementOffset(i)));
733733 } else {
734734 cerr << "Bad Type: " << *PC->getType() << "\n";
735 LLVM_UNREACHABLE("Unknown constant type to initialize memory with!");
735 llvm_unreachable("Unknown constant type to initialize memory with!");
736736 }
737737 }
738738 }
748748
749749 switch (GV->getLinkage()) {
750750 default:
751 LLVM_UNREACHABLE("Unexpected linkage type!");
751 llvm_unreachable("Unexpected linkage type!");
752752 break;
753753 case GlobalValue::WeakAnyLinkage:
754754 case GlobalValue::WeakODRLinkage:
156156 return false;
157157
158158 switch (getType()) {
159 default: LLVM_UNREACHABLE("Unrecognized operand type");
159 default: llvm_unreachable("Unrecognized operand type");
160160 case MachineOperand::MO_Register:
161161 return getReg() == Other.getReg() && isDef() == Other.isDef() &&
162162 getSubReg() == Other.getSubReg();
274274 OS << '>';
275275 break;
276276 default:
277 LLVM_UNREACHABLE("Unrecognized operand type");
277 llvm_unreachable("Unrecognized operand type");
278278 }
279279
280280 if (unsigned TF = getTargetFlags())
290290 }
291291
292292 // This should never happen
293 LLVM_UNREACHABLE("Personality function should be set!");
293 llvm_unreachable("Personality function should be set!");
294294 return 0;
295295 }
296296
793793 cerr << "*** Scheduling failed! ***\n";
794794 SuccSU->dump(this);
795795 cerr << " has been released too many times!\n";
796 llvm_unreachable();
796 llvm_unreachable(0);
797797 }
798798 #endif
799799
8383 this == getConstantPool() ||
8484 this == getJumpTable())
8585 return true;
86 LLVM_UNREACHABLE("Unknown PseudoSourceValue!");
86 llvm_unreachable("Unknown PseudoSourceValue!");
8787 return false;
8888 }
8989
236236 }
237237 }
238238 if (Error)
239 llvm_unreachable();
239 llvm_unreachable(0);
240240 #endif
241241 regUse_.clear();
242242 regUseBackUp_.clear();
6666 ISD::ArgFlagsTy ArgFlags =
6767 cast(TheArgs->getOperand(3+i))->getArgFlags();
6868 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
69 std::string msg;
70 raw_string_ostream Msg(msg);
71 Msg << "Formal argument #" << i << " has unhandled type "
69 #ifndef NDEBUG
70 cerr << "Formal argument #" << i << " has unhandled type "
7271 << ArgVT.getMVTString();
73 llvm_report_error(Msg.str());
72 #endif
73 llvm_unreachable(0);
7474 }
7575 }
7676 }
8383 MVT VT = TheRet->getOperand(i*2+1).getValueType();
8484 ISD::ArgFlagsTy ArgFlags =
8585 cast(TheRet->getOperand(i*2+2))->getArgFlags();
86 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)){
87 std::string msg;
88 raw_string_ostream Msg(msg);
89 Msg << "Return operand #" << i << " has unhandled type "
86 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) {
87 #ifndef NDEBUG
88 cerr << "Return operand #" << i << " has unhandled type "
9089 << VT.getMVTString();
91 llvm_report_error(Msg.str());
90 #endif
91 llvm_unreachable(0);
9292 }
9393 }
9494 }
102102 MVT ArgVT = TheCall->getArg(i).getValueType();
103103 ISD::ArgFlagsTy ArgFlags = TheCall->getArgFlags(i);
104104 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
105 std::string msg;
106 raw_string_ostream Msg(msg);
107 Msg << "Call operand #" << i << " has unhandled type "
105 #ifndef NDEBUG
106 cerr << "Call operand #" << i << " has unhandled type "
108107 << ArgVT.getMVTString();
109 llvm_report_error(Msg.str());
108 #endif
109 llvm_unreachable(0);
110110 }
111111 }
112112 }
121121 MVT ArgVT = ArgVTs[i];
122122 ISD::ArgFlagsTy ArgFlags = Flags[i];
123123 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
124 std::string msg;
125 raw_string_ostream Msg(msg);
126 Msg << "Call operand #" << i << " has unhandled type "
124 #ifndef NDEBUG
125 cerr << "Call operand #" << i << " has unhandled type "
127126 << ArgVT.getMVTString();
128 llvm_report_error(Msg.str());
127 #endif
128 llvm_unreachable(0);
129129 }
130130 }
131131 }
139139 if (TheCall->isInreg())
140140 Flags.setInReg();
141141 if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
142 std::string msg;
143 raw_string_ostream Msg(msg);
144 Msg << "Call result #" << i << " has unhandled type "
142 #ifndef NDEBUG
143 cerr << "Call result #" << i << " has unhandled type "
145144 << VT.getMVTString();
146 llvm_report_error(Msg.str());
145 #endif
146 llvm_unreachable(0);
147147 }
148148 }
149149 }
152152 /// produce a single value.
153153 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) {
154154 if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
155 std::string msg;
156 raw_string_ostream Msg(msg);
157 Msg << "Call result has unhandled type "
155 #ifndef NDEBUG
156 cerr << "Call result has unhandled type "
158157 << VT.getMVTString();
159 llvm_report_error(Msg.str());
158 #endif
159 llvm_unreachable(0);
160160 }
161161 }
392392
393393 assert(Depth <= 6 && "GetNegatedExpression doesn't match isNegatibleForFree");
394394 switch (Op.getOpcode()) {
395 default: LLVM_UNREACHABLE("Unknown code");
395 default: llvm_unreachable("Unknown code");
396396 case ISD::ConstantFP: {
397397 APFloat V = cast(Op)->getValueAPF();
398398 V.changeSign();
22582258 if (!LegalOperations || TLI.isCondCodeLegal(NotCC, LHS.getValueType())) {
22592259 switch (N0.getOpcode()) {
22602260 default:
2261 LLVM_UNREACHABLE("Unhandled SetCC Equivalent!");
2261 llvm_unreachable("Unhandled SetCC Equivalent!");
22622262 case ISD::SETCC:
22632263 return DAG.getSetCC(N->getDebugLoc(), VT, LHS, RHS, NotCC);
22642264 case ISD::SELECT_CC:
50625062 if (Value.getOpcode() != ISD::TargetConstantFP) {
50635063 SDValue Tmp;
50645064 switch (CFP->getValueType(0).getSimpleVT()) {
5065 default: LLVM_UNREACHABLE("Unknown FP type");
5065 default: llvm_unreachable("Unknown FP type");
50665066 case MVT::f80: // We don't do this for these yet.
50675067 case MVT::f128:
50685068 case MVT::ppcf128:
61066106 SrcValue = ST->getSrcValue();
61076107 SrcValueOffset = ST->getSrcValueOffset();
61086108 } else {
6109 LLVM_UNREACHABLE("FindAliasInfo expected a memory operand");
6109 llvm_unreachable("FindAliasInfo expected a memory operand");
61106110 }
61116111
61126112 return false;
948948 #ifndef NDEBUG
949949 cerr << "NODE: "; Node->dump(&DAG); cerr << "\n";
950950 #endif
951 LLVM_UNREACHABLE("Do not know how to legalize this operator!");
951 llvm_unreachable("Do not know how to legalize this operator!");
952952 case ISD::CALL:
953953 // The only option for this is to custom lower it.
954954 Tmp3 = TLI.LowerOperation(Result.getValue(0), DAG);
982982 return Tmp2;
983983 case ISD::BUILD_VECTOR:
984984 switch (TLI.getOperationAction(ISD::BUILD_VECTOR, Node->getValueType(0))) {
985 default: LLVM_UNREACHABLE("This action is not supported yet!");
985 default: llvm_unreachable("This action is not supported yet!");
986986 case TargetLowering::Custom:
987987 Tmp3 = TLI.LowerOperation(Result, DAG);
988988 if (Tmp3.getNode()) {
10991099 Tmp4 = Result.getValue(1);
11001100
11011101 switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
1102 default: LLVM_UNREACHABLE("This action is not supported yet!");
1102 default: llvm_unreachable("This action is not supported yet!");
11031103 case TargetLowering::Legal:
11041104 // If this is an unaligned load and the target doesn't support it,
11051105 // expand it.
12691269 Tmp2 = LegalizeOp(Ch);
12701270 } else {
12711271 switch (TLI.getLoadExtAction(ExtType, SrcVT)) {
1272 default: LLVM_UNREACHABLE("This action is not supported yet!");
1272 default: llvm_unreachable("This action is not supported yet!");
12731273 case TargetLowering::Custom:
12741274 isCustom = true;
12751275 // FALLTHROUGH
13621362
13631363 MVT VT = Tmp3.getValueType();
13641364 switch (TLI.getOperationAction(ISD::STORE, VT)) {
1365 default: LLVM_UNREACHABLE("This action is not supported yet!");
1365 default: llvm_unreachable("This action is not supported yet!");
13661366 case TargetLowering::Legal:
13671367 // If this is an unaligned store and the target doesn't support it,
13681368 // expand it.
14621462 ST->getOffset());
14631463
14641464 switch (TLI.getTruncStoreAction(ST->getValue().getValueType(), StVT)) {
1465 default: LLVM_UNREACHABLE("This action is not supported yet!");
1465 default: llvm_unreachable("This action is not supported yet!");
14661466 case TargetLowering::Legal:
14671467 // If this is an unaligned store and the target doesn't support it,
14681468 // expand it.
16901690 MVT OpVT = LHS.getValueType();
16911691 ISD::CondCode CCCode = cast(CC)->get();
16921692 switch (TLI.getCondCodeAction(CCCode, OpVT)) {
1693 default: LLVM_UNREACHABLE("Unknown condition code action!");
1693 default: llvm_unreachable("Unknown condition code action!");
16941694 case TargetLowering::Legal:
16951695 // Nothing to do.
16961696 break;
16981698 ISD::CondCode CC1 = ISD::SETCC_INVALID, CC2 = ISD::SETCC_INVALID;
16991699 unsigned Opc = 0;
17001700 switch (CCCode) {
1701 default: LLVM_UNREACHABLE("Don't know how to expand this condition!");
1701 default: llvm_unreachable("Don't know how to expand this condition!");
17021702 case ISD::SETOEQ: CC1 = ISD::SETEQ; CC2 = ISD::SETO; Opc = ISD::AND; break;
17031703 case ISD::SETOGT: CC1 = ISD::SETGT; CC2 = ISD::SETO; Opc = ISD::AND; break;
17041704 case ISD::SETOGE: CC1 = ISD::SETGE; CC2 = ISD::SETO; Opc = ISD::AND; break;
19251925 RTLIB::Libcall Call_PPCF128) {
19261926 RTLIB::Libcall LC;
19271927 switch (Node->getValueType(0).getSimpleVT()) {
1928 default: LLVM_UNREACHABLE("Unexpected request for libcall!");
1928 default: llvm_unreachable("Unexpected request for libcall!");
19291929 case MVT::f32: LC = Call_F32; break;
19301930 case MVT::f64: LC = Call_F64; break;
19311931 case MVT::f80: LC = Call_F80; break;
19411941 RTLIB::Libcall Call_I128) {
19421942 RTLIB::Libcall LC;
19431943 switch (Node->getValueType(0).getSimpleVT()) {
1944 default: LLVM_UNREACHABLE("Unexpected request for libcall!");
1944 default: llvm_unreachable("Unexpected request for libcall!");
19451945 case MVT::i16: LC = Call_I16; break;
19461946 case MVT::i32: LC = Call_I32; break;
19471947 case MVT::i64: LC = Call_I64; break;
20272027 // offset depending on the data type.
20282028 uint64_t FF;
20292029 switch (Op0.getValueType().getSimpleVT()) {
2030 default: LLVM_UNREACHABLE("Unsupported integer type!");
2030 default: llvm_unreachable("Unsupported integer type!");
20312031 case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
20322032 case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
20332033 case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
21462146 MVT SHVT = TLI.getShiftAmountTy();
21472147 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8;
21482148 switch (VT.getSimpleVT()) {
2149 default: LLVM_UNREACHABLE("Unhandled Expand type in BSWAP!");
2149 default: llvm_unreachable("Unhandled Expand type in BSWAP!");
21502150 case MVT::i16:
21512151 Tmp2 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, SHVT));
21522152 Tmp1 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, SHVT));
21912191 SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op,
21922192 DebugLoc dl) {
21932193 switch (Opc) {
2194 default: LLVM_UNREACHABLE("Cannot expand this yet!");
2194 default: llvm_unreachable("Cannot expand this yet!");
21952195 case ISD::CTPOP: {
21962196 static const uint64_t mask[6] = {
21972197 0x5555555555555555ULL, 0x3333333333333333ULL,
23052305 else if (VT.isFloatingPoint())
23062306 Results.push_back(DAG.getConstantFP(0, VT));
23072307 else
2308 LLVM_UNREACHABLE("Unknown value type!");
2308 llvm_unreachable("Unknown value type!");
23092309 break;
23102310 }
23112311 case ISD::TRAP: {
28092809 // type in some cases cases.
28102810 // Also, we can fall back to a division in some cases, but that's a big
28112811 // performance hit in the general case.
2812 LLVM_UNREACHABLE("Don't know how to expand this operation yet!");
2812 llvm_unreachable("Don't know how to expand this operation yet!");
28132813 }
28142814 if (isSigned) {
28152815 Tmp1 = DAG.getConstant(VT.getSizeInBits() - 1, TLI.getShiftAmountTy());
31013101 break;
31023102 }
31033103 if (NewInTy.isInteger())
3104 LLVM_UNREACHABLE("Cannot promote Legal Integer SETCC yet");
3104 llvm_unreachable("Cannot promote Legal Integer SETCC yet");
31053105 else {
31063106 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NewInTy, Tmp1);
31073107 Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NewInTy, Tmp2);
5252 cerr << "SoftenFloatResult #" << ResNo << ": ";
5353 N->dump(&DAG); cerr << "\n";
5454 #endif
55 LLVM_UNREACHABLE("Do not know how to soften the result of this operator!");
55 llvm_unreachable("Do not know how to soften the result of this operator!");
5656
5757 case ISD::BIT_CONVERT: R = SoftenFloatRes_BIT_CONVERT(N); break;
5858 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
540540 cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
541541 N->dump(&DAG); cerr << "\n";
542542 #endif
543 LLVM_UNREACHABLE("Do not know how to soften this operator's operand!");
543 llvm_unreachable("Do not know how to soften this operator's operand!");
544544
545545 case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
546546 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
780780 cerr << "ExpandFloatResult #" << ResNo << ": ";
781781 N->dump(&DAG); cerr << "\n";
782782 #endif
783 LLVM_UNREACHABLE("Do not know how to expand the result of this operator!");
783 llvm_unreachable("Do not know how to expand the result of this operator!");
784784
785785 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
786786 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
11791179 cerr << "ExpandFloatOperand Op #" << OpNo << ": ";
11801180 N->dump(&DAG); cerr << "\n";
11811181 #endif
1182 LLVM_UNREACHABLE("Do not know how to expand this operator's operand!");
1182 llvm_unreachable("Do not know how to expand this operator's operand!");
11831183
11841184 case ISD::BIT_CONVERT: Res = ExpandOp_BIT_CONVERT(N); break;
11851185 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
4444 cerr << "PromoteIntegerResult #" << ResNo << ": ";
4545 N->dump(&DAG); cerr << "\n";
4646 #endif
47 LLVM_UNREACHABLE("Do not know how to promote this operator!");
47 llvm_unreachable("Do not know how to promote this operator!");
4848 case ISD::AssertSext: Res = PromoteIntRes_AssertSext(N); break;
4949 case ISD::AssertZext: Res = PromoteIntRes_AssertZext(N); break;
5050 case ISD::BIT_CONVERT: Res = PromoteIntRes_BIT_CONVERT(N); break;
490490 SDValue Res;
491491
492492 switch (getTypeAction(N->getOperand(0).getValueType())) {
493 default: LLVM_UNREACHABLE("Unknown type action!");
493 default: llvm_unreachable("Unknown type action!");
494494 case Legal:
495495 case ExpandInteger:
496496 Res = N->getOperand(0);
609609 cerr << "PromoteIntegerOperand Op #" << OpNo << ": ";
610610 N->dump(&DAG); cerr << "\n";
611611 #endif
612 LLVM_UNREACHABLE("Do not know how to promote this operator's operand!");
612 llvm_unreachable("Do not know how to promote this operator's operand!");
613613
614614 case ISD::ANY_EXTEND: Res = PromoteIntOp_ANY_EXTEND(N); break;
615615 case ISD::BIT_CONVERT: Res = PromoteIntOp_BIT_CONVERT(N); break;
665665 // insert sign extends for ALL conditions, but zero extend is cheaper on
666666 // many machines (an AND instead of two shifts), so prefer it.
667667 switch (CCCode) {
668 default: LLVM_UNREACHABLE("Unknown integer comparison!");
668 default: llvm_unreachable("Unknown integer comparison!");
669669 case ISD::SETEQ:
670670 case ISD::SETNE:
671671 case ISD::SETUGE:
922922 cerr << "ExpandIntegerResult #" << ResNo << ": ";
923923 N->dump(&DAG); cerr << "\n";
924924 #endif
925 LLVM_UNREACHABLE("Do not know how to expand the result of this operator!");
925 llvm_unreachable("Do not know how to expand the result of this operator!");
926926
927927 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
928928 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
11031103 DAG.getConstant(~HighBitMask, ShTy));
11041104
11051105 switch (N->getOpcode()) {
1106 default: LLVM_UNREACHABLE("Unknown shift");
1106 default: llvm_unreachable("Unknown shift");
11071107 case ISD::SHL:
11081108 Lo = DAG.getConstant(0, NVT); // Low part is zero.
11091109 Hi = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); // High part from Lo part.
11311131 Amt);
11321132 unsigned Op1, Op2;
11331133 switch (N->getOpcode()) {
1134 default: LLVM_UNREACHABLE("Unknown shift");
1134 default: llvm_unreachable("Unknown shift");
11351135 case ISD::SHL: Op1 = ISD::SHL; Op2 = ISD::SRL; break;
11361136 case ISD::SRL:
11371137 case ISD::SRA: Op1 = ISD::SRL; Op2 = ISD::SHL; break;
11711171
11721172 SDValue Lo1, Hi1, Lo2, Hi2;
11731173 switch (N->getOpcode()) {
1174 default: LLVM_UNREACHABLE("Unknown shift");
1174 default: llvm_unreachable("Unknown shift");
11751175 case ISD::SHL:
11761176 // ShAmt < NVTBits
11771177 Lo1 = DAG.getConstant(0, NVT); // Low part is zero.
17911791 }
17921792
17931793 if (!ExpandShiftWithUnknownAmountBit(N, Lo, Hi))
1794 LLVM_UNREACHABLE("Unsupported shift!");
1794 llvm_unreachable("Unsupported shift!");
17951795 }
17961796
17971797 void DAGTypeLegalizer::ExpandIntRes_SIGN_EXTEND(SDNode *N,
19671967 cerr << "ExpandIntegerOperand Op #" << OpNo << ": ";
19681968 N->dump(&DAG); cerr << "\n";
19691969 #endif
1970 LLVM_UNREACHABLE("Do not know how to expand this operator's operand!");
1970 llvm_unreachable("Do not know how to expand this operator's operand!");
19711971
19721972 case ISD::BIT_CONVERT: Res = ExpandOp_BIT_CONVERT(N); break;
19731973 case ISD::BR_CC: Res = ExpandIntOp_BR_CC(N); break;
20492049 // FIXME: This generated code sucks.
20502050 ISD::CondCode LowCC;
20512051 switch (CCCode) {
2052 default: LLVM_UNREACHABLE("Unknown integer setcc!");
2052 default: llvm_unreachable("Unknown integer setcc!");
20532053 case ISD::SETLT:
20542054 case ISD::SETULT: LowCC = ISD::SETULT; break;
20552055 case ISD::SETGT:
149149 if (Mapped & 128)
150150 cerr << " WidenedVectors";
151151 cerr << "\n";
152 llvm_unreachable();
152 llvm_unreachable(0);
153153 }
154154 }
155155 }
431431
432432 if (Failed) {
433433 I->dump(&DAG); cerr << "\n";
434 llvm_unreachable();
434 llvm_unreachable(0);
435435 }
436436 }
437437 #endif
4040 cerr << "ScalarizeVectorResult #" << ResNo << ": ";
4141 N->dump(&DAG); cerr << "\n";
4242 #endif
43 LLVM_UNREACHABLE("Do not know how to scalarize the result of this operator!");
43 llvm_unreachable("Do not know how to scalarize the result of this operator!");
4444
4545 case ISD::BIT_CONVERT: R = ScalarizeVecRes_BIT_CONVERT(N); break;
4646 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
277277 cerr << "ScalarizeVectorOperand Op #" << OpNo << ": ";
278278 N->dump(&DAG); cerr << "\n";
279279 #endif
280 LLVM_UNREACHABLE("Do not know how to scalarize this operator's operand!");
280 llvm_unreachable("Do not know how to scalarize this operator's operand!");
281281 case ISD::BIT_CONVERT:
282282 Res = ScalarizeVecOp_BIT_CONVERT(N);
283283 break;
377377 cerr << "SplitVectorResult #" << ResNo << ": ";
378378 N->dump(&DAG); cerr << "\n";
379379 #endif
380 LLVM_UNREACHABLE("Do not know how to split the result of this operator!");
380 llvm_unreachable("Do not know how to split the result of this operator!");
381381
382382 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
383383 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
575575 SDValue VLo, VHi;
576576 MVT InVT = N->getOperand(0).getValueType();
577577 switch (getTypeAction(InVT)) {
578 default: LLVM_UNREACHABLE("Unexpected type action!");
578 default: llvm_unreachable("Unexpected type action!");
579579 case Legal: {
580580 MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
581581 LoVT.getVectorNumElements());
767767 // Split the input.
768768 MVT InVT = N->getOperand(0).getValueType();
769769 switch (getTypeAction(InVT)) {
770 default: LLVM_UNREACHABLE("Unexpected type action!");
770 default: llvm_unreachable("Unexpected type action!");
771771 case Legal: {
772772 MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
773773 LoVT.getVectorNumElements());
927927 cerr << "SplitVectorOperand Op #" << OpNo << ": ";
928928 N->dump(&DAG); cerr << "\n";
929929 #endif
930 LLVM_UNREACHABLE("Do not know how to split this operator's operand!");
930 llvm_unreachable("Do not know how to split this operator's operand!");
931931
932932 case ISD::BIT_CONVERT: Res = SplitVecOp_BIT_CONVERT(N); break;
933933 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
11161116 cerr << "WidenVectorResult #" << ResNo << ": ";
11171117 N->dump(&DAG); cerr << "\n";
11181118 #endif
1119 LLVM_UNREACHABLE("Do not know how to widen the result of this operator!");
1119 llvm_unreachable("Do not know how to widen the result of this operator!");
11201120
11211121 case ISD::BIT_CONVERT: Res = WidenVecRes_BIT_CONVERT(N); break;
11221122 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
17721772 cerr << "WidenVectorOperand op #" << ResNo << ": ";
17731773 N->dump(&DAG); cerr << "\n";
17741774 #endif
1775 LLVM_UNREACHABLE("Do not know how to widen this operator's operand!");
1775 llvm_unreachable("Do not know how to widen this operator's operand!");
17761776
17771777 case ISD::BIT_CONVERT: Res = WidenVecOp_BIT_CONVERT(N); break;
17781778 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
139139 cerr << "*** Scheduling failed! ***\n";
140140 PredSU->dump(this);
141141 cerr << " has been released too many times!\n";
142 llvm_unreachable();
142 llvm_unreachable(0);
143143 }
144144 #endif
145145
568568 }
569569
570570 if (!CurSU) {
571 LLVM_UNREACHABLE("Unable to resolve live physical register dependencies!");
571 llvm_unreachable("Unable to resolve live physical register dependencies!");
572572 }
573573 }
574574
113113 cerr << "*** Scheduling failed! ***\n";
114114 SuccSU->dump(this);
115115 cerr << " has been released too many times!\n";
116 llvm_unreachable();
116 llvm_unreachable(0);
117117 }
118118 #endif
119119
202202 cerr << "*** Scheduling failed! ***\n";
203203 PredSU->dump(this);
204204 cerr << " has been released too many times!\n";
205 llvm_unreachable();
205 llvm_unreachable(0);
206206 }
207207 #endif
208208
829829 cerr << "*** Scheduling failed! ***\n";
830830 SuccSU->dump(this);
831831 cerr << " has been released too many times!\n";
832 llvm_unreachable();
832 llvm_unreachable(0);
833833 }
834834 #endif
835835
430430 MI->addOperand(MachineOperand::CreateImm(SubIdx));
431431 BB->insert(InsertPos, MI);
432432 } else
433 LLVM_UNREACHABLE("Node is not insert_subreg, extract_subreg, or subreg_to_reg");
433 llvm_unreachable("Node is not insert_subreg, extract_subreg, or subreg_to_reg");
434434
435435 SDValue Op(Node, 0);
436436 bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
551551 #ifndef NDEBUG
552552 Node->dump(DAG);
553553 #endif
554 LLVM_UNREACHABLE("This target-independent node should have been selected!");
554 llvm_unreachable("This target-independent node should have been selected!");
555555 break;
556556 case ISD::EntryToken:
557 LLVM_UNREACHABLE("EntryToken should have been excluded from the schedule!");
557 llvm_unreachable("EntryToken should have been excluded from the schedule!");
558558 break;
559559 case ISD::TokenFactor: // fall thru
560560 break;
618618 ++i; // Skip the ID value.
619619
620620 switch (Flags & 7) {
621 default: LLVM_UNREACHABLE("Bad flags!");
621 default: llvm_unreachable("Bad flags!");
622622 case 2: // Def of register.
623623 for (; NumVals; --NumVals, ++i) {
624624 unsigned Reg = cast(Node->getOperand(i))->getReg();
5353
5454 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
5555 switch (VT.getSimpleVT()) {
56 default: LLVM_UNREACHABLE("Unknown FP format");
56 default: llvm_unreachable("Unknown FP format");
5757 case MVT::f32: return &APFloat::IEEEsingle;
5858 case MVT::f64: return &APFloat::IEEEdouble;
5959 case MVT::f80: return &APFloat::x87DoubleExtended;
243243 /// if the operation does not depend on the sign of the input (setne and seteq).
244244 static int isSignedOp(ISD::CondCode Opcode) {
245245 switch (Opcode) {
246 default: LLVM_UNREACHABLE("Illegal integer setcc operation!");
246 default: llvm_unreachable("Illegal integer setcc operation!");
247247 case ISD::SETEQ:
248248 case ISD::SETNE: return 0;
249249 case ISD::SETLT:
363363 switch (N->getOpcode()) {
364364 case ISD::TargetExternalSymbol:
365365 case ISD::ExternalSymbol:
366 LLVM_UNREACHABLE("Should only be used on nodes with operands");
366 llvm_unreachable("Should only be used on nodes with operands");
367367 default: break; // Normal nodes don't need extra info.
368368 case ISD::ARG_FLAGS:
369369 ID.AddInteger(cast(N)->getArgFlags().getRawBits());
626626 bool Erased = false;
627627 switch (N->getOpcode()) {
628628 case ISD::EntryToken:
629 LLVM_UNREACHABLE("EntryToken should not be in CSEMaps!");
629 llvm_unreachable("EntryToken should not be in CSEMaps!");
630630 return false;
631631 case ISD::HANDLENODE: return false; // noop.
632632 case ISD::CONDCODE:
668668 !N->isMachineOpcode() && !doNotCSE(N)) {
669669 N->dump(this);
670670 cerr << "\n";
671 LLVM_UNREACHABLE("Node is not in map!");
671 llvm_unreachable("Node is not in map!");
672672 }
673673 #endif
674674 return Erased;
14421442 const APInt &C1 = N1C->getAPIntValue();
14431443
14441444 switch (Cond) {
1445 default: LLVM_UNREACHABLE("Unknown integer setcc!");
1445 default: llvm_unreachable("Unknown integer setcc!");
14461446 case ISD::SETEQ: return getConstant(C1 == C2, VT);
14471447 case ISD::SETNE: return getConstant(C1 != C2, VT);
14481448 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
23712371 case ISD::MERGE_VALUES:
23722372 case ISD::CONCAT_VECTORS:
23732373 return Operand; // Factor, merge or concat of one node? No need.
2374 case ISD::FP_ROUND: LLVM_UNREACHABLE("Invalid method to make FP_ROUND node");
2374 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
23752375 case ISD::FP_EXTEND:
23762376 assert(VT.isFloatingPoint() &&
23772377 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
29462946 }
29472947 break;
29482948 case ISD::VECTOR_SHUFFLE:
2949 LLVM_UNREACHABLE("should use getVectorShuffle constructor!");
2949 llvm_unreachable("should use getVectorShuffle constructor!");
29502950 break;
29512951 case ISD::BIT_CONVERT:
29522952 // Fold bit_convert nodes from a type to themselves.
40604060
40614061 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
40624062 switch (NumVTs) {
4063 case 0: LLVM_UNREACHABLE("Cannot have nodes without results!");
4063 case 0: llvm_unreachable("Cannot have nodes without results!");
40644064 case 1: return getVTList(VTs[0]);
40654065 case 2: return getVTList(VTs[0], VTs[1]);
40664066 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
53415341
53425342 case ISD::CONVERT_RNDSAT: {
53435343 switch (cast(this)->getCvtCode()) {
5344 default: LLVM_UNREACHABLE("Unknown cvt code!");
5344 default: llvm_unreachable("Unknown cvt code!");
53455345 case ISD::CVT_FF: return "cvt_ff";
53465346 case ISD::CVT_FS: return "cvt_fs";
53475347 case ISD::CVT_FU: return "cvt_fu";
53935393
53945394 case ISD::CONDCODE:
53955395 switch (cast(this)->get()) {
5396 default: LLVM_UNREACHABLE("Unknown setcc condition!");
5396 default: llvm_unreachable("Unknown setcc condition!");
53975397 case ISD::SETOEQ: return "setoeq";
53985398 case ISD::SETOGT: return "setogt";
53995399 case ISD::SETOGE: return "setoge";
555555 if (PartVT.getSizeInBits() == ValueVT.getSizeInBits())
556556 return DAG.getNode(ISD::BIT_CONVERT, dl, ValueVT, Val);
557557
558 LLVM_UNREACHABLE("Unknown mismatch!");
558 llvm_unreachable("Unknown mismatch!");
559559 return SDValue();
560560 }
561561
591591 ValueVT = MVT::getIntegerVT(NumParts * PartBits);
592592 Val = DAG.getNode(ExtendKind, dl, ValueVT, Val);
593593 } else {
594 LLVM_UNREACHABLE("Unknown mismatch!");
594 llvm_unreachable("Unknown mismatch!");
595595 }
596596 } else if (PartBits == ValueVT.getSizeInBits()) {
597597 // Different types of the same size.
603603 ValueVT = MVT::getIntegerVT(NumParts * PartBits);
604604 Val = DAG.getNode(ISD::TRUNCATE, dl, ValueVT, Val);
605605 } else {
606 LLVM_UNREACHABLE("Unknown mismatch!");
606 llvm_unreachable("Unknown mismatch!");
607607 }
608608 }
609609
817817 // Note: this doesn't use InstVisitor, because it has to work with
818818 // ConstantExpr's in addition to instructions.
819819 switch (Opcode) {
820 default: LLVM_UNREACHABLE("Unknown instruction type encountered!");
820 default: llvm_unreachable("Unknown instruction type encountered!");
821821 // Build the switch statement using the Instruction.def file.
822822 #define HANDLE_INST(NUM, OPCODE, CLASS) \
823823 case Instruction::OPCODE:return visit##OPCODE((CLASS&)I);
10721072 case FCmpInst::FCMP_UNE: FOC = ISD::SETNE; FPC = ISD::SETUNE; break;
10731073 case FCmpInst::FCMP_TRUE: FOC = FPC = ISD::SETTRUE; break;
10741074 default:
1075 LLVM_UNREACHABLE("Invalid FCmp predicate opcode!");
1075 llvm_unreachable("Invalid FCmp predicate opcode!");
10761076 FOC = FPC = ISD::SETFALSE;
10771077 break;
10781078 }
10981098 case ICmpInst::ICMP_SGT: return ISD::SETGT;
10991099 case ICmpInst::ICMP_UGT: return ISD::SETUGT;
11001100 default:
1101 LLVM_UNREACHABLE("Invalid ICmp predicate opcode!");
1101 llvm_unreachable("Invalid ICmp predicate opcode!");
11021102 return ISD::SETNE;
11031103 }
11041104 }
11301130 Condition = getFCmpCondCode(FC->getPredicate());
11311131 } else {
11321132 Condition = ISD::SETEQ; // silence warning.
1133 LLVM_UNREACHABLE("Unknown compare instruction");
1133 llvm_unreachable("Unknown compare instruction");
11341134 }
11351135
11361136 CaseBlock CB(Condition, BOp->getOperand(0),
42554255
42564256 case Intrinsic::gcread:
42574257 case Intrinsic::gcwrite:
4258 LLVM_UNREACHABLE("GC failed to lower gcread/gcwrite intrinsics!");
4258 llvm_unreachable("GC failed to lower gcread/gcwrite intrinsics!");
42594259 return 0;
42604260
42614261 case Intrinsic::flt_rounds: {
57625762 }
57635763
57645764 SDValue TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
5765 LLVM_UNREACHABLE("LowerOperation not implemented for this target!");
5765 llvm_unreachable("LowerOperation not implemented for this target!");
57665766 return SDValue();
57675767 }
57685768
539539 void visitVACopy(CallInst &I);
540540
541541 void visitUserOp1(Instruction &I) {
542 LLVM_UNREACHABLE("UserOp1 should not exist at instruction selection time!");
542 llvm_unreachable("UserOp1 should not exist at instruction selection time!");
543543 }
544544 void visitUserOp2(Instruction &I) {
545 LLVM_UNREACHABLE("UserOp2 should not exist at instruction selection time!");
545 llvm_unreachable("UserOp2 should not exist at instruction selection time!");
546546 }
547547
548548 const char *implVisitBinaryAtomic(CallInst& I, ISD::NodeType Op);
156156 "'usesCustomDAGSchedInserter', it must implement "
157157 "TargetLowering::EmitInstrWithCustomInserter!";
158158 #endif
159 llvm_unreachable();
159 llvm_unreachable(0);
160160 return 0;
161161 }
162162
877877 if (EnableFastISelAbort)
878878 // The "fast" selector couldn't handle something and bailed.
879879 // For the purpose of debugging, just abort.
880 LLVM_UNREACHABLE("FastISel didn't select the entire block");
880 llvm_unreachable("FastISel didn't select the entire block");
881881 }
882882 break;
883883 }
18401840 if (CFP->getValueAPF().isNaN()) {
18411841 // If an operand is known to be a nan, we can fold it.
18421842 switch (ISD::getUnorderedFlavor(Cond)) {
1843 default: LLVM_UNREACHABLE("Unknown flavor!");
1843 default: llvm_unreachable("Unknown flavor!");
18441844 case 0: // Known false.
18451845 return DAG.getConstant(0, VT);
18461846 case 1: // Known true.
20002000 SDValue Temp;
20012001 if (N0.getValueType() == MVT::i1 && foldBooleans) {
20022002 switch (Cond) {
2003 default: LLVM_UNREACHABLE("Unknown integer setcc!");
2003 default: llvm_unreachable("Unknown integer setcc!");
20042004 case ISD::SETEQ: // X == Y -> ~(X^Y)
20052005 Temp = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
20062006 N0 = DAG.getNOT(dl, Temp, MVT::i1);
23102310 /// is.
23112311 static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
23122312 switch (CT) {
2313 default: LLVM_UNREACHABLE("Unknown constraint type!");
2313 default: llvm_unreachable("Unknown constraint type!");
23142314 case TargetLowering::C_Other:
23152315 case TargetLowering::C_Unknown:
23162316 return 0;
13441344 DstSubIdx = CopyMI->getOperand(3).getImm();
13451345 SrcReg = CopyMI->getOperand(2).getReg();
13461346 } else if (!tii_->isMoveInstr(*CopyMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)){
1347 LLVM_UNREACHABLE("Unrecognized copy instruction!");
1347 llvm_unreachable("Unrecognized copy instruction!");
13481348 }
13491349
13501350 // If they are already joined we continue.
20612061 *tri_->getSuperRegisters(LHS.reg))
20622062 // Imprecise sub-register information. Can't handle it.
20632063 return false;
2064 LLVM_UNREACHABLE("No copies from the RHS?");
2064 llvm_unreachable("No copies from the RHS?");
20652065 } else {
20662066 LHSValNo = EliminatedLHSVals[0];
20672067 }
999999 // Unfold current MI.
10001000 SmallVector NewMIs;
10011001 if (!TII->unfoldMemoryOperand(MF, &MI, VirtReg, false, false, NewMIs))
1002 LLVM_UNREACHABLE("Unable unfold the load / store folding instruction!");
1002 llvm_unreachable("Unable unfold the load / store folding instruction!");
10031003 assert(NewMIs.size() == 1);
10041004 AssignPhysToVirtReg(NewMIs[0], VirtReg, PhysReg);
10051005 VRM.transferRestorePts(&MI, NewMIs[0]);
10151015 NextMII = next(NextMII);
10161016 NewMIs.clear();
10171017 if (!TII->unfoldMemoryOperand(MF, &NextMI, VirtReg, false, false, NewMIs))
1018 LLVM_UNREACHABLE("Unable unfold the load / store folding instruction!");
1018 llvm_unreachable("Unable unfold the load / store folding instruction!");
10191019 assert(NewMIs.size() == 1);
10201020 AssignPhysToVirtReg(NewMIs[0], VirtReg, PhysReg);
10211021 VRM.transferRestorePts(&NextMI, NewMIs[0]);
14511451 assert(RC && "Unable to determine register class!");
14521452 int SS = VRM.getEmergencySpillSlot(RC);
14531453 if (UsedSS.count(SS))
1454 LLVM_UNREACHABLE("Need to spill more than one physical registers!");
1454 llvm_unreachable("Need to spill more than one physical registers!");
14551455 UsedSS.insert(SS);
14561456 TII->storeRegToStackSlot(MBB, MII, PhysReg, true, SS, RC);
14571457 MachineInstr *StoreMI = prior(MII);
21762176
21772177 llvm::VirtRegRewriter* llvm::createVirtRegRewriter() {
21782178 switch (RewriterOpt) {
2179 default: LLVM_UNREACHABLE("Unreachable!");
2179 default: llvm_unreachable("Unreachable!");
21802180 case local:
21812181 return new LocalRewriter();
21822182 case trivial:
420420 const_cast(dyn_cast(GV)))
421421 EmitGlobalVariable(GVar);
422422 else
423 LLVM_UNREACHABLE("Global hasn't had an address allocated yet!");
423 llvm_unreachable("Global hasn't had an address allocated yet!");
424424 return state.getGlobalAddressMap(locked)[GV];
425425 }
426426
547547 GenericValue GV = getConstantValue(Op0);
548548 const Type* DestTy = CE->getType();
549549 switch (Op0->getType()->getTypeID()) {
550 default: LLVM_UNREACHABLE("Invalid bitcast operand");
550 default: llvm_unreachable("Invalid bitcast operand");
551551 case Type::IntegerTyID:
552552 assert(DestTy->isFloatingPoint() && "invalid bitcast");
553553 if (DestTy == Type::FloatTy)
586586 GenericValue RHS = getConstantValue(CE->getOperand(1));
587587 GenericValue GV;
588588 switch (CE->getOperand(0)->getType()->getTypeID()) {
589 default: LLVM_UNREACHABLE("Bad add type!");
589 default: llvm_unreachable("Bad add type!");
590590 case Type::IntegerTyID:
591591 switch (CE->getOpcode()) {
592 default: LLVM_UNREACHABLE("Invalid integer opcode");
592 default: llvm_unreachable("Invalid integer opcode");
593593 case Instruction::Add: GV.IntVal = LHS.IntVal + RHS.IntVal; break;
594594 case Instruction::Sub: GV.IntVal = LHS.IntVal - RHS.IntVal; break;
595595 case Instruction::Mul: GV.IntVal = LHS.IntVal * RHS.IntVal; break;
604604 break;
605605 case Type::FloatTyID:
606606 switch (CE->getOpcode()) {
607 default: LLVM_UNREACHABLE("Invalid float opcode");
607 default: llvm_unreachable("Invalid float opcode");
608608 case Instruction::FAdd:
609609 GV.FloatVal = LHS.FloatVal + RHS.FloatVal; break;
610610 case Instruction::FSub:
619619 break;
620620 case Type::DoubleTyID:
621621 switch (CE->getOpcode()) {
622 default: LLVM_UNREACHABLE("Invalid double opcode");
622 default: llvm_unreachable("Invalid double opcode");
623623 case Instruction::FAdd:
624624 GV.DoubleVal = LHS.DoubleVal + RHS.DoubleVal; break;
625625 case Instruction::FSub:
637637 case Type::FP128TyID: {
638638 APFloat apfLHS = APFloat(LHS.IntVal);
639639 switch (CE->getOpcode()) {
640 default: LLVM_UNREACHABLE("Invalid long double opcode");llvm_unreachable();
640 default: llvm_unreachable("Invalid long double opcode");llvm_unreachable(0);
641641 case Instruction::FAdd:
642642 apfLHS.add(APFloat(RHS.IntVal), APFloat::rmNearestTiesToEven);
643643 GV.IntVal = apfLHS.bitcastToAPInt();
697697 else if (const GlobalVariable* GV = dyn_cast(C))
698698 Result = PTOGV(getOrEmitGlobalVariable(const_cast(GV)));
699699 else
700 LLVM_UNREACHABLE("Unknown constant pointer type!");
700 llvm_unreachable("Unknown constant pointer type!");
701701 break;
702702 default:
703703 std::string msg;
880880 }
881881
882882 cerr << "Bad Type: " << *Init->getType() << "\n";
883 LLVM_UNREACHABLE("Unknown constant type to initialize memory with!");
883 llvm_unreachable("Unknown constant type to initialize memory with!");
884884 }
885885
886886 /// EmitGlobals - Emit all of the global variables to memory, storing their
4545 GenVal->DoubleVal = N;
4646 break;
4747 default:
48 LLVM_UNREACHABLE("LLVMGenericValueToFloat supports only float and double.");
48 llvm_unreachable("LLVMGenericValueToFloat supports only float and double.");
4949 }
5050 return wrap(GenVal);
5151 }
7474 case Type::DoubleTyID:
7575 return unwrap(GenVal)->DoubleVal;
7676 default:
77 LLVM_UNREACHABLE("LLVMGenericValueToFloat supports only float and double.");
77 llvm_unreachable("LLVMGenericValueToFloat supports only float and double.");
7878 break;
7979 }
8080 return 0; // Not reached
5757 IMPLEMENT_BINARY_OPERATOR(+, Double);
5858 default:
5959 cerr << "Unhandled type for FAdd instruction: " << *Ty << "\n";
60 llvm_unreachable();
60 llvm_unreachable(0);
6161 }
6262 }
6363
6868 IMPLEMENT_BINARY_OPERATOR(-, Double);
6969 default:
7070 cerr << "Unhandled type for FSub instruction: " << *Ty << "\n";
71 llvm_unreachable();
71 llvm_unreachable(0);
7272 }
7373 }
7474
7979 IMPLEMENT_BINARY_OPERATOR(*, Double);
8080 default:
8181 cerr << "Unhandled type for FMul instruction: " << *Ty << "\n";
82 llvm_unreachable();
82 llvm_unreachable(0);
8383 }
8484 }
8585
9090 IMPLEMENT_BINARY_OPERATOR(/, Double);
9191 default:
9292 cerr << "Unhandled type for FDiv instruction: " << *Ty << "\n";
93 llvm_unreachable();
93 llvm_unreachable(0);
9494 }
9595 }
9696
105105 break;
106106 default:
107107 cerr << "Unhandled type for Rem instruction: " << *Ty << "\n";
108 llvm_unreachable();
108 llvm_unreachable(0);
109109 }
110110 }
111111
132132 IMPLEMENT_POINTER_ICMP(==);
133133 default:
134134 cerr << "Unhandled type for ICMP_EQ predicate: " << *Ty << "\n";
135 llvm_unreachable();
135 llvm_unreachable(0);
136136 }
137137 return Dest;
138138 }
145145 IMPLEMENT_POINTER_ICMP(!=);
146146 default:
147147 cerr << "Unhandled type for ICMP_NE predicate: " << *Ty << "\n";
148 llvm_unreachable();
148 llvm_unreachable(0);
149149 }
150150 return Dest;
151151 }
158158 IMPLEMENT_POINTER_ICMP(<);
159159 default:
160160 cerr << "Unhandled type for ICMP_ULT predicate: " << *Ty << "\n";
161 llvm_unreachable();
161 llvm_unreachable(0);
162162 }
163163 return Dest;
164164 }
171171 IMPLEMENT_POINTER_ICMP(<);
172172 default:
173173 cerr << "Unhandled type for ICMP_SLT predicate: " << *Ty << "\n";
174 llvm_unreachable();
174 llvm_unreachable(0);
175175 }
176176 return Dest;
177177 }
184184 IMPLEMENT_POINTER_ICMP(>);
185185 default:
186186 cerr << "Unhandled type for ICMP_UGT predicate: " << *Ty << "\n";
187 llvm_unreachable();
187 llvm_unreachable(0);
188188 }
189189 return Dest;
190190 }
197197 IMPLEMENT_POINTER_ICMP(>);
198198 default:
199199 cerr << "Unhandled type for ICMP_SGT predicate: " << *Ty << "\n";
200 llvm_unreachable();
200 llvm_unreachable(0);
201201 }
202202 return Dest;
203203 }
210210 IMPLEMENT_POINTER_ICMP(<=);
211211 default:
212212 cerr << "Unhandled type for ICMP_ULE predicate: " << *Ty << "\n";
213 llvm_unreachable();
213 llvm_unreachable(0);
214214 }
215215 return Dest;
216216 }
223223 IMPLEMENT_POINTER_ICMP(<=);
224224 default:
225225 cerr << "Unhandled type for ICMP_SLE predicate: " << *Ty << "\n";
226 llvm_unreachable();
226 llvm_unreachable(0);
227227 }
228228 return Dest;
229229 }
236236 IMPLEMENT_POINTER_ICMP(>=);
237237 default:
238238 cerr << "Unhandled type for ICMP_UGE predicate: " << *Ty << "\n";
239 llvm_unreachable();
239 llvm_unreachable(0);
240240 }
241241 return Dest;
242242 }
249249 IMPLEMENT_POINTER_ICMP(>=);
250250 default:
251251 cerr << "Unhandled type for ICMP_SGE predicate: " << *Ty << "\n";
252 llvm_unreachable();
252 llvm_unreachable(0);
253253 }
254254 return Dest;
255255 }
274274 case ICmpInst::ICMP_SGE: R = executeICMP_SGE(Src1, Src2, Ty); break;
275275 default:
276276 cerr << "Don't know how to handle this ICmp predicate!\n-->" << I;
277 llvm_unreachable();
277 llvm_unreachable(0);
278278 }
279279
280280 SetValue(&I, R, SF);
293293 IMPLEMENT_FCMP(==, Double);
294294 default:
295295 cerr << "Unhandled type for FCmp EQ instruction: " << *Ty << "\n";
296 llvm_unreachable();
296 llvm_unreachable(0);
297297 }
298298 return Dest;
299299 }
307307
308308 default:
309309 cerr << "Unhandled type for FCmp NE instruction: " << *Ty << "\n";
310 llvm_unreachable();
310 llvm_unreachable(0);
311311 }
312312 return Dest;
313313 }
320320 IMPLEMENT_FCMP(<=, Double);
321321 default:
322322 cerr << "Unhandled type for FCmp LE instruction: " << *Ty << "\n";
323 llvm_unreachable();
323 llvm_unreachable(0);
324324 }
325325 return Dest;
326326 }
333333 IMPLEMENT_FCMP(>=, Double);
334334 default:
335335 cerr << "Unhandled type for FCmp GE instruction: " << *Ty << "\n";
336 llvm_unreachable();
336 llvm_unreachable(0);
337337 }
338338 return Dest;
339339 }
346346 IMPLEMENT_FCMP(<, Double);
347347 default:
348348 cerr << "Unhandled type for FCmp LT instruction: " << *Ty << "\n";
349 llvm_unreachable();
349 llvm_unreachable(0);
350350 }
351351 return Dest;
352352 }
359359 IMPLEMENT_FCMP(>, Double);
360360 default:
361361 cerr << "Unhandled type for FCmp GT instruction: " << *Ty << "\n";
362 llvm_unreachable();
362 llvm_unreachable(0);
363363 }
364364 return Dest;
365365 }
468468 case FCmpInst::FCMP_OGE: R = executeFCMP_OGE(Src1, Src2, Ty); break;
469469 default:
470470 cerr << "Don't know how to handle this FCmp predicate!\n-->" << I;
471 llvm_unreachable();
471 llvm_unreachable(0);
472472 }
473473
474474 SetValue(&I, R, SF);
514514 }
515515 default:
516516 cerr << "Unhandled Cmp predicate\n";
517 llvm_unreachable();
517 llvm_unreachable(0);
518518 }
519519 }
520520
543543 case Instruction::Xor: R.IntVal = Src1.IntVal ^ Src2.IntVal; break;
544544 default:
545545 cerr << "Don't know how to handle this binary operator!\n-->" << I;
546 llvm_unreachable();
546 llvm_unreachable(0);
547547 }
548548
549549 SetValue(&I, R, SF);
10781078 } else if (SrcTy->isInteger()) {
10791079 Dest.IntVal = Src.IntVal;
10801080 } else
1081 LLVM_UNREACHABLE("Invalid BitCast");
1081 llvm_unreachable("Invalid BitCast");
10821082 } else if (DstTy == Type::FloatTy) {
10831083 if (SrcTy->isInteger())
10841084 Dest.FloatVal = Src.IntVal.bitsToFloat();
10901090 else
10911091 Dest.DoubleVal = Src.DoubleVal;
10921092 } else
1093 LLVM_UNREACHABLE("Invalid Bitcast");
1093 llvm_unreachable("Invalid Bitcast");
10941094
10951095 return Dest;
10961096 }
11751175 IMPLEMENT_VAARG(Double);
11761176 default:
11771177 cerr << "Unhandled dest type for vaarg instruction: " << *Ty << "\n";
1178 llvm_unreachable();
1178 llvm_unreachable(0);
11791179 }
11801180
11811181 // Set the Value of this Instruction.
12621262 break;
12631263 default:
12641264 cerr << "Unhandled ConstantExpr: " << *CE << "\n";
1265 llvm_unreachable();
1265 llvm_unreachable(0);
12661266 return GenericValue();
12671267 }
12681268 return Dest;
13441344 DOUT << " --> ";
13451345 const GenericValue &Val = SF.Values[&I];
13461346 switch (I.getType()->getTypeID()) {
1347 default: LLVM_UNREACHABLE("Invalid GenericValue Type");
1347 default: llvm_unreachable("Invalid GenericValue Type");
13481348 case Type::VoidTyID: DOUT << "void"; break;
13491349 case Type::FloatTyID: DOUT << "float " << Val.FloatVal; break;
13501350 case Type::DoubleTyID: DOUT << "double " << Val.DoubleVal; break;
146146 void visitStoreInst(StoreInst &I);
147147 void visitGetElementPtrInst(GetElementPtrInst &I);
148148 void visitPHINode(PHINode &PN) {
149 LLVM_UNREACHABLE("PHI nodes already handled!");
149 llvm_unreachable("PHI nodes already handled!");
150150 }
151151 void visitTruncInst(TruncInst &I);
152152 void visitZExtInst(ZExtInst &I);
176176 void visitVAArgInst(VAArgInst &I);
177177 void visitInstruction(Instruction &I) {
178178 cerr << I;
179 LLVM_UNREACHABLE("Instruction not interpretable yet!");
179 llvm_unreachable("Instruction not interpretable yet!");
180180 }
181181
182182 GenericValue callExternalFunction(Function *F,
409409 if (ArgValues.empty()) {
410410 GenericValue rv;
411411 switch (RetTy->getTypeID()) {
412 default: LLVM_UNREACHABLE("Unknown return type for function call!");
412 default: llvm_unreachable("Unknown return type for function call!");
413413 case Type::IntegerTyID: {
414414 unsigned BitWidth = cast(RetTy)->getBitWidth();
415415 if (BitWidth == 1)
423423 else if (BitWidth <= 64)
424424 rv.IntVal = APInt(BitWidth, ((int64_t(*)())(intptr_t)FPtr)());
425425 else
426 LLVM_UNREACHABLE("Integer types > 64 bits not supported");
426 llvm_unreachable("Integer types > 64 bits not supported");
427427 return rv;
428428 }
429429 case Type::VoidTyID:
438438 case Type::X86_FP80TyID:
439439 case Type::FP128TyID:
440440 case Type::PPC_FP128TyID:
441 LLVM_UNREACHABLE("long double not supported yet");
441 llvm_unreachable("long double not supported yet");
442442 return rv;
443443 case Type::PointerTyID:
444444 return PTOGV(((void*(*)())(intptr_t)FPtr)());
466466 const Type *ArgTy = FTy->getParamType(i);
467467 const GenericValue &AV = ArgValues[i];
468468 switch (ArgTy->getTypeID()) {
469 default: LLVM_UNREACHABLE("Unknown argument type for function call!");
469 default: llvm_unreachable("Unknown argument type for function call!");
470470 case Type::IntegerTyID:
471471 C = ConstantInt::get(AV.IntVal);
472472 break;
110110
111111 JCE->emitULEB128Bytes(Offset);
112112 } else {
113 LLVM_UNREACHABLE("Machine move no supported yet.");
113 llvm_unreachable("Machine move no supported yet.");
114114 }
115115 } else if (Src.isReg() &&
116116 Src.getReg() == MachineLocation::VirtualFP) {
118118 JCE->emitByte(dwarf::DW_CFA_def_cfa_register);
119119 JCE->emitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), true));
120120 } else {
121 LLVM_UNREACHABLE("Machine move no supported yet.");
121 llvm_unreachable("Machine move no supported yet.");
122122 }
123123 } else {
124124 unsigned Reg = RI->getDwarfRegNum(Src.getReg(), true);
761761
762762 FinalSize += TargetAsmInfo::getULEB128Size(Offset);
763763 } else {
764 LLVM_UNREACHABLE("Machine move no supported yet.");
764 llvm_unreachable("Machine move no supported yet.");
765765 }
766766 } else if (Src.isReg() &&
767767 Src.getReg() == MachineLocation::VirtualFP) {
770770 unsigned RegNum = RI->getDwarfRegNum(Dst.getReg(), true);
771771 FinalSize += TargetAsmInfo::getULEB128Size(RegNum);
772772 } else {
773 LLVM_UNREACHABLE("Machine move no supported yet.");
773 llvm_unreachable("Machine move no supported yet.");
774774 }
775775 } else {
776776 unsigned Reg = RI->getDwarfRegNum(Src.getReg(), true);
8080 std::string Magic;
8181 Pathname.getMagicNumber(Magic, 64);
8282 switch (sys::IdentifyFileType(Magic.c_str(), 64)) {
83 default: LLVM_UNREACHABLE("Bad file type identification");
83 default: llvm_unreachable("Bad file type identification");
8484 case sys::Unknown_FileType:
8585 return warning("Supposed library '" + Lib + "' isn't a library.");
8686
178178 std::string Magic;
179179 File.getMagicNumber(Magic, 64);
180180 switch (sys::IdentifyFileType(Magic.c_str(), 64)) {
181 default: LLVM_UNREACHABLE("Bad file type identification");
181 default: llvm_unreachable("Bad file type identification");
182182 case sys::Unknown_FileType:
183183 return warning("Ignoring file '" + File.toString() +
184184 "' because does not contain bitcode.");
392392 Result = CE->getWithOperands(Ops);
393393 } else {
394394 assert(!isa(CPV) && "Unmapped global?");
395 LLVM_UNREACHABLE("Unknown type of derived type constant value!");
395 llvm_unreachable("Unknown type of derived type constant value!");
396396 }
397397 } else if (isa(In)) {
398398 Result = const_cast(In);
409409 PrintMap(ValueMap);
410410
411411 cerr << "Couldn't remap value: " << (void*)In << " " << *In << "\n";
412 LLVM_UNREACHABLE("Couldn't remap value!");
412 llvm_unreachable("Couldn't remap value!");
413413 #endif
414414 return 0;
415415 }
899899 // Nothing is required, mapped values will take the new global
900900 // automatically.
901901 } else if (DGVar->hasAppendingLinkage()) {
902 LLVM_UNREACHABLE("Appending linkage unimplemented!");
902 llvm_unreachable("Appending linkage unimplemented!");
903903 } else {
904 LLVM_UNREACHABLE("Unknown linkage!");
904 llvm_unreachable("Unknown linkage!");
905905 }
906906 } else {
907907 // Copy the initializer over now...
203203 // Need target hooks to know how to print this.
204204 switch (Size) {
205205 default:
206 LLVM_UNREACHABLE("Invalid size for machine code value!");
206 llvm_unreachable("Invalid size for machine code value!");
207207 case 1: OS << ".byte"; break;
208208 case 2: OS << ".short"; break;
209209 case 4: OS << ".long"; break;
224224
225225 switch (ValueSize) {
226226 default:
227 LLVM_UNREACHABLE("Invalid size for machine code value!");
227 llvm_unreachable("Invalid size for machine code value!");
228228 case 8:
229 LLVM_UNREACHABLE("Unsupported alignment size!");
229 llvm_unreachable("Unsupported alignment size!");
230230 case 1: OS << (IsPow2 ? ".p2align" : ".balign"); break;
231231 case 2: OS << (IsPow2 ? ".p2alignw" : ".balignw"); break;
232232 case 4: OS << (IsPow2 ? ".p2alignl" : ".balignl"); break;
10681068
10691069 switch (rounding_mode) {
10701070 default:
1071 llvm_unreachable();
1071 llvm_unreachable(0);
10721072
10731073 case rmNearestTiesToAway:
10741074 return lost_fraction == lfExactlyHalf || lost_fraction == lfMoreThanHalf;
12071207 {
12081208 switch (convolve(category, rhs.category)) {
12091209 default:
1210 llvm_unreachable();
1210 llvm_unreachable(0);
12111211
12121212 case convolve(fcNaN, fcZero):
12131213 case convolve(fcNaN, fcNormal):
13311331 {
13321332 switch (convolve(category, rhs.category)) {
13331333 default:
1334 llvm_unreachable();
1334 llvm_unreachable(0);
13351335
13361336 case convolve(fcNaN, fcZero):
13371337 case convolve(fcNaN, fcNormal):
13731373 {
13741374 switch (convolve(category, rhs.category)) {
13751375 default:
1376 llvm_unreachable();
1376 llvm_unreachable(0);
13771377
13781378 case convolve(fcNaN, fcZero):
13791379 case convolve(fcNaN, fcNormal):
14151415 {
14161416 switch (convolve(category, rhs.category)) {
14171417 default:
1418 llvm_unreachable();
1418 llvm_unreachable(0);
14191419
14201420 case convolve(fcNaN, fcZero):
14211421 case convolve(fcNaN, fcNormal):
16921692
16931693 switch (convolve(category, rhs.category)) {
16941694 default:
1695 llvm_unreachable();
1695 llvm_unreachable(0);
16961696
16971697 case convolve(fcNaN, fcZero):
16981698 case convolve(fcNaN, fcNormal):
29292929 else if (api.getBitWidth()==128 && !isIEEE)
29302930 return initFromPPCDoubleDoubleAPInt(api);
29312931 else
2932 llvm_unreachable();
2932 llvm_unreachable(0);
29332933 }
29342934
29352935 APFloat::APFloat(const APInt& api, bool isIEEE)
13861386 else
13871387 return x_old + 1;
13881388 } else
1389 LLVM_UNREACHABLE("Error in APInt::sqrt computation");
1389 llvm_unreachable("Error in APInt::sqrt computation");
13901390 return x_old + 1;
13911391 }
13921392
20322032 char cdigit = str[i];
20332033 if (radix == 16) {
20342034 if (!isxdigit(cdigit))
2035 LLVM_UNREACHABLE("Invalid hex digit in string");
2035 llvm_unreachable("Invalid hex digit in string");
20362036 if (isdigit(cdigit))
20372037 digit = cdigit - '0';
20382038 else if (cdigit >= 'a')
20402040 else if (cdigit >= 'A')
20412041 digit = cdigit - 'A' + 10;
20422042 else
2043 LLVM_UNREACHABLE("huh? we shouldn't get here");
2043 llvm_unreachable("huh? we shouldn't get here");
20442044 } else if (isdigit(cdigit)) {
20452045 digit = cdigit - '0';
20462046 assert((radix == 10 ||
20482048 (radix == 2 && (digit == 0 || digit == 1))) &&
20492049 "Invalid digit in string for given radix");
20502050 } else {
2051 LLVM_UNREACHABLE("Invalid character in digit string");
2051 llvm_unreachable("Invalid character in digit string");
20522052 }
20532053
20542054 // Shift or multiply the value by the radix
204204 cerr << ProgramName
205205 << ": Bad ValueMask flag! CommandLine usage error:"
206206 << Handler->getValueExpectedFlag() << "\n";
207 llvm_unreachable();
207 llvm_unreachable(0);
208208 }
209209
210210 // If this isn't a multi-arg option, just run the handler.
692692 ValNo++;
693693 break;
694694 default:
695 LLVM_UNREACHABLE("Internal error, unexpected NumOccurrences flag in "
695 llvm_unreachable("Internal error, unexpected NumOccurrences flag in "
696696 "positional argument processing!");
697697 }
698698 }
8383 case DW_TAG_lo_user: return "DW_TAG_lo_user";
8484 case DW_TAG_hi_user: return "DW_TAG_hi_user";
8585 }
86 LLVM_UNREACHABLE("Unknown Dwarf Tag");
86 llvm_unreachable("Unknown Dwarf Tag");
8787 return "";
8888 }
8989
9494 case DW_CHILDREN_no: return "CHILDREN_no";
9595 case DW_CHILDREN_yes: return "CHILDREN_yes";
9696 }
97 LLVM_UNREACHABLE("Unknown Dwarf ChildrenFlag");
97 llvm_unreachable("Unknown Dwarf ChildrenFlag");
9898 return "";
9999 }
100100
205205 case DW_AT_APPLE_major_runtime_vers: return "DW_AT_APPLE_major_runtime_vers";
206206 case DW_AT_APPLE_runtime_class: return "DW_AT_APPLE_runtime_class";
207207 }
208 LLVM_UNREACHABLE("Unknown Dwarf Attribute");
208 llvm_unreachable("Unknown Dwarf Attribute");
209209 return "";
210210 }
211211
235235 case DW_FORM_ref_udata: return "FORM_ref_udata";
236236 case DW_FORM_indirect: return "FORM_indirect";
237237 }
238 LLVM_UNREACHABLE("Unknown Dwarf Form Encoding");
238 llvm_unreachable("Unknown Dwarf Form Encoding");
239239 return "";
240240 }
241241
310310 case DW_OP_lo_user: return "OP_lo_user";
311311 case DW_OP_hi_user: return "OP_hi_user";
312312 }
313 LLVM_UNREACHABLE("Unknown Dwarf Operation Encoding");
313 llvm_unreachable("Unknown Dwarf Operation Encoding");
314314 return "";
315315 }
316316
336336 case DW_ATE_lo_user: return "ATE_lo_user";
337337 case DW_ATE_hi_user: return "ATE_hi_user";
338338 }
339 LLVM_UNREACHABLE("Unknown Dwarf Attribute Encoding");
339 llvm_unreachable("Unknown Dwarf Attribute Encoding");
340340 return "";
341341 }
342342
350350 case DW_DS_leading_separate: return "DS_leading_separate";
351351 case DW_DS_trailing_separate: return "DS_trailing_separate";
352352 }
353 LLVM_UNREACHABLE("Unknown Dwarf Decimal Sign Attribute");
353 llvm_unreachable("Unknown Dwarf Decimal Sign Attribute");
354354 return "";
355355 }
356356
364364 case DW_END_lo_user: return "END_lo_user";
365365 case DW_END_hi_user: return "END_hi_user";
366366 }
367 LLVM_UNREACHABLE("Unknown Dwarf Endianity");
367 llvm_unreachable("Unknown Dwarf Endianity");
368368 return "";
369369 }
370370
377377 case DW_ACCESS_protected: return "ACCESS_protected";
378378 case DW_ACCESS_private: return "ACCESS_private";
379379 }
380 LLVM_UNREACHABLE("Unknown Dwarf Accessibility");
380 llvm_unreachable("Unknown Dwarf Accessibility");
381381 return "";
382382 }
383383
389389 case DW_VIS_exported: return "VIS_exported";
390390 case DW_VIS_qualified: return "VIS_qualified";
391391 }
392 LLVM_UNREACHABLE("Unknown Dwarf Visibility");
392 llvm_unreachable("Unknown Dwarf Visibility");
393393 return "";
394394 }
395395
401401 case DW_VIRTUALITY_virtual: return "VIRTUALITY_virtual";
402402 case DW_VIRTUALITY_pure_virtual: return "VIRTUALITY_pure_virtual";
403403 }
404 LLVM_UNREACHABLE("Unknown Dwarf Virtuality");
404 llvm_unreachable("Unknown Dwarf Virtuality");
405405 return "";
406406 }
407407
431431 case DW_LANG_lo_user: return "LANG_lo_user";
432432 case DW_LANG_hi_user: return "LANG_hi_user";
433433 }
434 LLVM_UNREACHABLE("Unknown Dwarf Language");
434 llvm_unreachable("Unknown Dwarf Language");
435435 return "";
436436 }
437437
444444 case DW_ID_down_case: return "ID_down_case";
445445 case DW_ID_case_insensitive: return "ID_case_insensitive";
446446 }
447 LLVM_UNREACHABLE("Unknown Dwarf Identifier Case");
447 llvm_unreachable("Unknown Dwarf Identifier Case");
448448 return "";
449449 }
450450
458458 case DW_CC_lo_user: return "CC_lo_user";
459459 case DW_CC_hi_user: return "CC_hi_user";
460460 }
461 LLVM_UNREACHABLE("Unknown Dwarf Calling Convention");
461 llvm_unreachable("Unknown Dwarf Calling Convention");
462462 return "";
463463 }
464464
471471 case DW_INL_declared_not_inlined: return "INL_declared_not_inlined";
472472 case DW_INL_declared_inlined: return "INL_declared_inlined";
473473 }
474 LLVM_UNREACHABLE("Unknown Dwarf Inline Code");
474 llvm_unreachable("Unknown Dwarf Inline Code");
475475 return "";
476476 }
477477
482482 case DW_ORD_row_major: return "ORD_row_major";
483483 case DW_ORD_col_major: return "ORD_col_major";
484484 }
485 LLVM_UNREACHABLE("Unknown Dwarf Array Order");
485 llvm_unreachable("Unknown Dwarf Array Order");
486486 return "";
487487 }
488488
493493 case DW_DSC_label: return "DSC_label";
494494 case DW_DSC_range: return "DSC_range";
495495 }
496 LLVM_UNREACHABLE("Unknown Dwarf Discriminant Descriptor");
496 llvm_unreachable("Unknown Dwarf Discriminant Descriptor");
497497 return "";
498498 }
499499
514514 case DW_LNS_set_epilogue_begin: return "LNS_set_epilogue_begin";
515515 case DW_LNS_set_isa: return "LNS_set_isa";
516516 }
517 LLVM_UNREACHABLE("Unknown Dwarf Line Number Standard");
517 llvm_unreachable("Unknown Dwarf Line Number Standard");
518518 return "";
519519 }
520520
529529 case DW_LNE_lo_user: return "LNE_lo_user";
530530 case DW_LNE_hi_user: return "LNE_hi_user";
531531 }
532 LLVM_UNREACHABLE("Unknown Dwarf Line Number Extended Opcode Encoding");
532 llvm_unreachable("Unknown Dwarf Line Number Extended Opcode Encoding");
533533 return "";
534534 }
535535
544544 case DW_MACINFO_end_file: return "MACINFO_end_file";
545545 case DW_MACINFO_vendor_ext: return "MACINFO_vendor_ext";
546546 }
547 LLVM_UNREACHABLE("Unknown Dwarf Macinfo Type Encodings");
547 llvm_unreachable("Unknown Dwarf Macinfo Type Encodings");
548548 return "";
549549 }
550550
580580 case DW_CFA_lo_user: return "CFA_lo_user";
581581 case DW_CFA_hi_user: return "CFA_hi_user";
582582 }
583 LLVM_UNREACHABLE("Unknown Dwarf Call Frame Instruction Encodings");
583 llvm_unreachable("Unknown Dwarf Call Frame Instruction Encodings");
584584 return "";
585585 }
586586
4343 exit(1);
4444 }
4545
46 void llvm_unreachable(const char *msg, const char *file, unsigned line) {
46 void llvm_unreachable_internal(const char *msg, const char *file, unsigned line) {
4747 if (msg)
4848 errs() << msg << "\n";
4949 errs() << "UNREACHABLE executed";
5050 else if (sizeof(long) == sizeof(long long)) {
5151 AddInteger((unsigned long long)I);
5252 } else {
53 LLVM_UNREACHABLE("unexpected sizeof(long)");
53 llvm_unreachable("unexpected sizeof(long)");
5454 }
5555 }
5656 void FoldingSetNodeID::AddInteger(long long I) {
5151
5252 inline static CondCodes getOppositeCondition(CondCodes CC){
5353 switch (CC) {
54 default: LLVM_UNREACHABLE("Unknown condition code");
54 default: llvm_unreachable("Unknown condition code");
5555 case EQ: return NE;
5656 case NE: return EQ;
5757 case HS: return LO;
7272
7373 inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
7474 switch (CC) {
75 default: LLVM_UNREACHABLE("Unknown condition code");
75 default: llvm_unreachable("Unknown condition code");
7676 case ARMCC::EQ: return "eq";
7777 case ARMCC::NE: return "ne";
7878 case ARMCC::HS: return "hs";
3737
3838 static inline const char *getShiftOpcStr(ShiftOpc Op) {
3939 switch (Op) {
40 default: LLVM_UNREACHABLE("Unknown shift opc!");
40 default: llvm_unreachable("Unknown shift opc!");
4141 case ARM_AM::asr: return "asr";
4242 case ARM_AM::lsl: return "lsl";
4343 case ARM_AM::lsr: return "lsr";
7070
7171 static inline const char *getAMSubModeStr(AMSubMode Mode) {
7272 switch (Mode) {
73 default: LLVM_UNREACHABLE("Unknown addressing sub-mode!");
73 default: llvm_unreachable("Unknown addressing sub-mode!");
7474 case ARM_AM::ia: return "ia";
7575 case ARM_AM::ib: return "ib";
7676 case ARM_AM::da: return "da";
8080
8181 static inline const char *getAMSubModeAltStr(AMSubMode Mode, bool isLD) {
8282 switch (Mode) {
83 default: LLVM_UNREACHABLE("Unknown addressing sub-mode!");
83 default: llvm_unreachable("Unknown addressing sub-mode!");
8484 case ARM_AM::ia: return isLD ? "fd" : "ea";
8585 case ARM_AM::ib: return isLD ? "ed" : "fa";
8686 case ARM_AM::da: return isLD ? "fa" : "ed";
433433 return 0;
434434 switch (MI->getOpcode()) {
435435 default:
436 LLVM_UNREACHABLE("Unknown or unset size field for instr!");
436 llvm_unreachable("Unknown or unset size field for instr!");
437437 case TargetInstrInfo::IMPLICIT_DEF:
438438 case TargetInstrInfo::DECLARE:
439439 case TargetInstrInfo::DBG_LABEL:
7171 case S30: return 30;
7272 case S31: return 31;
7373 default:
74 LLVM_UNREACHABLE("Unknown ARM register!");
74 llvm_unreachable("Unknown ARM register!");
7575 }
7676 }
7777
8282 using namespace ARM;
8383 switch (RegEnum) {
8484 default:
85 LLVM_UNREACHABLE("Unknown ARM register!");
85 llvm_unreachable("Unknown ARM register!");
8686 case R0: case D0: return 0;
8787 case R1: case D1: return 1;
8888 case R2: case D2: return 2;
706706 }
707707
708708 unsigned ARMBaseRegisterInfo::getEHExceptionRegister() const {
709 LLVM_UNREACHABLE("What is the exception register");
709 llvm_unreachable("What is the exception register");
710710 return 0;
711711 }
712712
713713 unsigned ARMBaseRegisterInfo::getEHHandlerRegister() const {
714 LLVM_UNREACHABLE("What is the exception handler register");
714 llvm_unreachable("What is the exception handler register");
715715 return 0;
716716 }
717717
11371137 break;
11381138 }
11391139 default:
1140 LLVM_UNREACHABLE("Unsupported addressing mode!");
1140 llvm_unreachable("Unsupported addressing mode!");
11411141 break;
11421142 }
11431143
222222 template
223223 unsigned Emitter::getShiftOp(unsigned Imm) const {
224224 switch (ARM_AM::getAM2ShiftOpc(Imm)) {
225 default: LLVM_UNREACHABLE("Unknown shift opc!");
225 default: llvm_unreachable("Unknown shift opc!");
226226 case ARM_AM::asr: return 2;
227227 case ARM_AM::lsl: return 0;
228228 case ARM_AM::lsr: return 1;
259259 #ifndef NDEBUG
260260 cerr << MO;
261261 #endif
262 llvm_unreachable();
262 llvm_unreachable(0);
263263 }
264264 return 0;
265265 }
339339 NumEmitted++; // Keep track of the # of mi's emitted
340340 switch (MI.getDesc().TSFlags & ARMII::FormMask) {
341341 default: {
342 LLVM_UNREACHABLE("Unhandled instruction encoding format!");
342 llvm_unreachable("Unhandled instruction encoding format!");
343343 break;
344344 }
345345 case ARMII::Pseudo:
457457 else if (CFP->getType() == Type::DoubleTy)
458458 emitDWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue());
459459 else {
460 LLVM_UNREACHABLE("Unable to handle this constantpool entry!");
460 llvm_unreachable("Unable to handle this constantpool entry!");
461461 }
462462 } else {
463 LLVM_UNREACHABLE("Unable to handle this constantpool entry!");
463 llvm_unreachable("Unable to handle this constantpool entry!");
464464 }
465465 }
466466 }
588588 unsigned Opcode = MI.getDesc().Opcode;
589589 switch (Opcode) {
590590 default:
591 LLVM_UNREACHABLE("ARMCodeEmitter::emitPseudoInstruction");//FIXME:
591 llvm_unreachable("ARMCodeEmitter::emitPseudoInstruction");//FIXME:
592592 case TargetInstrInfo::INLINEASM: {
593593 // We allow inline assembler nodes with empty bodies - they can
594594 // implicitly define registers, which is ok for JIT.
675675 // ROR - 0111
676676 // RRX - 0110 and bit[11:8] clear.
677677 switch (SOpc) {
678 default: LLVM_UNREACHABLE("Unknown shift opc!");
678 default: llvm_unreachable("Unknown shift opc!");
679679 case ARM_AM::lsl: SBits = 0x1; break;
680680 case ARM_AM::lsr: SBits = 0x3; break;
681681 case ARM_AM::asr: SBits = 0x5; break;
689689 // ASR - 100
690690 // ROR - 110
691691 switch (SOpc) {
692 default: LLVM_UNREACHABLE("Unknown shift opc!");
692 default: llvm_unreachable("Unknown shift opc!");
693693 case ARM_AM::lsl: SBits = 0x0; break;
694694 case ARM_AM::lsr: SBits = 0x2; break;
695695 case ARM_AM::asr: SBits = 0x4; break;
958958 // DA - Decrement after - bit U = 0 and bit P = 0
959959 // DB - Decrement before - bit U = 0 and bit P = 1
960960 switch (Mode) {
961 default: LLVM_UNREACHABLE("Unknown addressing sub-mode!");
961 default: llvm_unreachable("Unknown addressing sub-mode!");
962962 case ARM_AM::da: break;
963963 case ARM_AM::db: Binary |= 0x1 << ARMII::P_BitShift; break;
964964 case ARM_AM::ia: Binary |= 0x1 << ARMII::U_BitShift; break;
11221122 const TargetInstrDesc &TID = MI.getDesc();
11231123
11241124 if (TID.Opcode == ARM::TPsoft) {
1125 LLVM_UNREACHABLE("ARM::TPsoft FIXME"); // FIXME
1125 llvm_unreachable("ARM::TPsoft FIXME"); // FIXME
11261126 }
11271127
11281128 // Part of binary is determined by TableGn.
448448 Bits = 8; // Taking the address of a CP entry.
449449 break;
450450 }
451 LLVM_UNREACHABLE("Unknown addressing mode for CP reference!");
451 llvm_unreachable("Unknown addressing mode for CP reference!");
452452 case ARMII::AddrMode1: // AM1: 8 bits << 2
453453 Bits = 8;
454454 Scale = 4; // Taking the address of a CP entry.
469469 /// IntCCToARMCC - Convert a DAG integer condition code to an ARM CC
470470 static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC) {
471471 switch (CC) {
472 default: LLVM_UNREACHABLE("Unknown condition code!");
472 default: llvm_unreachable("Unknown condition code!");
473473 case ISD::SETNE: return ARMCC::NE;
474474 case ISD::SETEQ: return ARMCC::EQ;
475475 case ISD::SETGT: return ARMCC::GT;
491491 bool Invert = false;
492492 CondCode2 = ARMCC::AL;
493493 switch (CC) {
494 default: LLVM_UNREACHABLE("Unknown FP condition!");
494 default: llvm_unreachable("Unknown FP condition!");
495495 case ISD::SETEQ:
496496 case ISD::SETOEQ: CondCode = ARMCC::EQ; break;
497497 case ISD::SETGT:
660660 bool Return) const {
661661 switch (CC) {
662662 default:
663 LLVM_UNREACHABLE("Unsupported calling convention");
663 llvm_unreachable("Unsupported calling convention");
664664 case CallingConv::C:
665665 case CallingConv::Fast:
666666 // Use target triple & subtarget features to do actual dispatch.
744744 }
745745
746746 switch (VA.getLocInfo()) {
747 default: LLVM_UNREACHABLE("Unknown loc info!");
747 default: llvm_unreachable("Unknown loc info!");
748748 case CCValAssign::Full: break;
749749 case CCValAssign::BCvt:
750750 Val = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), Val);
857857
858858 // Promote the value if needed.
859859 switch (VA.getLocInfo()) {
860 default: LLVM_UNREACHABLE("Unknown loc info!");
860 default: llvm_unreachable("Unknown loc info!");
861861 case CCValAssign::Full: break;
862862 case CCValAssign::SExt:
863863 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
10591059 SDValue Arg = Op.getOperand(realRVLocIdx*2+1);
10601060
10611061 switch (VA.getLocInfo()) {
1062 default: LLVM_UNREACHABLE("Unknown loc info!");
1062 default: llvm_unreachable("Unknown loc info!");
10631063 case CCValAssign::Full: break;
10641064 case CCValAssign::BCvt:
10651065 Arg = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getLocVT(), Arg);
14411441 // to 32 bits. Insert an assert[sz]ext to capture this, then
14421442 // truncate to the right size.
14431443 switch (VA.getLocInfo()) {
1444 default: LLVM_UNREACHABLE("Unknown loc info!");
1444 default: llvm_unreachable("Unknown loc info!");
14451445 case CCValAssign::Full: break;
14461446 case CCValAssign::BCvt:
14471447 ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), ArgValue);
20052005
20062006 if (Op.getOperand(1).getValueType().isFloatingPoint()) {
20072007 switch (SetCCOpcode) {
2008 default: LLVM_UNREACHABLE("Illegal FP comparison"); break;
2008 default: llvm_unreachable("Illegal FP comparison"); break;
20092009 case ISD::SETUNE:
20102010 case ISD::SETNE: Invert = true; // Fallthrough
20112011 case ISD::SETOEQ:
20442044 } else {
20452045 // Integer comparisons.
20462046 switch (SetCCOpcode) {
2047 default: LLVM_UNREACHABLE("Illegal integer comparison"); break;
2047 default: llvm_unreachable("Illegal integer comparison"); break;
20482048 case ISD::SETNE: Invert = true;
20492049 case ISD::SETEQ: Opc = ARMISD::VCEQ; break;
20502050 case ISD::SETLT: Swap = true;
21482148 }
21492149
21502150 default:
2151 LLVM_UNREACHABLE("unexpected size for isVMOVSplat");
2151 llvm_unreachable("unexpected size for isVMOVSplat");
21522152 break;
21532153 }
21542154
21902190 case 16: CanonicalVT = MVT::v4i16; break;
21912191 case 32: CanonicalVT = MVT::v2i32; break;
21922192 case 64: CanonicalVT = MVT::v1i64; break;
2193 default: LLVM_UNREACHABLE("unexpected splat element type"); break;
2193 default: llvm_unreachable("unexpected splat element type"); break;
21942194 }
21952195 } else {
21962196 assert(VT.is128BitVector() && "unknown splat vector size");
21992199 case 16: CanonicalVT = MVT::v8i16; break;
22002200 case 32: CanonicalVT = MVT::v4i32; break;
22012201 case 64: CanonicalVT = MVT::v2i64; break;
2202 default: LLVM_UNREACHABLE("unexpected splat element type"); break;
2202 default: llvm_unreachable("unexpected splat element type"); break;
22032203 }
22042204 }
22052205
22592259
22602260 SDValue ARMTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
22612261 switch (Op.getOpcode()) {
2262 default: LLVM_UNREACHABLE("Don't know how to custom lower this!");
2262 default: llvm_unreachable("Don't know how to custom lower this!");
22632263 case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
22642264 case ISD::GlobalAddress:
22652265 return Subtarget->isTargetDarwin() ? LowerGlobalAddressDarwin(Op, DAG) :
23022302 SelectionDAG &DAG) {
23032303 switch (N->getOpcode()) {
23042304 default:
2305 LLVM_UNREACHABLE("Don't know how to custom expand this!");
2305 llvm_unreachable("Don't know how to custom expand this!");
23062306 return;
23072307 case ISD::BIT_CONVERT:
23082308 Results.push_back(ExpandBIT_CONVERT(N, DAG));
25942594 case Intrinsic::arm_neon_vshiftlu:
25952595 if (isVShiftLImm(N->getOperand(2), VT, true, Cnt))
25962596 break;
2597 LLVM_UNREACHABLE("invalid shift count for vshll intrinsic");
2597 llvm_unreachable("invalid shift count for vshll intrinsic");
25982598
25992599 case Intrinsic::arm_neon_vrshifts:
26002600 case Intrinsic::arm_neon_vrshiftu:
26112611 case Intrinsic::arm_neon_vqshiftsu:
26122612 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt))
26132613 break;
2614 LLVM_UNREACHABLE("invalid shift count for vqshlu intrinsic");
2614 llvm_unreachable("invalid shift count for vqshlu intrinsic");
26152615
26162616 case Intrinsic::arm_neon_vshiftn:
26172617 case Intrinsic::arm_neon_vrshiftn:
26242624 // Narrowing shifts require an immediate right shift.
26252625 if (isVShiftRImm(N->getOperand(2), VT, true, true, Cnt))
26262626 break;
2627 LLVM_UNREACHABLE("invalid shift count for narrowing vector shift intrinsic");
2627 llvm_unreachable("invalid shift count for narrowing vector shift intrinsic");
26282628
26292629 default:
2630 LLVM_UNREACHABLE("unhandled vector shift");
2630 llvm_unreachable("unhandled vector shift");
26312631 }
26322632
26332633 switch (IntNo) {
26852685 else if (isVShiftRImm(N->getOperand(3), VT, false, true, Cnt))
26862686 VShiftOpc = ARMISD::VSRI;
26872687 else {
2688 LLVM_UNREACHABLE("invalid shift count for vsli/vsri intrinsic");
2688 llvm_unreachable("invalid shift count for vsli/vsri intrinsic");
26892689 }
26902690
26912691 return DAG.getNode(VShiftOpc, N->getDebugLoc(), N->getValueType(0),
27192719 int64_t Cnt;
27202720
27212721 switch (N->getOpcode()) {
2722 default: LLVM_UNREACHABLE("unexpected shift opcode");
2722 default: llvm_unreachable("unexpected shift opcode");
27232723
27242724 case ISD::SHL:
27252725 if (isVShiftLImm(N->getOperand(1), VT, false, Cnt))
27622762
27632763 unsigned Opc = 0;
27642764 switch (N->getOpcode()) {
2765 default: LLVM_UNREACHABLE("unexpected opcode");
2765 default: llvm_unreachable("unexpected opcode");
27662766 case ISD::SIGN_EXTEND:
27672767 Opc = ARMISD::VGETLANEs;
27682768 break;
103103 );
104104 #else // Not an ARM host
105105 void ARMCompilationCallback() {
106 LLVM_UNREACHABLE("Cannot call ARMCompilationCallback() on a non-ARM arch!");
106 llvm_unreachable("Cannot call ARMCompilationCallback() on a non-ARM arch!");
107107 }
108108 #endif
109109 }
122122 // ldr pc, [pc,#-4]
123123 //
124124 if (!sys::Memory::setRangeWritable((void*)StubAddr, 8)) {
125 LLVM_UNREACHABLE("ERROR: Unable to mark stub writable");
125 llvm_unreachable("ERROR: Unable to mark stub writable");
126126 }
127127 *(intptr_t *)StubAddr = 0xe51ff004; // ldr pc, [pc, #-4]
128128 *(intptr_t *)(StubAddr+4) = NewVal;
129129 if (!sys::Memory::setRangeExecutable((void*)StubAddr, 8)) {
130 LLVM_UNREACHABLE("ERROR: Unable to mark stub executable");
130 llvm_unreachable("ERROR: Unable to mark stub executable");
131131 }
132132 }
133133
137137 case ARM::FSTD:
138138 NumFSTMGened++;
139139 return ARM::FSTMD;
140 default: LLVM_UNREACHABLE("Unhandled opcode!");
140 default: llvm_unreachable("Unhandled opcode!");
141141 }
142142 return 0;
143143 }
512512 case ARM::t2STRi8:
513513 case ARM::t2STRi12:
514514 return ARM::t2STR_PRE;
515 default: LLVM_UNREACHABLE("Unhandled opcode!");
515 default: llvm_unreachable("Unhandled opcode!");
516516 }
517517 return 0;
518518 }
531531 case ARM::t2STRi8:
532532 case ARM::t2STRi12:
533533 return ARM::t2STR_POST;
534 default: LLVM_UNREACHABLE("Unhandled opcode!");
534 default: llvm_unreachable("Unhandled opcode!");
535535 }
536536 return 0;
537537 }
210210 // Print out labels for the function.
211211 const Function *F = MF.getFunction();
212212 switch (F->getLinkage()) {
213 default: LLVM_UNREACHABLE("Unknown linkage type!");
213 default: llvm_unreachable("Unknown linkage type!");
214214 case Function::PrivateLinkage:
215215 case Function::InternalLinkage:
216216 SwitchToTextSection("\t.text", F);
307307 O << TRI->getAsmName(Reg);
308308 }
309309 } else
310 LLVM_UNREACHABLE("not implemented");
310 llvm_unreachable("not implemented");
311311 break;
312312 }
313313 case MachineOperand::MO_Immediate: {
11381138 case GlobalValue::InternalLinkage:
11391139 break;
11401140 default:
1141 LLVM_UNREACHABLE("Unknown linkage type!");
1141 llvm_unreachable("Unknown linkage type!");
11421142 }
11431143
11441144 EmitAlignment(Align, GVar);
510510 break;
511511 }
512512 default:
513 LLVM_UNREACHABLE("Unsupported addressing mode!");
513 llvm_unreachable("Unsupported addressing mode!");
514514 break;
515515 }
516516
165165 case Alpha::R30 : case Alpha::F30 : return 30;
166166 case Alpha::R31 : case Alpha::F31 : return 31;
167167 default:
168 LLVM_UNREACHABLE("Unhandled reg");
168 llvm_unreachable("Unhandled reg");
169169 }
170170 }
171171
216216 Offset = MI.getOperand(3).getImm();
217217 break;
218218 default:
219 LLVM_UNREACHABLE("unknown relocatable instruction");
219 llvm_unreachable("unknown relocatable instruction");
220220 }
221221 if (MO.isGlobal())
222222 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
237237 #ifndef NDEBUG
238238 cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
239239 #endif
240 llvm_unreachable();
240 llvm_unreachable(0);
241241 }
242242
243243 return rv;
337337 bool rev = false;
338338 bool inv = false;
339339 switch(CC) {
340 default: DEBUG(N->dump(CurDAG)); LLVM_UNREACHABLE("Unknown FP comparison!");
340 default: DEBUG(N->dump(CurDAG)); llvm_unreachable("Unknown FP comparison!");
341341 case ISD::SETEQ: case ISD::SETOEQ: case ISD::SETUEQ:
342342 Opc = Alpha::CMPTEQ; break;
343343 case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT:
471471 } else if (TypeOperands[i] == MVT::f64) {
472472 Opc = Alpha::STT;
473473 } else
474 LLVM_UNREACHABLE("Unknown operand");
474 llvm_unreachable("Unknown operand");
475475
476476 SDValue Ops[] = { CallOperands[i], getI64Imm((i - 6) * 8),
477477 CurDAG->getCopyFromReg(Chain, dl, Alpha::R30, MVT::i64),
488488 CallOperands[i], InFlag);
489489 InFlag = Chain.getValue(1);
490490 } else
491 LLVM_UNREACHABLE("Unknown operand");
491 llvm_unreachable("Unknown operand");
492492 }
493493
494494 // Finally, once everything is in registers to pass to the call, emit the
511511 std::vector CallResults;
512512
513513 switch (N->getValueType(0).getSimpleVT()) {
514 default: LLVM_UNREACHABLE("Unexpected ret value!");
514 default: llvm_unreachable("Unexpected ret value!");
515515 case MVT::Other: break;
516516 case MVT::i64:
517517 Chain = CurDAG->getCopyFromReg(Chain, dl,
313313 SDValue());
314314 switch (Op.getNumOperands()) {
315315 default:
316 LLVM_UNREACHABLE("Do not know how to return this many arguments!");
316 llvm_unreachable("Do not know how to return this many arguments!");
317317 case 1:
318318 break;
319319 //return SDValue(); // ret void is legal
379379 for (unsigned i = 0, e = Args.size(); i != e; ++i)
380380 {
381381 switch (getValueType(Args[i].Ty).getSimpleVT()) {
382 default: LLVM_UNREACHABLE("Unexpected ValueType for argument!");
382 default: llvm_unreachable("Unexpected ValueType for argument!");
383383 case MVT::i1:
384384 case MVT::i8:
385385 case MVT::i16:
475475 SDValue AlphaTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
476476 DebugLoc dl = Op.getDebugLoc();
477477 switch (Op.getOpcode()) {
478 default: LLVM_UNREACHABLE("Wasn't expecting to be able to lower this!");
478 default: llvm_unreachable("Wasn't expecting to be able to lower this!");
479479 case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG,
480480 VarArgsBase,
481481 VarArgsOffset);
526526 return Lo;
527527 }
528528 case ISD::GlobalTLSAddress:
529 LLVM_UNREACHABLE("TLS not implemented for Alpha.");
529 llvm_unreachable("TLS not implemented for Alpha.");
530530 case ISD::GlobalAddress: {
531531 GlobalAddressSDNode *GSDN = cast(Op);
532532 GlobalValue *GV = GSDN->getGlobal();
200200 .addReg(SrcReg, getKillRegState(isKill))
201201 .addFrameIndex(FrameIdx).addReg(Alpha::F31);
202202 else
203 LLVM_UNREACHABLE("Unhandled register class");
203 llvm_unreachable("Unhandled register class");
204204 }
205205
206206 void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
216216 else if (RC == Alpha::GPRCRegisterClass)
217217 Opc = Alpha::STQ;
218218 else
219 LLVM_UNREACHABLE("Unhandled register class");
219 llvm_unreachable("Unhandled register class");
220220 DebugLoc DL = DebugLoc::getUnknownLoc();
221221 MachineInstrBuilder MIB =
222222 BuildMI(MF, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill));
245245 BuildMI(MBB, MI, DL, get(Alpha::LDQ), DestReg)
246246 .addFrameIndex(FrameIdx).addReg(Alpha::F31);
247247 else
248 LLVM_UNREACHABLE("Unhandled register class");
248 llvm_unreachable("Unhandled register class");
249249 }
250250
251251 void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
260260 else if (RC == Alpha::GPRCRegisterClass)
261261 Opc = Alpha::LDQ;
262262 else
263 LLVM_UNREACHABLE("Unhandled register cl