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Use a spilled free callee-saved register as scratch register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34785 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
1 changed file(s) with 17 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
312312 }
313313
314314 BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
315 // FIXME: avoid re-calculating this everytime.
315316 BitVector Reserved(getNumRegs());
316317 Reserved.set(ARM::SP);
317318 Reserved.set(ARM::PC);
616617 if (isSub)
617618 BuildMI(MBB, MBBI, TII.get(ARM::tNEG), DestReg)
618619 .addReg(DestReg, false, false, true);
620 }
621
622 /// findScratchRegister - Find a 'free' ARM register. If register scavenger
623 /// is not being used, R12 is available. Otherwise, try for a call-clobbered
624 /// register first and then a spilled callee-saved register if that fails.
625 static
626 unsigned findScratchRegister(RegScavenger *RS, const TargetRegisterClass *RC,
627 ARMFunctionInfo *AFI) {
628 unsigned Reg = RS ? RS->FindUnusedReg(RC, true) : (unsigned) ARM::R12;
629 if (Reg == 0)
630 // Try a already spilled CS register.
631 Reg = RS->FindUnusedReg(RC, AFI->getSpilledCSRegisters());
632
633 return Reg;
619634 }
620635
621636 void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
901916 // If the offset we have is too large to fit into the instruction, we need
902917 // to form it with a series of ADDri's. Do this by taking 8-bit chunks
903918 // out of 'Offset'.
904 unsigned ScratchReg = RS
905 ? RS->FindUnusedReg(&ARM::GPRRegClass, true) : (unsigned)ARM::R12;
906 assert(ScratchReg != 0 && "Unable to find a free call-clobbered register!");
919 unsigned ScratchReg = findScratchRegister(RS, &ARM::GPRRegClass, AFI);
920 assert(ScratchReg && "Unable to find a free register!");
907921 emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg,
908922 isSub ? -Offset : Offset, TII);
909923 MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);