llvm.org GIT mirror llvm / c12979a
Remove # from the beginning and end of def names. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171696 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 7 years ago
4 changed file(s) with 288 addition(s) and 288 deletion(s). Raw diff Collapse all Expand all
932932 let Constraints = "$src1 = $dst" in {
933933 let isCommutable = CommutableRR,
934934 isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
935 def #NAME#8rr : BinOpRR_RF;
936 def #NAME#16rr : BinOpRR_RF;
937 def #NAME#32rr : BinOpRR_RF;
938 def #NAME#64rr : BinOpRR_RF, opnodeflag>;
935 def NAME#8rr : BinOpRR_RF, opnodeflag>;
936 def NAME#16rr : BinOpRR_RF;
937 def NAME#32rr : BinOpRR_RF;
938 def NAME#64rr : BinOpRR_RF;
939939 } // isCommutable
940940
941 def #NAME#8rr_REV : BinOpRR_Rev;
942 def #NAME#16rr_REV : BinOpRR_Rev;
943 def #NAME#32rr_REV : BinOpRR_Rev;
944 def #NAME#64rr_REV : BinOpRR_Rev;
945
946 def #NAME#8rm : BinOpRM_RF;
947 def #NAME#16rm : BinOpRM_RF;
948 def #NAME#32rm : BinOpRM_RF;
949 def #NAME#64rm : BinOpRM_RF>;
941 def NAME#8rr_REV : BinOpRR_Rev>;
942 def NAME#16rr_REV : BinOpRR_Rev;
943 def NAME#32rr_REV : BinOpRR_Rev;
944 def NAME#64rr_REV : BinOpRR_Rev;
945
946 def NAME#8rm : BinOpRM_RF;
947 def NAME#16rm : BinOpRM_RF;
948 def NAME#32rm : BinOpRM_RF;
949 def NAME#64rm : BinOpRM_RF;
950950
951951 let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
952952 // NOTE: These are order specific, we want the ri8 forms to be listed
953953 // first so that they are slightly preferred to the ri forms.
954 def #NAME#16ri8 : BinOpRI8_RF<0x82, mnemonic, Xi16, opnodeflag, RegMRM>;
955 def #NAME#32ri8 : BinOpRI8_RF<0x82, mnemonic, Xi32, opnodeflag, RegMRM>;
956 def #NAME#64ri8 : BinOpRI8_RF<0x82, mnemonic, Xi64, opnodeflag, RegMRM>;
957
958 def #NAME#8ri : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM>;
959 def #NAME#16ri : BinOpRI_RF<0x80, mnemonic, Xi16, opnodeflag, RegMRM>;
960 def #NAME#32ri : BinOpRI_RF<0x80, mnemonic, Xi32, opnodeflag, RegMRM>;
961 def #NAME#64ri32: BinOpRI_RF<0x80, mnemonic, Xi64, opnodeflag, RegMRM>;
954 def NAME#16ri8 : BinOpRI8_RF<0x82, mnemonic, Xi16, opnodeflag, RegMRM>;
955 def NAME#32ri8 : BinOpRI8_RF<0x82, mnemonic, Xi32, opnodeflag, RegMRM>;
956 def NAME#64ri8 : BinOpRI8_RF<0x82, mnemonic, Xi64, opnodeflag, RegMRM>;
957
958 def NAME#8ri : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM>;
959 def NAME#16ri : BinOpRI_RF<0x80, mnemonic, Xi16, opnodeflag, RegMRM>;
960 def NAME#32ri : BinOpRI_RF<0x80, mnemonic, Xi32, opnodeflag, RegMRM>;
961 def NAME#64ri32: BinOpRI_RF<0x80, mnemonic, Xi64, opnodeflag, RegMRM>;
962962 }
963963 } // Constraints = "$src1 = $dst"
964964
965 def #NAME#8mr : BinOpMR_RMW;
966 def #NAME#16mr : BinOpMR_RMW;
967 def #NAME#32mr : BinOpMR_RMW;
968 def #NAME#64mr : BinOpMR_RMW, opnode>;
965 def NAME#8mr : BinOpMR_RMW, opnode>;
966 def NAME#16mr : BinOpMR_RMW;
967 def NAME#32mr : BinOpMR_RMW;
968 def NAME#64mr : BinOpMR_RMW;
969969
970970 // NOTE: These are order specific, we want the mi8 forms to be listed
971971 // first so that they are slightly preferred to the mi forms.
972 def #NAME#16mi8 : BinOpMI8_RMW;
973 def #NAME#32mi8 : BinOpMI8_RMW;
974 def #NAME#64mi8 : BinOpMI8_RMW;
975
976 def #NAME#8mi : BinOpMI_RMW;
977 def #NAME#16mi : BinOpMI_RMW;
978 def #NAME#32mi : BinOpMI_RMW;
979 def #NAME#64mi32 : BinOpMI_RMW;
980
981 def #NAME#8i8 : BinOpAI
982 "{$src, %al|AL, $src}">;
983 def #NAME#16i16 : BinOpAI
984 "{$src, %ax|AX, $src}">;
985 def #NAME#32i32 : BinOpAI
986 "{$src, %eax|EAX, $src}">;
987 def #NAME#64i32 : BinOpAI
988 "{$src, %rax|RAX, $src}">;
972 def NAME#16mi8 : BinOpMI8_RMW>;
973 def NAME#32mi8 : BinOpMI8_RMW;
974 def NAME#64mi8 : BinOpMI8_RMW;
975
976 def NAME#8mi : BinOpMI_RMW;
977 def NAME#16mi : BinOpMI_RMW;
978 def NAME#32mi : BinOpMI_RMW;
979 def NAME#64mi32 : BinOpMI_RMW;
980
981 def NAME#8i8 : BinOpAI
982 "{$src, %al|AL, $src}">;
983 def NAME#16i16 : BinOpAI
984 "{$src, %ax|AX, $src}">;
985 def NAME#32i32 : BinOpAI
986 "{$src, %eax|EAX, $src}">;
987 def NAME#64i32 : BinOpAI
988 "{$src, %rax|RAX, $src}">;
989989 }
990990 }
991991
10031003 let Constraints = "$src1 = $dst" in {
10041004 let isCommutable = CommutableRR,
10051005 isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
1006 def #NAME#8rr : BinOpRR_RFF;
1007 def #NAME#16rr : BinOpRR_RFF;
1008 def #NAME#32rr : BinOpRR_RFF;
1009 def #NAME#64rr : BinOpRR_RFF, opnode>;
1006 def NAME#8rr : BinOpRR_RFF, opnode>;
1007 def NAME#16rr : BinOpRR_RFF;
1008 def NAME#32rr : BinOpRR_RFF;
1009 def NAME#64rr : BinOpRR_RFF;
10101010 } // isCommutable
10111011
1012 def #NAME#8rr_REV : BinOpRR_Rev;
1013 def #NAME#16rr_REV : BinOpRR_Rev;
1014 def #NAME#32rr_REV : BinOpRR_Rev;
1015 def #NAME#64rr_REV : BinOpRR_Rev;
1016
1017 def #NAME#8rm : BinOpRM_RFF;
1018 def #NAME#16rm : BinOpRM_RFF;
1019 def #NAME#32rm : BinOpRM_RFF;
1020 def #NAME#64rm : BinOpRM_RFF>;
1012 def NAME#8rr_REV : BinOpRR_Rev>;
1013 def NAME#16rr_REV : BinOpRR_Rev;
1014 def NAME#32rr_REV : BinOpRR_Rev;
1015 def NAME#64rr_REV : BinOpRR_Rev;
1016
1017 def NAME#8rm : BinOpRM_RFF;
1018 def NAME#16rm : BinOpRM_RFF;
1019 def NAME#32rm : BinOpRM_RFF;
1020 def NAME#64rm : BinOpRM_RFF;
10211021
10221022 let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
10231023 // NOTE: These are order specific, we want the ri8 forms to be listed
10241024 // first so that they are slightly preferred to the ri forms.
1025 def #NAME#16ri8 : BinOpRI8_RFF<0x82, mnemonic, Xi16, opnode, RegMRM>;
1026 def #NAME#32ri8 : BinOpRI8_RFF<0x82, mnemonic, Xi32, opnode, RegMRM>;
1027 def #NAME#64ri8 : BinOpRI8_RFF<0x82, mnemonic, Xi64, opnode, RegMRM>;
1028
1029 def #NAME#8ri : BinOpRI_RFF<0x80, mnemonic, Xi8 , opnode, RegMRM>;
1030 def #NAME#16ri : BinOpRI_RFF<0x80, mnemonic, Xi16, opnode, RegMRM>;
1031 def #NAME#32ri : BinOpRI_RFF<0x80, mnemonic, Xi32, opnode, RegMRM>;
1032 def #NAME#64ri32: BinOpRI_RFF<0x80, mnemonic, Xi64, opnode, RegMRM>;
1025 def NAME#16ri8 : BinOpRI8_RFF<0x82, mnemonic, Xi16, opnode, RegMRM>;
1026 def NAME#32ri8 : BinOpRI8_RFF<0x82, mnemonic, Xi32, opnode, RegMRM>;
1027 def NAME#64ri8 : BinOpRI8_RFF<0x82, mnemonic, Xi64, opnode, RegMRM>;
1028
1029 def NAME#8ri : BinOpRI_RFF<0x80, mnemonic, Xi8 , opnode, RegMRM>;
1030 def NAME#16ri : BinOpRI_RFF<0x80, mnemonic, Xi16, opnode, RegMRM>;
1031 def NAME#32ri : BinOpRI_RFF<0x80, mnemonic, Xi32, opnode, RegMRM>;
1032 def NAME#64ri32: BinOpRI_RFF<0x80, mnemonic, Xi64, opnode, RegMRM>;
10331033 }
10341034 } // Constraints = "$src1 = $dst"
10351035
1036 def #NAME#8mr : BinOpMR_RMW_FF;
1037 def #NAME#16mr : BinOpMR_RMW_FF;
1038 def #NAME#32mr : BinOpMR_RMW_FF;
1039 def #NAME#64mr : BinOpMR_RMW_FF, opnode>;
1036 def NAME#8mr : BinOpMR_RMW_FF, opnode>;
1037 def NAME#16mr : BinOpMR_RMW_FF;
1038 def NAME#32mr : BinOpMR_RMW_FF;
1039 def NAME#64mr : BinOpMR_RMW_FF;
10401040
10411041 // NOTE: These are order specific, we want the mi8 forms to be listed
10421042 // first so that they are slightly preferred to the mi forms.
1043 def #NAME#16mi8 : BinOpMI8_RMW_FF;
1044 def #NAME#32mi8 : BinOpMI8_RMW_FF;
1045 def #NAME#64mi8 : BinOpMI8_RMW_FF;
1046
1047 def #NAME#8mi : BinOpMI_RMW_FF;
1048 def #NAME#16mi : BinOpMI_RMW_FF;
1049 def #NAME#32mi : BinOpMI_RMW_FF;
1050 def #NAME#64mi32 : BinOpMI_RMW_FF;
1051
1052 def #NAME#8i8 : BinOpAI
1053 "{$src, %al|AL, $src}">;
1054 def #NAME#16i16 : BinOpAI
1055 "{$src, %ax|AX, $src}">;
1056 def #NAME#32i32 : BinOpAI
1057 "{$src, %eax|EAX, $src}">;
1058 def #NAME#64i32 : BinOpAI
1059 "{$src, %rax|RAX, $src}">;
1043 def NAME#16mi8 : BinOpMI8_RMW_FF>;
1044 def NAME#32mi8 : BinOpMI8_RMW_FF;
1045 def NAME#64mi8 : BinOpMI8_RMW_FF;
1046
1047 def NAME#8mi : BinOpMI_RMW_FF;
1048 def NAME#16mi : BinOpMI_RMW_FF;
1049 def NAME#32mi : BinOpMI_RMW_FF;
1050 def NAME#64mi32 : BinOpMI_RMW_FF;
1051
1052 def NAME#8i8 : BinOpAI
1053 "{$src, %al|AL, $src}">;
1054 def NAME#16i16 : BinOpAI
1055 "{$src, %ax|AX, $src}">;
1056 def NAME#32i32 : BinOpAI
1057 "{$src, %eax|EAX, $src}">;
1058 def NAME#64i32 : BinOpAI
1059 "{$src, %rax|RAX, $src}">;
10601060 }
10611061 }
10621062
10711071 let Defs = [EFLAGS] in {
10721072 let isCommutable = CommutableRR,
10731073 isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
1074 def #NAME#8rr : BinOpRR_F;
1075 def #NAME#16rr : BinOpRR_F;
1076 def #NAME#32rr : BinOpRR_F;
1077 def #NAME#64rr : BinOpRR_F, opnode>;
1074 def NAME#8rr : BinOpRR_F, opnode>;
1075 def NAME#16rr : BinOpRR_F;
1076 def NAME#32rr : BinOpRR_F;
1077 def NAME#64rr : BinOpRR_F;
10781078 } // isCommutable
10791079
1080 def #NAME#8rr_REV : BinOpRR_F_Rev;
1081 def #NAME#16rr_REV : BinOpRR_F_Rev;
1082 def #NAME#32rr_REV : BinOpRR_F_Rev;
1083 def #NAME#64rr_REV : BinOpRR_F_Rev;
1084
1085 def #NAME#8rm : BinOpRM_F;
1086 def #NAME#16rm : BinOpRM_F;
1087 def #NAME#32rm : BinOpRM_F;
1088 def #NAME#64rm : BinOpRM_F>;
1080 def NAME#8rr_REV : BinOpRR_F_Rev>;
1081 def NAME#16rr_REV : BinOpRR_F_Rev;
1082 def NAME#32rr_REV : BinOpRR_F_Rev;
1083 def NAME#64rr_REV : BinOpRR_F_Rev;
1084
1085 def NAME#8rm : BinOpRM_F;
1086 def NAME#16rm : BinOpRM_F;
1087 def NAME#32rm : BinOpRM_F;
1088 def NAME#64rm : BinOpRM_F;
10891089
10901090 let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
10911091 // NOTE: These are order specific, we want the ri8 forms to be listed
10921092 // first so that they are slightly preferred to the ri forms.
1093 def #NAME#16ri8 : BinOpRI8_F<0x82, mnemonic, Xi16, opnode, RegMRM>;
1094 def #NAME#32ri8 : BinOpRI8_F<0x82, mnemonic, Xi32, opnode, RegMRM>;
1095 def #NAME#64ri8 : BinOpRI8_F<0x82, mnemonic, Xi64, opnode, RegMRM>;
1096
1097 def #NAME#8ri : BinOpRI_F<0x80, mnemonic, Xi8 , opnode, RegMRM>;
1098 def #NAME#16ri : BinOpRI_F<0x80, mnemonic, Xi16, opnode, RegMRM>;
1099 def #NAME#32ri : BinOpRI_F<0x80, mnemonic, Xi32, opnode, RegMRM>;
1100 def #NAME#64ri32: BinOpRI_F<0x80, mnemonic, Xi64, opnode, RegMRM>;
1093 def NAME#16ri8 : BinOpRI8_F<0x82, mnemonic, Xi16, opnode, RegMRM>;
1094 def NAME#32ri8 : BinOpRI8_F<0x82, mnemonic, Xi32, opnode, RegMRM>;
1095 def NAME#64ri8 : BinOpRI8_F<0x82, mnemonic, Xi64, opnode, RegMRM>;
1096
1097 def NAME#8ri : BinOpRI_F<0x80, mnemonic, Xi8 , opnode, RegMRM>;
1098 def NAME#16ri : BinOpRI_F<0x80, mnemonic, Xi16, opnode, RegMRM>;
1099 def NAME#32ri : BinOpRI_F<0x80, mnemonic, Xi32, opnode, RegMRM>;
1100 def NAME#64ri32: BinOpRI_F<0x80, mnemonic, Xi64, opnode, RegMRM>;
11011101 }
11021102
1103 def #NAME#8mr : BinOpMR_F;
1104 def #NAME#16mr : BinOpMR_F;
1105 def #NAME#32mr : BinOpMR_F;
1106 def #NAME#64mr : BinOpMR_F, opnode>;
1103 def NAME#8mr : BinOpMR_F, opnode>;
1104 def NAME#16mr : BinOpMR_F;
1105 def NAME#32mr : BinOpMR_F;
1106 def NAME#64mr : BinOpMR_F;
11071107
11081108 // NOTE: These are order specific, we want the mi8 forms to be listed
11091109 // first so that they are slightly preferred to the mi forms.
1110 def #NAME#16mi8 : BinOpMI8_F;
1111 def #NAME#32mi8 : BinOpMI8_F;
1112 def #NAME#64mi8 : BinOpMI8_F;
1113
1114 def #NAME#8mi : BinOpMI_F;
1115 def #NAME#16mi : BinOpMI_F;
1116 def #NAME#32mi : BinOpMI_F;
1117 def #NAME#64mi32 : BinOpMI_F;
1118
1119 def #NAME#8i8 : BinOpAI
1120 "{$src, %al|AL, $src}">;
1121 def #NAME#16i16 : BinOpAI
1122 "{$src, %ax|AX, $src}">;
1123 def #NAME#32i32 : BinOpAI
1124 "{$src, %eax|EAX, $src}">;
1125 def #NAME#64i32 : BinOpAI
1126 "{$src, %rax|RAX, $src}">;
1110 def NAME#16mi8 : BinOpMI8_F>;
1111 def NAME#32mi8 : BinOpMI8_F;
1112 def NAME#64mi8 : BinOpMI8_F;
1113
1114 def NAME#8mi : BinOpMI_F;
1115 def NAME#16mi : BinOpMI_F;
1116 def NAME#32mi : BinOpMI_F;
1117 def NAME#64mi32 : BinOpMI_F;
1118
1119 def NAME#8i8 : BinOpAI
1120 "{$src, %al|AL, $src}">;
1121 def NAME#16i16 : BinOpAI
1122 "{$src, %ax|AX, $src}">;
1123 def NAME#32i32 : BinOpAI
1124 "{$src, %eax|EAX, $src}">;
1125 def NAME#64i32 : BinOpAI
1126 "{$src, %rax|RAX, $src}">;
11271127 }
11281128 }
11291129
1616 multiclass CMOV opc, string Mnemonic, PatLeaf CondNode> {
1717 let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
1818 isCommutable = 1 in {
19 def #NAME#16rr
19 def NAME#16rr
2020 : I
2121 !strconcat(Mnemonic, "{w}\t{$src2, $dst|$dst, $src2}"),
2222 [(set GR16:$dst,
2323 (X86cmov GR16:$src1, GR16:$src2, CondNode, EFLAGS))],
2424 IIC_CMOV16_RR>,TB,OpSize;
25 def #NAME#32rr
25 def NAME#32rr
2626 : I
2727 !strconcat(Mnemonic, "{l}\t{$src2, $dst|$dst, $src2}"),
2828 [(set GR32:$dst,
2929 (X86cmov GR32:$src1, GR32:$src2, CondNode, EFLAGS))],
3030 IIC_CMOV32_RR>, TB;
31 def #NAME#64rr
31 def NAME#64rr
3232 :RI
3333 !strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
3434 [(set GR64:$dst,
3737 }
3838
3939 let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst" in {
40 def #NAME#16rm
40 def NAME#16rm
4141 : I
4242 !strconcat(Mnemonic, "{w}\t{$src2, $dst|$dst, $src2}"),
4343 [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2),
4444 CondNode, EFLAGS))], IIC_CMOV16_RM>,
4545 TB, OpSize;
46 def #NAME#32rm
46 def NAME#32rm
4747 : I
4848 !strconcat(Mnemonic, "{l}\t{$src2, $dst|$dst, $src2}"),
4949 [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2),
5050 CondNode, EFLAGS))], IIC_CMOV32_RM>, TB;
51 def #NAME#64rm
51 def NAME#64rm
5252 :RI
5353 !strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
5454 [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2),
512512
513513 multiclass PSEUDO_ATOMIC_LOAD_BINOP {
514514 let usesCustomInserter = 1, mayLoad = 1, mayStore = 1 in {
515 def #NAME#8 : I<0, Pseudo, (outs GR8:$dst),
516 (ins i8mem:$ptr, GR8:$val),
517 !strconcat(mnemonic, "8 PSEUDO!"), []>;
518 def #NAME#16 : I<0, Pseudo,(outs GR16:$dst),
519 (ins i16mem:$ptr, GR16:$val),
520 !strconcat(mnemonic, "16 PSEUDO!"), []>;
521 def #NAME#32 : I<0, Pseudo, (outs GR32:$dst),
522 (ins i32mem:$ptr, GR32:$val),
523 !strconcat(mnemonic, "32 PSEUDO!"), []>;
524 def #NAME#64 : I<0, Pseudo, (outs GR64:$dst),
525 (ins i64mem:$ptr, GR64:$val),
526 !strconcat(mnemonic, "64 PSEUDO!"), []>;
515 def NAME#8 : I<0, Pseudo, (outs GR8:$dst),
516 (ins i8mem:$ptr, GR8:$val),
517 !strconcat(mnemonic, "8 PSEUDO!"), []>;
518 def NAME#16 : I<0, Pseudo,(outs GR16:$dst),
519 (ins i16mem:$ptr, GR16:$val),
520 !strconcat(mnemonic, "16 PSEUDO!"), []>;
521 def NAME#32 : I<0, Pseudo, (outs GR32:$dst),
522 (ins i32mem:$ptr, GR32:$val),
523 !strconcat(mnemonic, "32 PSEUDO!"), []>;
524 def NAME#64 : I<0, Pseudo, (outs GR64:$dst),
525 (ins i64mem:$ptr, GR64:$val),
526 !strconcat(mnemonic, "64 PSEUDO!"), []>;
527527 }
528528 }
529529
559559
560560 multiclass PSEUDO_ATOMIC_LOAD_BINOP6432 {
561561 let usesCustomInserter = 1, mayLoad = 1, mayStore = 1, hasSideEffects = 0 in
562 def #NAME#6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
563 (ins i64mem:$ptr, GR32:$val1, GR32:$val2),
564 !strconcat(mnemonic, "6432 PSEUDO!"), []>;
562 def NAME#6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
563 (ins i64mem:$ptr, GR32:$val1, GR32:$val2),
564 !strconcat(mnemonic, "6432 PSEUDO!"), []>;
565565 }
566566
567567 defm ATOMAND : PSEUDO_ATOMIC_LOAD_BINOP6432<"#ATOMAND">;
603603 Format ImmMod, string mnemonic> {
604604 let Defs = [EFLAGS], mayLoad = 1, mayStore = 1, isCodeGenOnly = 1 in {
605605
606 def #NAME#8mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
607 RegOpc{3}, RegOpc{2}, RegOpc{1}, 0 },
608 MRMDestMem, (outs), (ins i8mem:$dst, GR8:$src2),
609 !strconcat(mnemonic, "{b}\t",
606 def NAME#8mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
607 RegOpc{3}, RegOpc{2}, RegOpc{1}, 0 },
608 MRMDestMem, (outs), (ins i8mem:$dst, GR8:$src2),
609 !strconcat(mnemonic, "{b}\t",
610 "{$src2, $dst|$dst, $src2}"),
611 [], IIC_ALU_NONMEM>, LOCK;
612 def NAME#16mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
613 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
614 MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
615 !strconcat(mnemonic, "{w}\t",
616 "{$src2, $dst|$dst, $src2}"),
617 [], IIC_ALU_NONMEM>, OpSize, LOCK;
618 def NAME#32mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
619 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
620 MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2),
621 !strconcat(mnemonic, "{l}\t",
610622 "{$src2, $dst|$dst, $src2}"),
611623 [], IIC_ALU_NONMEM>, LOCK;
612 def #NAME#16mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
624 def NAME#64mr : RI<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
613625 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
614 MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
615 !strconcat(mnemonic, "{w}\t",
616 "{$src2, $dst|$dst, $src2}"),
617 [], IIC_ALU_NONMEM>, OpSize, LOCK;
618 def #NAME#32mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
619 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
620 MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2),
621 !strconcat(mnemonic, "{l}\t",
626 MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
627 !strconcat(mnemonic, "{q}\t",
622628 "{$src2, $dst|$dst, $src2}"),
623629 [], IIC_ALU_NONMEM>, LOCK;
624 def #NAME#64mr : RI<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
625 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
626 MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
627 !strconcat(mnemonic, "{q}\t",
628 "{$src2, $dst|$dst, $src2}"),
629 [], IIC_ALU_NONMEM>, LOCK;
630
631 def #NAME#8mi : Ii8<{ImmOpc{7}, ImmOpc{6}, ImmOpc{5}, ImmOpc{4},
632 ImmOpc{3}, ImmOpc{2}, ImmOpc{1}, 0 },
633 ImmMod, (outs), (ins i8mem :$dst, i8imm :$src2),
634 !strconcat(mnemonic, "{b}\t",
635 "{$src2, $dst|$dst, $src2}"),
636 [], IIC_ALU_MEM>, LOCK;
637
638 def #NAME#16mi : Ii16<{ImmOpc{7}, ImmOpc{6}, ImmOpc{5}, ImmOpc{4},
639 ImmOpc{3}, ImmOpc{2}, ImmOpc{1}, 1 },
640 ImmMod, (outs), (ins i16mem :$dst, i16imm :$src2),
641 !strconcat(mnemonic, "{w}\t",
642 "{$src2, $dst|$dst, $src2}"),
643 [], IIC_ALU_MEM>, OpSize, LOCK;
644
645 def #NAME#32mi : Ii32<{ImmOpc{7}, ImmOpc{6}, ImmOpc{5}, ImmOpc{4},
646 ImmOpc{3}, ImmOpc{2}, ImmOpc{1}, 1 },
647 ImmMod, (outs), (ins i32mem :$dst, i32imm :$src2),
648 !strconcat(mnemonic, "{l}\t",
630
631 def NAME#8mi : Ii8<{ImmOpc{7}, ImmOpc{6}, ImmOpc{5}, ImmOpc{4},
632 ImmOpc{3}, ImmOpc{2}, ImmOpc{1}, 0 },
633 ImmMod, (outs), (ins i8mem :$dst, i8imm :$src2),
634 !strconcat(mnemonic, "{b}\t",
635 "{$src2, $dst|$dst, $src2}"),
636 [], IIC_ALU_MEM>, LOCK;
637
638 def NAME#16mi : Ii16<{ImmOpc{7}, ImmOpc{6}, ImmOpc{5}, ImmOpc{4},
639 ImmOpc{3}, ImmOpc{2}, ImmOpc{1}, 1 },
640 ImmMod, (outs), (ins i16mem :$dst, i16imm :$src2),
641 !strconcat(mnemonic, "{w}\t",
642 "{$src2, $dst|$dst, $src2}"),
643 [], IIC_ALU_MEM>, OpSize, LOCK;
644
645 def NAME#32mi : Ii32<{ImmOpc{7}, ImmOpc{6}, ImmOpc{5}, ImmOpc{4},
646 ImmOpc{3}, ImmOpc{2}, ImmOpc{1}, 1 },
647 ImmMod, (outs), (ins i32mem :$dst, i32imm :$src2),
648 !strconcat(mnemonic, "{l}\t",
649 "{$src2, $dst|$dst, $src2}"),
650 [], IIC_ALU_MEM>, LOCK;
651
652 def NAME#64mi32 : RIi32<{ImmOpc{7}, ImmOpc{6}, ImmOpc{5}, ImmOpc{4},
653 ImmOpc{3}, ImmOpc{2}, ImmOpc{1}, 1 },
654 ImmMod, (outs), (ins i64mem :$dst, i64i32imm :$src2),
655 !strconcat(mnemonic, "{q}\t",
656 "{$src2, $dst|$dst, $src2}"),
657 [], IIC_ALU_MEM>, LOCK;
658
659 def NAME#16mi8 : Ii8<{ImmOpc8{7}, ImmOpc8{6}, ImmOpc8{5}, ImmOpc8{4},
660 ImmOpc8{3}, ImmOpc8{2}, ImmOpc8{1}, 1 },
661 ImmMod, (outs), (ins i16mem :$dst, i16i8imm :$src2),
662 !strconcat(mnemonic, "{w}\t",
663 "{$src2, $dst|$dst, $src2}"),
664 [], IIC_ALU_MEM>, OpSize, LOCK;
665 def NAME#32mi8 : Ii8<{ImmOpc8{7}, ImmOpc8{6}, ImmOpc8{5}, ImmOpc8{4},
666 ImmOpc8{3}, ImmOpc8{2}, ImmOpc8{1}, 1 },
667 ImmMod, (outs), (ins i32mem :$dst, i32i8imm :$src2),
668 !strconcat(mnemonic, "{l}\t",
669 "{$src2, $dst|$dst, $src2}"),
670 [], IIC_ALU_MEM>, LOCK;
671 def NAME#64mi8 : RIi8<{ImmOpc8{7}, ImmOpc8{6}, ImmOpc8{5}, ImmOpc8{4},
672 ImmOpc8{3}, ImmOpc8{2}, ImmOpc8{1}, 1 },
673 ImmMod, (outs), (ins i64mem :$dst, i64i8imm :$src2),
674 !strconcat(mnemonic, "{q}\t",
649675 "{$src2, $dst|$dst, $src2}"),
650676 [], IIC_ALU_MEM>, LOCK;
651
652 def #NAME#64mi32 : RIi32<{ImmOpc{7}, ImmOpc{6}, ImmOpc{5}, ImmOpc{4},
653 ImmOpc{3}, ImmOpc{2}, ImmOpc{1}, 1 },
654 ImmMod, (outs), (ins i64mem :$dst, i64i32imm :$src2),
655 !strconcat(mnemonic, "{q}\t",
656 "{$src2, $dst|$dst, $src2}"),
657 [], IIC_ALU_MEM>, LOCK;
658
659 def #NAME#16mi8 : Ii8<{ImmOpc8{7}, ImmOpc8{6}, ImmOpc8{5}, ImmOpc8{4},
660 ImmOpc8{3}, ImmOpc8{2}, ImmOpc8{1}, 1 },
661 ImmMod, (outs), (ins i16mem :$dst, i16i8imm :$src2),
662 !strconcat(mnemonic, "{w}\t",
663 "{$src2, $dst|$dst, $src2}"),
664 [], IIC_ALU_MEM>, OpSize, LOCK;
665 def #NAME#32mi8 : Ii8<{ImmOpc8{7}, ImmOpc8{6}, ImmOpc8{5}, ImmOpc8{4},
666 ImmOpc8{3}, ImmOpc8{2}, ImmOpc8{1}, 1 },
667 ImmMod, (outs), (ins i32mem :$dst, i32i8imm :$src2),
668 !strconcat(mnemonic, "{l}\t",
669 "{$src2, $dst|$dst, $src2}"),
670 [], IIC_ALU_MEM>, LOCK;
671 def #NAME#64mi8 : RIi8<{ImmOpc8{7}, ImmOpc8{6}, ImmOpc8{5}, ImmOpc8{4},
672 ImmOpc8{3}, ImmOpc8{2}, ImmOpc8{1}, 1 },
673 ImmMod, (outs), (ins i64mem :$dst, i64i8imm :$src2),
674 !strconcat(mnemonic, "{q}\t",
675 "{$src2, $dst|$dst, $src2}"),
676 [], IIC_ALU_MEM>, LOCK;
677677
678678 }
679679
690690 string mnemonic> {
691691 let Defs = [EFLAGS], mayLoad = 1, mayStore = 1, isCodeGenOnly = 1 in {
692692
693 def #NAME#8m : I
694 !strconcat(mnemonic, "{b}\t$dst"),
693 def NAME#8m : I),
694 !strconcat(mnemonic, "{b}\t$dst"),
695 [], IIC_UNARY_MEM>, LOCK;
696 def NAME#16m : I
697 !strconcat(mnemonic, "{w}\t$dst"),
698 [], IIC_UNARY_MEM>, OpSize, LOCK;
699 def NAME#32m : I
700 !strconcat(mnemonic, "{l}\t$dst"),
701 [], IIC_UNARY_MEM>, LOCK;
702 def NAME#64m : RI
703 !strconcat(mnemonic, "{q}\t$dst"),
695704 [], IIC_UNARY_MEM>, LOCK;
696 def #NAME#16m : I
697 !strconcat(mnemonic, "{w}\t$dst"),
698 [], IIC_UNARY_MEM>, OpSize, LOCK;
699 def #NAME#32m : I
700 !strconcat(mnemonic, "{l}\t$dst"),
701 [], IIC_UNARY_MEM>, LOCK;
702 def #NAME#64m : RI
703 !strconcat(mnemonic, "{q}\t$dst"),
704 [], IIC_UNARY_MEM>, LOCK;
705705 }
706706 }
707707
713713 SDPatternOperator frag, X86MemOperand x86memop,
714714 InstrItinClass itin> {
715715 let isCodeGenOnly = 1 in {
716 def #NAME# : I
717 !strconcat(mnemonic, "\t$ptr"),
718 [(frag addr:$ptr)], itin>, TB, LOCK;
716 def NAME : I
717 !strconcat(mnemonic, "\t$ptr"),
718 [(frag addr:$ptr)], itin>, TB, LOCK;
719719 }
720720 }
721721
724724 InstrItinClass itin8, InstrItinClass itin> {
725725 let isCodeGenOnly = 1 in {
726726 let Defs = [AL, EFLAGS], Uses = [AL] in
727 def #NAME#8 : I
728 !strconcat(mnemonic, "{b}\t{$swap, $ptr|$ptr, $swap}"),
729 [(frag addr:$ptr, GR8:$swap, 1)], itin8>, TB, LOCK;
727 def NAME#8 : I
728 !strconcat(mnemonic, "{b}\t{$swap, $ptr|$ptr, $swap}"),
729 [(frag addr:$ptr, GR8:$swap, 1)], itin8>, TB, LOCK;
730730 let Defs = [AX, EFLAGS], Uses = [AX] in
731 def #NAME#16 : I
732 !strconcat(mnemonic, "{w}\t{$swap, $ptr|$ptr, $swap}"),
733 [(frag addr:$ptr, GR16:$swap, 2)], itin>, TB, OpSize, LOCK;
731 def NAME#16 : I
732 !strconcat(mnemonic, "{w}\t{$swap, $ptr|$ptr, $swap}"),
733 [(frag addr:$ptr, GR16:$swap, 2)], itin>, TB, OpSize, LOCK;
734734 let Defs = [EAX, EFLAGS], Uses = [EAX] in
735 def #NAME#32 : I
736 !strconcat(mnemonic, "{l}\t{$swap, $ptr|$ptr, $swap}"),
737 [(frag addr:$ptr, GR32:$swap, 4)], itin>, TB, LOCK;
735 def NAME#32 : I
736 !strconcat(mnemonic, "{l}\t{$swap, $ptr|$ptr, $swap}"),
737 [(frag addr:$ptr, GR32:$swap, 4)], itin>, TB, LOCK;
738738 let Defs = [RAX, EFLAGS], Uses = [RAX] in
739 def #NAME#64 : RI
740 !strconcat(mnemonic, "{q}\t{$swap, $ptr|$ptr, $swap}"),
741 [(frag addr:$ptr, GR64:$swap, 8)], itin>, TB, LOCK;
739 def NAME#64 : RI
740 !strconcat(mnemonic, "{q}\t{$swap, $ptr|$ptr, $swap}"),
741 [(frag addr:$ptr, GR64:$swap, 8)], itin>, TB, LOCK;
742742 }
743743 }
744744
763763 string frag,
764764 InstrItinClass itin8, InstrItinClass itin> {
765765 let Constraints = "$val = $dst", Defs = [EFLAGS], isCodeGenOnly = 1 in {
766 def #NAME#8 : I
767 (ins GR8:$val, i8mem:$ptr),
768 !strconcat(mnemonic, "{b}\t{$val, $ptr|$ptr, $val}"),
769 [(set GR8:$dst,
770 (!cast(frag # "_8") addr:$ptr, GR8:$val))],
771 itin8>;
772 def #NAME#16 : I
773 (ins GR16:$val, i16mem:$ptr),
774 !strconcat(mnemonic, "{w}\t{$val, $ptr|$ptr, $val}"),
766 def NAME#8 : I),
767 (ins GR8:$val, i8mem:$ptr),
768 !strconcat(mnemonic, "{b}\t{$val, $ptr|$ptr, $val}"),
769 [(set GR8:$dst,
770 (!cast(frag # "_8") addr:$ptr, GR8:$val))],
771 itin8>;
772 def NAME#16 : I
773 (ins GR16:$val, i16mem:$ptr),
774 !strconcat(mnemonic, "{w}\t{$val, $ptr|$ptr, $val}"),
775 [(set
776 GR16:$dst,
777 (!cast(frag # "_16") addr:$ptr, GR16:$val))],
778 itin>, OpSize;
779 def NAME#32 : I
780 (ins GR32:$val, i32mem:$ptr),
781 !strconcat(mnemonic, "{l}\t{$val, $ptr|$ptr, $val}"),
782 [(set
783 GR32:$dst,
784 (!cast(frag # "_32") addr:$ptr, GR32:$val))],
785 itin>;
786 def NAME#64 : RI
787 (ins GR64:$val, i64mem:$ptr),
788 !strconcat(mnemonic, "{q}\t{$val, $ptr|$ptr, $val}"),
775789 [(set
776 GR16:$dst,
777 (!cast(frag # "_16") addr:$ptr, GR16:$val))],
778 itin>, OpSize;
779 def #NAME#32 : I
780 (ins GR32:$val, i32mem:$ptr),
781 !strconcat(mnemonic, "{l}\t{$val, $ptr|$ptr, $val}"),
782 [(set
783 GR32:$dst,
784 (!cast(frag # "_32") addr:$ptr, GR32:$val))],
790 GR64:$dst,
791 (!cast(frag # "_64") addr:$ptr, GR64:$val))],
785792 itin>;
786 def #NAME#64 : RI
787 (ins GR64:$val, i64mem:$ptr),
788 !strconcat(mnemonic, "{q}\t{$val, $ptr|$ptr, $val}"),
789 [(set
790 GR64:$dst,
791 (!cast(frag # "_64") addr:$ptr, GR64:$val))],
792 itin>;
793793 }
794794 }
795795
13031303 multiclass ATOMIC_SWAP opc8, bits<8> opc, string mnemonic, string frag,
13041304 InstrItinClass itin> {
13051305 let Constraints = "$val = $dst" in {
1306 def #NAME#8rm : I
1307 (ins GR8:$val, i8mem:$ptr),
1308 !strconcat(mnemonic, "{b}\t{$val, $ptr|$ptr, $val}"),
1306 def NAME#8rm : I),
1307 (ins GR8:$val, i8mem:$ptr),
1308 !strconcat(mnemonic, "{b}\t{$val, $ptr|$ptr, $val}"),
1309 [(set
1310 GR8:$dst,
1311 (!cast(frag # "_8") addr:$ptr, GR8:$val))],
1312 itin>;
1313 def NAME#16rm : I
1314 (ins GR16:$val, i16mem:$ptr),
1315 !strconcat(mnemonic, "{w}\t{$val, $ptr|$ptr, $val}"),
1316 [(set
1317 GR16:$dst,
1318 (!cast(frag # "_16") addr:$ptr, GR16:$val))],
1319 itin>, OpSize;
1320 def NAME#32rm : I
1321 (ins GR32:$val, i32mem:$ptr),
1322 !strconcat(mnemonic, "{l}\t{$val, $ptr|$ptr, $val}"),
1323 [(set
1324 GR32:$dst,
1325 (!cast(frag # "_32") addr:$ptr, GR32:$val))],
1326 itin>;
1327 def NAME#64rm : RI
1328 (ins GR64:$val, i64mem:$ptr),
1329 !strconcat(mnemonic, "{q}\t{$val, $ptr|$ptr, $val}"),
13091330 [(set
1310 GR8:$dst,
1311 (!cast(frag # "_8") addr:$ptr, GR8:$val))],
1331 GR64:$dst,
1332 (!cast(frag # "_64") addr:$ptr, GR64:$val))],
13121333 itin>;
1313 def #NAME#16rm : I
1314 (ins GR16:$val, i16mem:$ptr),
1315 !strconcat(mnemonic, "{w}\t{$val, $ptr|$ptr, $val}"),
1316 [(set
1317 GR16:$dst,
1318 (!cast(frag # "_16") addr:$ptr, GR16:$val))],
1319 itin>, OpSize;
1320 def #NAME#32rm : I
1321 (ins GR32:$val, i32mem:$ptr),
1322 !strconcat(mnemonic, "{l}\t{$val, $ptr|$ptr, $val}"),
1323 [(set
1324 GR32:$dst,
1325 (!cast(frag # "_32") addr:$ptr, GR32:$val))],
1326 itin>;
1327 def #NAME#64rm : RI
1328 (ins GR64:$val, i64mem:$ptr),
1329 !strconcat(mnemonic, "{q}\t{$val, $ptr|$ptr, $val}"),
1330 [(set
1331 GR64:$dst,
1332 (!cast(frag # "_64") addr:$ptr, GR64:$val))],
1333 itin>;
13341334 }
13351335 }
13361336