llvm.org GIT mirror llvm / c023b23
Trivial cleanups. This just clang formats and cleans comments in an area I am about to post a patch for review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269946 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 4 years ago
13 changed file(s) with 35 addition(s) and 37 deletion(s). Raw diff Collapse all Expand all
4545 cl::desc("Target specific attributes (-mattr=help for details)"),
4646 cl::value_desc("a1,+a2,-a3,..."));
4747
48 cl::opt
49 RelocModel("relocation-model",
50 cl::desc("Choose relocation model"),
51 cl::init(Reloc::Default),
52 cl::values(
53 clEnumValN(Reloc::Default, "default",
54 "Target default relocation model"),
55 clEnumValN(Reloc::Static, "static",
56 "Non-relocatable code"),
57 clEnumValN(Reloc::PIC_, "pic",
58 "Fully relocatable, position independent code"),
59 clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic",
60 "Relocatable external references, non-relocatable code"),
61 clEnumValEnd));
48 cl::opt RelocModel(
49 "relocation-model", cl::desc("Choose relocation model"),
50 cl::init(Reloc::Default),
51 cl::values(
52 clEnumValN(Reloc::Default, "default",
53 "Target default relocation model"),
54 clEnumValN(Reloc::Static, "static", "Non-relocatable code"),
55 clEnumValN(Reloc::PIC_, "pic",
56 "Fully relocatable, position independent code"),
57 clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic",
58 "Relocatable external references, non-relocatable code"),
59 clEnumValEnd));
6260
6361 cl::opt
6462 TMModel("thread-model",
1818
1919 // Relocation model types.
2020 namespace Reloc {
21 enum Model { Default, Static, PIC_, DynamicNoPIC };
21 enum Model { Default, Static, PIC_, DynamicNoPIC };
2222 }
2323
2424 // Code model types.
160160 TM.Options.Reciprocals.setDefaults("vec-divd", false, ExtraStepsD);
161161 }
162162
163 /// TargetMachine ctor - Create an AArch64 architecture model.
163 /// Create an AArch64 architecture model.
164164 ///
165165 AArch64TargetMachine::AArch64TargetMachine(const Target &T, const Triple &TT,
166166 StringRef CPU, StringRef FS,
4848 AArch64Subtarget Subtarget;
4949 };
5050
51 // AArch64leTargetMachine - AArch64 little endian target machine.
51 // AArch64 little endian target machine.
5252 //
5353 class AArch64leTargetMachine : public AArch64TargetMachine {
5454 virtual void anchor();
5959 CodeGenOpt::Level OL);
6060 };
6161
62 // AArch64beTargetMachine - AArch64 big endian target machine.
62 // AArch64 big endian target machine.
6363 //
6464 class AArch64beTargetMachine : public AArch64TargetMachine {
6565 virtual void anchor();
171171 return Ret;
172172 }
173173
174 /// TargetMachine ctor - Create an ARM architecture model.
174 /// Create an ARM architecture model.
175175 ///
176176 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT,
177177 StringRef CPU, StringRef FS,
5757 }
5858 };
5959
60 /// ARMTargetMachine - ARM target machine.
60 /// ARM target machine.
6161 ///
6262 class ARMTargetMachine : public ARMBaseTargetMachine {
6363 virtual void anchor();
6767 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
6868 };
6969
70 /// ARMLETargetMachine - ARM little endian target machine.
70 /// ARM little endian target machine.
7171 ///
7272 class ARMLETargetMachine : public ARMTargetMachine {
7373 void anchor() override;
7878 CodeGenOpt::Level OL);
7979 };
8080
81 /// ARMBETargetMachine - ARM big endian target machine.
81 /// ARM big endian target machine.
8282 ///
8383 class ARMBETargetMachine : public ARMTargetMachine {
8484 void anchor() override;
8989 CodeGenOpt::Level OL);
9090 };
9191
92 /// ThumbTargetMachine - Thumb target machine.
92 /// Thumb target machine.
9393 /// Due to the way architectures are handled, this represents both
9494 /// Thumb-1 and Thumb-2.
9595 ///
102102 bool isLittle);
103103 };
104104
105 /// ThumbLETargetMachine - Thumb little endian target machine.
105 /// Thumb little endian target machine.
106106 ///
107107 class ThumbLETargetMachine : public ThumbTargetMachine {
108108 void anchor() override;
113113 CodeGenOpt::Level OL);
114114 };
115115
116 /// ThumbBETargetMachine - Thumb big endian target machine.
116 /// Thumb big endian target machine.
117117 ///
118118 class ThumbBETargetMachine : public ThumbTargetMachine {
119119 void anchor() override;
6767 const MipsABIInfo &getABI() const { return ABI; }
6868 };
6969
70 /// MipsebTargetMachine - Mips32/64 big endian target machine.
70 /// Mips32/64 big endian target machine.
7171 ///
7272 class MipsebTargetMachine : public MipsTargetMachine {
7373 virtual void anchor();
7878 CodeGenOpt::Level OL);
7979 };
8080
81 /// MipselTargetMachine - Mips32/64 little endian target machine.
81 /// Mips32/64 little endian target machine.
8282 ///
8383 class MipselTargetMachine : public MipsTargetMachine {
8484 virtual void anchor();
2020
2121 namespace llvm {
2222
23 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
23 /// Common code between 32-bit and 64-bit PowerPC targets.
2424 ///
2525 class PPCTargetMachine : public LLVMTargetMachine {
2626 public:
5656 };
5757 };
5858
59 /// PPC32TargetMachine - PowerPC 32-bit target machine.
59 /// PowerPC 32-bit target machine.
6060 ///
6161 class PPC32TargetMachine : public PPCTargetMachine {
6262 virtual void anchor();
6767 CodeGenOpt::Level OL);
6868 };
6969
70 /// PPC64TargetMachine - PowerPC 64-bit target machine.
70 /// PowerPC 64-bit target machine.
7171 ///
7272 class PPC64TargetMachine : public PPCTargetMachine {
7373 virtual void anchor();
5252 return Ret;
5353 }
5454
55 /// SparcTargetMachine ctor - Create an ILP32 architecture model
55 /// Create an ILP32 architecture model
5656 ///
5757 SparcTargetMachine::SparcTargetMachine(const Target &T, const Triple &TT,
5858 StringRef CPU, StringRef FS,
3939 }
4040 };
4141
42 /// SparcV8TargetMachine - Sparc 32-bit target machine
42 /// Sparc 32-bit target machine
4343 ///
4444 class SparcV8TargetMachine : public SparcTargetMachine {
4545 virtual void anchor();
5050 CodeGenOpt::Level OL);
5151 };
5252
53 /// SparcV9TargetMachine - Sparc 64-bit target machine
53 /// Sparc 64-bit target machine
5454 ///
5555 class SparcV9TargetMachine : public SparcTargetMachine {
5656 virtual void anchor();
7070 RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math");
7171 }
7272
73 /// getRelocationModel - Returns the code generation relocation model. The
74 /// choices are static, PIC, and dynamic-no-pic, and target default.
73 /// Returns the code generation relocation model. The choices are static, PIC,
74 /// and dynamic-no-pic, and target default.
7575 Reloc::Model TargetMachine::getRelocationModel() const {
7676 if (!CodeGenInfo)
7777 return Reloc::Default;
105105 return Ret;
106106 }
107107
108 /// X86TargetMachine ctor - Create an X86 target.
108 /// Create an X86 target.
109109 ///
110110 X86TargetMachine::X86TargetMachine(const Target &T, const Triple &TT,
111111 StringRef CPU, StringRef FS,
2020 #include "llvm/Support/TargetRegistry.h"
2121 using namespace llvm;
2222
23 /// XCoreTargetMachine ctor - Create an ILP32 architecture model
23 /// Create an ILP32 architecture model
2424 ///
2525 XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT,
2626 StringRef CPU, StringRef FS,