llvm.org GIT mirror llvm / bfc3275
Merging r354733: ------------------------------------------------------------------------ r354733 | nikic | 2019-02-23 19:59:01 +0100 (Sat, 23 Feb 2019) | 10 lines [WebAssembly] Fix select of and (PR40805) Fixes https://bugs.llvm.org/show_bug.cgi?id=40805 introduced by patterns added in D53676. I'm removing the patterns entirely here, as they are not correct in the general case. If necessary something more specific can be added in the future. Differential Revision: https://reviews.llvm.org/D58575 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_80@354860 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 1 year, 8 months ago
3 changed file(s) with 27 addition(s) and 17 deletion(s). Raw diff Collapse all Expand all
121121 (SELECT_I32 I32:$rhs, I32:$lhs, I32:$cond)>;
122122 def : Pat<(select (i32 (seteq I32:$cond, 0)), I64:$lhs, I64:$rhs),
123123 (SELECT_I64 I64:$rhs, I64:$lhs, I32:$cond)>;
124
125 // The legalizer inserts an unnecessary `and 1` to make input conform
126 // to getBooleanContents, which we can lower away.
127 def : Pat<(select (i32 (and I32:$cond, 1)), I32:$lhs, I32:$rhs),
128 (SELECT_I32 I32:$lhs, I32:$rhs, I32:$cond)>;
129 def : Pat<(select (i32 (and I32:$cond, 1)), I64:$lhs, I64:$rhs),
130 (SELECT_I64 I64:$lhs, I64:$rhs, I32:$cond)>;
1616
1717 ; CHECK-LABEL: select_i32_bool_nozext:
1818 ; CHECK-NEXT: .functype select_i32_bool_nozext (i32, i32, i32) -> (i32){{$}}
19 ; SLOW-NEXT: i32.select $push0=, $1, $2, $0{{$}}
20 ; SLOW-NEXT: return $pop0{{$}}
19 ; SLOW-NEXT: i32.const $push0=, 1{{$}}
20 ; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}}
21 ; SLOW-NEXT: i32.select $push2=, $1, $2, $pop1{{$}}
22 ; SLOW-NEXT: return $pop2{{$}}
2123 define i32 @select_i32_bool_nozext(i1 %a, i32 %b, i32 %c) {
2224 %cond = select i1 %a, i32 %b, i32 %c
2325 ret i32 %cond
5456
5557 ; CHECK-LABEL: select_i64_bool_nozext:
5658 ; CHECK-NEXT: .functype select_i64_bool_nozext (i32, i64, i64) -> (i64){{$}}
57 ; SLOW-NEXT: i64.select $push0=, $1, $2, $0{{$}}
58 ; SLOW-NEXT: return $pop0{{$}}
59 ; SLOW-NEXT: i32.const $push0=, 1{{$}}
60 ; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}}
61 ; SLOW-NEXT: i64.select $push2=, $1, $2, $pop1{{$}}
62 ; SLOW-NEXT: return $pop2{{$}}
5963 define i64 @select_i64_bool_nozext(i1 %a, i64 %b, i64 %c) {
6064 %cond = select i1 %a, i64 %b, i64 %c
6165 ret i64 %cond
156160 %cond = select i1 %cmp, double %b, double %c
157161 ret double %cond
158162 }
163
164 ; CHECK-LABEL: pr40805:
165 ; CHECK-NEXT: .functype pr40805 (i32, i32, i32) -> (i32){{$}}
166 ; SLOW-NEXT: i32.const $push0=, 1{{$}}
167 ; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}}
168 ; SLOW-NEXT: i32.select $push2=, $1, $2, $pop1{{$}}
169 ; SLOW-NEXT: return $pop2{{$}}
170 define i32 @pr40805(i32 %x, i32 %y, i32 %z) {
171 %a = and i32 %x, 1
172 %b = icmp ne i32 %a, 0
173 %c = select i1 %b, i32 %y, i32 %z
174 ret i32 %c
175 }
2828 ; CHECK-NEXT: i8x16.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
2929 ; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
3030 ; CHECK-NEXT: return $pop[[R]]{{$}}
31 define <16 x i8> @select_v16i8(i1 %c, <16 x i8> %x, <16 x i8> %y) {
31 define <16 x i8> @select_v16i8(i1 zeroext %c, <16 x i8> %x, <16 x i8> %y) {
3232 %res = select i1 %c, <16 x i8> %x, <16 x i8> %y
3333 ret <16 x i8> %res
3434 }
9898 ; CHECK-NEXT: i16x8.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
9999 ; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
100100 ; CHECK-NEXT: return $pop[[R]]{{$}}
101 define <8 x i16> @select_v8i16(i1 %c, <8 x i16> %x, <8 x i16> %y) {
101 define <8 x i16> @select_v8i16(i1 zeroext %c, <8 x i16> %x, <8 x i16> %y) {
102102 %res = select i1 %c, <8 x i16> %x, <8 x i16> %y
103103 ret <8 x i16> %res
104104 }
169169 ; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
170170 ; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
171171 ; CHECK-NEXT: return $pop[[R]]{{$}}
172 define <4 x i32> @select_v4i32(i1 %c, <4 x i32> %x, <4 x i32> %y) {
172 define <4 x i32> @select_v4i32(i1 zeroext %c, <4 x i32> %x, <4 x i32> %y) {
173173 %res = select i1 %c, <4 x i32> %x, <4 x i32> %y
174174 ret <4 x i32> %res
175175 }
239239 ; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
240240 ; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
241241 ; CHECK-NEXT: return $pop[[R]]{{$}}
242 define <2 x i64> @select_v2i64(i1 %c, <2 x i64> %x, <2 x i64> %y) {
242 define <2 x i64> @select_v2i64(i1 zeroext %c, <2 x i64> %x, <2 x i64> %y) {
243243 %res = select i1 %c, <2 x i64> %x, <2 x i64> %y
244244 ret <2 x i64> %res
245245 }
312312 ; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
313313 ; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
314314 ; CHECK-NEXT: return $pop[[R]]{{$}}
315 define <4 x float> @select_v4f32(i1 %c, <4 x float> %x, <4 x float> %y) {
315 define <4 x float> @select_v4f32(i1 zeroext %c, <4 x float> %x, <4 x float> %y) {
316316 %res = select i1 %c, <4 x float> %x, <4 x float> %y
317317 ret <4 x float> %res
318318 }
382382 ; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
383383 ; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
384384 ; CHECK-NEXT: return $pop[[R]]{{$}}
385 define <2 x double> @select_v2f64(i1 %c, <2 x double> %x, <2 x double> %y) {
385 define <2 x double> @select_v2f64(i1 zeroext %c, <2 x double> %x, <2 x double> %y) {
386386 %res = select i1 %c, <2 x double> %x, <2 x double> %y
387387 ret <2 x double> %res
388388 }