llvm.org GIT mirror llvm / bf7cc39
AddressSanitizer instrumentation for MOV and MOVAPS. This is an initial version of *Sanitizer instrumentation of assembly code. Patch by Yuri Gorshenin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203908 91177308-0d34-0410-b5e6-96231b3b80d8 Evgeniy Stepanov 6 years ago
7 changed file(s) with 547 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
0 add_llvm_library(LLVMX86AsmParser
1 X86AsmInstrumentation.cpp
12 X86AsmParser.cpp
23 )
0 //===-- X86AsmInstrumentation.cpp - Instrument X86 inline assembly C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "MCTargetDesc/X86BaseInfo.h"
10 #include "X86AsmInstrumentation.h"
11 #include "X86Operand.h"
12 #include "llvm/ADT/StringExtras.h"
13 #include "llvm/MC/MCContext.h"
14 #include "llvm/MC/MCInst.h"
15 #include "llvm/MC/MCInstBuilder.h"
16 #include "llvm/MC/MCStreamer.h"
17 #include "llvm/MC/MCSubtargetInfo.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/Support/Compiler.h"
20 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
21
22 namespace llvm {
23 namespace {
24
25 static cl::opt ClAsanInstrumentInlineAssembly(
26 "asan-instrument-inline-assembly", cl::desc("instrument inline assembly"),
27 cl::Hidden, cl::init(false));
28
29 bool IsStackReg(unsigned Reg) {
30 return Reg == X86::RSP || Reg == X86::ESP || Reg == X86::SP;
31 }
32
33 std::string FuncName(unsigned AccessSize, bool IsWrite) {
34 return std::string("__sanitizer_sanitize_") + (IsWrite ? "store" : "load") +
35 (utostr(AccessSize));
36 }
37
38 class X86AddressSanitizer : public X86AsmInstrumentation {
39 public:
40 X86AddressSanitizer(MCSubtargetInfo &sti) : STI(sti) {}
41 virtual ~X86AddressSanitizer() {}
42
43 // X86AsmInstrumentation implementation:
44 virtual void InstrumentInstruction(
45 const MCInst &Inst, SmallVectorImpl &Operands,
46 MCContext &Ctx, MCStreamer &Out) override {
47 InstrumentMOV(Inst, Operands, Ctx, Out);
48 }
49
50 // Should be implemented differently in x86_32 and x86_64 subclasses.
51 virtual void InstrumentMemOperandImpl(X86Operand *Op, unsigned AccessSize,
52 bool IsWrite, MCContext &Ctx,
53 MCStreamer &Out) = 0;
54
55 void InstrumentMemOperand(MCParsedAsmOperand *Op, unsigned AccessSize,
56 bool IsWrite, MCContext &Ctx, MCStreamer &Out);
57 void InstrumentMOV(const MCInst &Inst,
58 SmallVectorImpl &Operands,
59 MCContext &Ctx, MCStreamer &Out);
60 void EmitInstruction(MCStreamer &Out, const MCInst &Inst) {
61 Out.EmitInstruction(Inst, STI);
62 }
63
64 protected:
65 MCSubtargetInfo &STI;
66 };
67
68 void X86AddressSanitizer::InstrumentMemOperand(
69 MCParsedAsmOperand *Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
70 MCStreamer &Out) {
71 assert(Op && Op->isMem() && "Op should be a memory operand.");
72 assert((AccessSize & (AccessSize - 1)) == 0 && AccessSize <= 16 &&
73 "AccessSize should be a power of two, less or equal than 16.");
74
75 X86Operand *MemOp = static_cast(Op);
76 // FIXME: get rid of this limitation.
77 if (IsStackReg(MemOp->getMemBaseReg()) || IsStackReg(MemOp->getMemIndexReg()))
78 return;
79
80 InstrumentMemOperandImpl(MemOp, AccessSize, IsWrite, Ctx, Out);
81 }
82
83 void X86AddressSanitizer::InstrumentMOV(
84 const MCInst &Inst, SmallVectorImpl &Operands,
85 MCContext &Ctx, MCStreamer &Out) {
86 // Access size in bytes.
87 unsigned AccessSize = 0;
88 unsigned long OpIx = Operands.size();
89 switch (Inst.getOpcode()) {
90 case X86::MOV8mi:
91 case X86::MOV8mr:
92 AccessSize = 1;
93 OpIx = 2;
94 break;
95 case X86::MOV8rm:
96 AccessSize = 1;
97 OpIx = 1;
98 break;
99 case X86::MOV16mi:
100 case X86::MOV16mr:
101 AccessSize = 2;
102 OpIx = 2;
103 break;
104 case X86::MOV16rm:
105 AccessSize = 2;
106 OpIx = 1;
107 break;
108 case X86::MOV32mi:
109 case X86::MOV32mr:
110 AccessSize = 4;
111 OpIx = 2;
112 break;
113 case X86::MOV32rm:
114 AccessSize = 4;
115 OpIx = 1;
116 break;
117 case X86::MOV64mi32:
118 case X86::MOV64mr:
119 AccessSize = 8;
120 OpIx = 2;
121 break;
122 case X86::MOV64rm:
123 AccessSize = 8;
124 OpIx = 1;
125 break;
126 case X86::MOVAPDmr:
127 case X86::MOVAPSmr:
128 AccessSize = 16;
129 OpIx = 2;
130 break;
131 case X86::MOVAPDrm:
132 case X86::MOVAPSrm:
133 AccessSize = 16;
134 OpIx = 1;
135 break;
136 }
137 if (OpIx >= Operands.size())
138 return;
139
140 const bool IsWrite = (OpIx != 1);
141 InstrumentMemOperand(Operands[OpIx], AccessSize, IsWrite, Ctx, Out);
142 }
143
144 class X86AddressSanitizer32 : public X86AddressSanitizer {
145 public:
146 X86AddressSanitizer32(MCSubtargetInfo &sti) : X86AddressSanitizer(sti) {}
147 virtual ~X86AddressSanitizer32() {}
148
149 virtual void InstrumentMemOperandImpl(X86Operand *Op, unsigned AccessSize,
150 bool IsWrite, MCContext &Ctx,
151 MCStreamer &Out) override;
152 };
153
154 void X86AddressSanitizer32::InstrumentMemOperandImpl(
155 X86Operand *Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
156 MCStreamer &Out) {
157 // FIXME: emit .cfi directives for correct stack unwinding.
158 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(X86::EAX));
159 {
160 MCInst Inst;
161 Inst.setOpcode(X86::LEA32r);
162 Inst.addOperand(MCOperand::CreateReg(X86::EAX));
163 Op->addMemOperands(Inst, 5);
164 EmitInstruction(Out, Inst);
165 }
166 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(X86::EAX));
167 {
168 const std::string Func = FuncName(AccessSize, IsWrite);
169 const MCSymbol *FuncSym = Ctx.GetOrCreateSymbol(StringRef(Func));
170 const MCSymbolRefExpr *FuncExpr =
171 MCSymbolRefExpr::Create(FuncSym, MCSymbolRefExpr::VK_PLT, Ctx);
172 EmitInstruction(Out, MCInstBuilder(X86::CALLpcrel32).addExpr(FuncExpr));
173 }
174 EmitInstruction(Out, MCInstBuilder(X86::ADD32ri).addReg(X86::ESP)
175 .addReg(X86::ESP).addImm(4));
176 EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(X86::EAX));
177 }
178
179 class X86AddressSanitizer64 : public X86AddressSanitizer {
180 public:
181 X86AddressSanitizer64(MCSubtargetInfo &sti) : X86AddressSanitizer(sti) {}
182 virtual ~X86AddressSanitizer64() {}
183
184 virtual void InstrumentMemOperandImpl(X86Operand *Op, unsigned AccessSize,
185 bool IsWrite, MCContext &Ctx,
186 MCStreamer &Out) override;
187 };
188
189 void X86AddressSanitizer64::InstrumentMemOperandImpl(
190 X86Operand *Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
191 MCStreamer &Out) {
192 // FIXME: emit .cfi directives for correct stack unwinding.
193 // Set %rsp below current red zone (128 bytes wide)
194 EmitInstruction(Out, MCInstBuilder(X86::SUB64ri32).addReg(X86::RSP)
195 .addReg(X86::RSP).addImm(128));
196 EmitInstruction(Out, MCInstBuilder(X86::PUSH64r).addReg(X86::RDI));
197 {
198 MCInst Inst;
199 Inst.setOpcode(X86::LEA64r);
200 Inst.addOperand(MCOperand::CreateReg(X86::RDI));
201 Op->addMemOperands(Inst, 5);
202 EmitInstruction(Out, Inst);
203 }
204 {
205 const std::string Func = FuncName(AccessSize, IsWrite);
206 const MCSymbol *FuncSym = Ctx.GetOrCreateSymbol(StringRef(Func));
207 const MCSymbolRefExpr *FuncExpr =
208 MCSymbolRefExpr::Create(FuncSym, MCSymbolRefExpr::VK_PLT, Ctx);
209 EmitInstruction(Out, MCInstBuilder(X86::CALL64pcrel32).addExpr(FuncExpr));
210 }
211 EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(X86::RDI));
212 EmitInstruction(Out, MCInstBuilder(X86::ADD64ri32).addReg(X86::RSP)
213 .addReg(X86::RSP).addImm(128));
214 }
215
216 } // End anonymous namespace
217
218 X86AsmInstrumentation::X86AsmInstrumentation() {}
219 X86AsmInstrumentation::~X86AsmInstrumentation() {}
220
221 void X86AsmInstrumentation::InstrumentInstruction(
222 const MCInst &Inst, SmallVectorImpl &Operands,
223 MCContext &Ctx, MCStreamer &Out) {}
224
225 X86AsmInstrumentation *CreateX86AsmInstrumentation(MCSubtargetInfo &STI) {
226 if (ClAsanInstrumentInlineAssembly) {
227 if ((STI.getFeatureBits() & X86::Mode32Bit) != 0)
228 return new X86AddressSanitizer32(STI);
229 if ((STI.getFeatureBits() & X86::Mode64Bit) != 0)
230 return new X86AddressSanitizer64(STI);
231 }
232 return new X86AsmInstrumentation();
233 }
234
235 } // End llvm namespace
0 //===- X86AsmInstrumentation.h - Instrument X86 inline assembly *- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #ifndef X86_ASM_INSTRUMENTATION_H
10 #define X86_ASM_INSTRUMENTATION_H
11
12 #include "llvm/ADT/SmallVector.h"
13
14 namespace llvm {
15
16 class MCContext;
17 class MCInst;
18 class MCParsedAsmOperand;
19 class MCStreamer;
20 class MCSubtargetInfo;
21
22 class X86AsmInstrumentation;
23
24 X86AsmInstrumentation *CreateX86AsmInstrumentation(MCSubtargetInfo &STI);
25
26 class X86AsmInstrumentation {
27 public:
28 virtual ~X86AsmInstrumentation();
29
30 // Instruments Inst. Should be called just before the original
31 // instruction is sent to Out.
32 virtual void InstrumentInstruction(
33 const MCInst &Inst, SmallVectorImpl &Operands,
34 MCContext &Ctx, MCStreamer &Out);
35
36 protected:
37 friend X86AsmInstrumentation *
38 CreateX86AsmInstrumentation(MCSubtargetInfo &STI);
39
40 X86AsmInstrumentation();
41 };
42
43 } // End llvm namespace
44
45 #endif // X86_ASM_INSTRUMENTATION_H
77 //===----------------------------------------------------------------------===//
88
99 #include "MCTargetDesc/X86BaseInfo.h"
10 #include "X86AsmInstrumentation.h"
1011 #include "X86AsmParserCommon.h"
1112 #include "X86Operand.h"
1213 #include "llvm/ADT/APFloat.h"
2930 #include "llvm/Support/SourceMgr.h"
3031 #include "llvm/Support/TargetRegistry.h"
3132 #include "llvm/Support/raw_ostream.h"
33 #include
3234
3335 using namespace llvm;
3436
5355 MCSubtargetInfo &STI;
5456 MCAsmParser &Parser;
5557 ParseInstructionInfo *InstInfo;
58 std::unique_ptr Instrumentation;
5659 private:
5760 SMLoc consumeToken() {
5861 SMLoc Result = Parser.getTok().getLoc();
649652 bool processInstruction(MCInst &Inst,
650653 const SmallVectorImpl &Ops);
651654
655 /// Wrapper around MCStreamer::EmitInstruction(). Possibly adds
656 /// instrumentation around Inst.
657 void EmitInstruction(MCInst &Inst,
658 SmallVectorImpl &Operands,
659 MCStreamer &Out);
660
652661 bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
653662 SmallVectorImpl &Operands,
654663 MCStreamer &Out, unsigned &ErrorInfo,
705714
706715 // Initialize the set of available features.
707716 setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
717 Instrumentation.reset(CreateX86AsmInstrumentation(STI));
708718 }
709719 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
710720
22382248 }
22392249
22402250 static const char *getSubtargetFeatureName(unsigned Val);
2251
2252 void X86AsmParser::EmitInstruction(
2253 MCInst &Inst, SmallVectorImpl &Operands,
2254 MCStreamer &Out) {
2255 Instrumentation->InstrumentInstruction(Inst, Operands, getContext(), Out);
2256 Out.EmitInstruction(Inst, STI);
2257 }
2258
22412259 bool X86AsmParser::
22422260 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
22432261 SmallVectorImpl &Operands,
22602278 Inst.setOpcode(X86::WAIT);
22612279 Inst.setLoc(IDLoc);
22622280 if (!MatchingInlineAsm)
2263 Out.EmitInstruction(Inst, STI);
2281 EmitInstruction(Inst, Operands, Out);
22642282
22652283 const char *Repl =
22662284 StringSwitch(Op->getToken())
22962314
22972315 Inst.setLoc(IDLoc);
22982316 if (!MatchingInlineAsm)
2299 Out.EmitInstruction(Inst, STI);
2317 EmitInstruction(Inst, Operands, Out);
23002318 Opcode = Inst.getOpcode();
23012319 return false;
23022320 case Match_MissingFeature: {
23832401 if (NumSuccessfulMatches == 1) {
23842402 Inst.setLoc(IDLoc);
23852403 if (!MatchingInlineAsm)
2386 Out.EmitInstruction(Inst, STI);
2404 EmitInstruction(Inst, Operands, Out);
23872405 Opcode = Inst.getOpcode();
23882406 return false;
23892407 }
0 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+sse2 -asan-instrument-inline-assembly | FileCheck %s
1
2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
3 target triple = "x86_64-unknown-linux-gnu"
4
5 ; CHECK-LABEL: mov1b
6 ; CHECK: subq $128, %rsp
7 ; CHECK-NEXT: pushq %rdi
8 ; CHECK-NEXT: leaq {{.*}}, %rdi
9 ; CHECK-NEXT: callq __sanitizer_sanitize_load1@PLT
10 ; CHECK-NEXT: popq %rdi
11 ; CHECK-NEXT: addq $128, %rsp
12
13 ; CHECK: subq $128, %rsp
14 ; CHECK-NEXT: pushq %rdi
15 ; CHECK-NEXT: leaq {{.*}}, %rdi
16 ; CHECK-NEXT: callq __sanitizer_sanitize_store1@PLT
17 ; CHECK-NEXT: popq %rdi
18 ; CHECK-NEXT: addq $128, %rsp
19
20 ; CHECK: movb {{.*}}, {{.*}}
21 define void @mov1b(i8* %dst, i8* %src) #0 {
22 entry:
23 tail call void asm sideeffect "movb ($1), %al \0A\09movb %al, ($0) \0A\09", "r,r,~{memory},~{rax},~{dirflag},~{fpsr},~{flags}"(i8* %dst, i8* %src) #1, !srcloc !0
24 ret void
25 }
26
27 ; CHECK-LABEL: mov2b
28 ; CHECK: subq $128, %rsp
29 ; CHECK-NEXT: pushq %rdi
30 ; CHECK-NEXT: leaq {{.*}}, %rdi
31 ; CHECK-NEXT: callq __sanitizer_sanitize_load2@PLT
32 ; CHECK-NEXT: popq %rdi
33 ; CHECK-NEXT: addq $128, %rsp
34
35 ; CHECK: subq $128, %rsp
36 ; CHECK-NEXT: pushq %rdi
37 ; CHECK-NEXT: leaq {{.*}}, %rdi
38 ; CHECK-NEXT: callq __sanitizer_sanitize_store2@PLT
39 ; CHECK-NEXT: popq %rdi
40 ; CHECK-NEXT: addq $128, %rsp
41
42 ; CHECK: movw {{.*}}, {{.*}}
43 define void @mov2b(i16* %dst, i16* %src) #0 {
44 entry:
45 tail call void asm sideeffect "movw ($1), %ax \0A\09movw %ax, ($0) \0A\09", "r,r,~{memory},~{rax},~{dirflag},~{fpsr},~{flags}"(i16* %dst, i16* %src) #1, !srcloc !1
46 ret void
47 }
48
49 ; CHECK-LABEL: mov4b
50 ; CHECK: subq $128, %rsp
51 ; CHECK-NEXT: pushq %rdi
52 ; CHECK-NEXT: leaq {{.*}}, %rdi
53 ; CHECK-NEXT: callq __sanitizer_sanitize_load4@PLT
54 ; CHECK-NEXT: popq %rdi
55 ; CHECK-NEXT: addq $128, %rsp
56
57 ; CHECK: subq $128, %rsp
58 ; CHECK-NEXT: pushq %rdi
59 ; CHECK-NEXT: leaq {{.*}}, %rdi
60 ; CHECK-NEXT: callq __sanitizer_sanitize_store4@PLT
61 ; CHECK-NEXT: popq %rdi
62 ; CHECK-NEXT: addq $128, %rsp
63
64 ; CHECK: movl {{.*}}, {{.*}}
65 define void @mov4b(i32* %dst, i32* %src) #0 {
66 entry:
67 tail call void asm sideeffect "movl ($1), %eax \0A\09movl %eax, ($0) \0A\09", "r,r,~{memory},~{rax},~{dirflag},~{fpsr},~{flags}"(i32* %dst, i32* %src) #1, !srcloc !2
68 ret void
69 }
70
71 ; CHECK-LABEL: mov8b
72 ; CHECK: subq $128, %rsp
73 ; CHECK-NEXT: pushq %rdi
74 ; CHECK-NEXT: leaq {{.*}}, %rdi
75 ; CHECK-NEXT: callq __sanitizer_sanitize_load8@PLT
76 ; CHECK-NEXT: popq %rdi
77 ; CHECK-NEXT: addq $128, %rsp
78
79 ; CHECK: subq $128, %rsp
80 ; CHECK-NEXT: pushq %rdi
81 ; CHECK-NEXT: leaq {{.*}}, %rdi
82 ; CHECK-NEXT: callq __sanitizer_sanitize_store8@PLT
83 ; CHECK-NEXT: popq %rdi
84 ; CHECK-NEXT: addq $128, %rsp
85
86 ; CHECK: movq {{.*}}, {{.*}}
87 define void @mov8b(i64* %dst, i64* %src) #0 {
88 entry:
89 tail call void asm sideeffect "movq ($1), %rax \0A\09movq %rax, ($0) \0A\09", "r,r,~{memory},~{rax},~{dirflag},~{fpsr},~{flags}"(i64* %dst, i64* %src) #1, !srcloc !3
90 ret void
91 }
92
93 ; CHECK-LABEL: mov16b
94 ; CHECK: subq $128, %rsp
95 ; CHECK-NEXT: pushq %rdi
96 ; CHECK-NEXT: leaq {{.*}}, %rdi
97 ; CHECK-NEXT: callq __sanitizer_sanitize_load16@PLT
98 ; CHECK-NEXT: popq %rdi
99 ; CHECK-NEXT: addq $128, %rsp
100
101 ; CHECK: subq $128, %rsp
102 ; CHECK-NEXT: pushq %rdi
103 ; CHECK-NEXT: leaq {{.*}}, %rdi
104 ; CHECK-NEXT: callq __sanitizer_sanitize_store16@PLT
105 ; CHECK-NEXT: popq %rdi
106 ; CHECK-NEXT: addq $128, %rsp
107
108 ; CHECK: movaps {{.*}}, {{.*}}
109 define void @mov16b(<2 x i64>* %dst, <2 x i64>* %src) #0 {
110 entry:
111 tail call void asm sideeffect "movaps ($1), %xmm0 \0A\09movaps %xmm0, ($0) \0A\09", "r,r,~{memory},~{xmm0},~{dirflag},~{fpsr},~{flags}"(<2 x i64>* %dst, <2 x i64>* %src) #1, !srcloc !4
112 ret void
113 }
114
115 attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
116 attributes #1 = { nounwind }
117
118 !0 = metadata !{i32 98, i32 122, i32 160}
119 !1 = metadata !{i32 305, i32 329, i32 367}
120 !2 = metadata !{i32 512, i32 537, i32 576}
121 !3 = metadata !{i32 721, i32 746, i32 785}
122 !4 = metadata !{i32 929, i32 957, i32 999}
0 # RUN: llvm-mc %s -triple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+sse2 -asan-instrument-inline-assembly | FileCheck %s
1
2 .text
3 .globl mov1b
4 .align 16, 0x90
5 .type mov1b,@function
6 # CHECK-LABEL: mov1b:
7 #
8 # CHECK: subq $128, %rsp
9 # CHECK-NEXT: pushq %rdi
10 # CHECK-NEXT: leaq (%rsi), %rdi
11 # CHECK-NEXT: callq __sanitizer_sanitize_load1@PLT
12 # CHECK-NEXT: popq %rdi
13 # CHECK-NEXT: addq $128, %rsp
14 #
15 # CHECK-NEXT: movb (%rsi), %al
16 #
17 # CHECK-NEXT: subq $128, %rsp
18 # CHECK-NEXT: pushq %rdi
19 # CHECK-NEXT: leaq (%rdi), %rdi
20 # CHECK-NEXT: callq __sanitizer_sanitize_store1@PLT
21 # CHECK-NEXT: popq %rdi
22 # CHECK-NEXT: addq $128, %rsp
23 #
24 # CHECK-NEXT: movb %al, (%rdi)
25 mov1b: # @mov1b
26 .cfi_startproc
27 # BB#0:
28 #APP
29 movb (%rsi), %al
30 movb %al, (%rdi)
31
32 #NO_APP
33 retq
34 .Ltmp0:
35 .size mov1b, .Ltmp0-mov1b
36 .cfi_endproc
37
38 .globl mov16b
39 .align 16, 0x90
40 .type mov16b,@function
41 # CHECK-LABEL: mov16b:
42 #
43 # CHECK: subq $128, %rsp
44 # CHECK-NEXT: pushq %rdi
45 # CHECK-NEXT: leaq (%rsi), %rdi
46 # CHECK-NEXT: callq __sanitizer_sanitize_load16@PLT
47 # CHECK-NEXT: popq %rdi
48 # CHECK-NEXT: addq $128, %rsp
49 #
50 # CHECK-NEXT: movaps (%rsi), %xmm0
51 #
52 # CHECK-NEXT: subq $128, %rsp
53 # CHECK-NEXT: pushq %rdi
54 # CHECK-NEXT: leaq (%rdi), %rdi
55 # CHECK-NEXT: callq __sanitizer_sanitize_store16@PLT
56 # CHECK-NEXT: popq %rdi
57 # CHECK-NEXT: addq $128, %rsp
58 #
59 # CHECK-NEXT: movaps %xmm0, (%rdi)
60 mov16b: # @mov16b
61 .cfi_startproc
62 # BB#0:
63 #APP
64 movaps (%rsi), %xmm0
65 movaps %xmm0, (%rdi)
66
67 #NO_APP
68 retq
69 .Ltmp1:
70 .size mov16b, .Ltmp1-mov16b
71 .cfi_endproc
72
73
74 .ident "clang version 3.5 "
75 .section ".note.GNU-stack","",@progbits
0 # RUN: llvm-mc %s -triple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+sse2 | FileCheck %s
1
2 .text
3 .globl mov1b
4 .align 16, 0x90
5 .type mov1b,@function
6 # CHECK-LABEL: mov1b
7 # CHECK-NOT: callq __sanitizer_sanitize_load1@PLT
8 # CHECK-NOT: callq __sanitizer_sanitize_store1@PLT
9 mov1b: # @mov1b
10 .cfi_startproc
11 # BB#0:
12 #APP
13 movb (%rsi), %al
14 movb %al, (%rdi)
15
16 #NO_APP
17 retq
18 .Ltmp0:
19 .size mov1b, .Ltmp0-mov1b
20 .cfi_endproc
21
22 .globl mov16b
23 .align 16, 0x90
24 .type mov16b,@function
25 # CHECK-LABEL: mov16b
26 # CHECK-NOT: callq __sanitizer_sanitize_load16@PLT
27 # CHECK-NOT: callq __sanitizer_sanitize_store16@PLT
28 mov16b: # @mov16b
29 .cfi_startproc
30 # BB#0:
31 #APP
32 movaps (%rsi), %xmm0
33 movaps %xmm0, (%rdi)
34
35 #NO_APP
36 retq
37 .Ltmp1:
38 .size mov16b, .Ltmp1-mov16b
39 .cfi_endproc
40
41
42 .ident "clang version 3.5 "
43 .section ".note.GNU-stack","",@progbits