llvm.org GIT mirror llvm / bf5a2c6
After reducing the size of an operation in the DAG we zero-extend the reduced bitwidth op back to the original size. If we reduce ANDs then this can cause an endless loop. This patch changes the ZEXT to ANY_EXTEND if the demanded bits are equal or smaller than the size of the reduced operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170505 91177308-0d34-0410-b5e6-96231b3b80d8 Nadav Rotem 7 years ago
2 changed file(s) with 26 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
11601160 // Search for the smallest integer type with free casts to and from
11611161 // Op's type. For expedience, just check power-of-2 integer types.
11621162 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
1163 unsigned SmallVTBits = BitWidth - Demanded.countLeadingZeros();
1163 unsigned DemandedSize = BitWidth - Demanded.countLeadingZeros();
1164 unsigned SmallVTBits = DemandedSize;
11641165 if (!isPowerOf2_32(SmallVTBits))
11651166 SmallVTBits = NextPowerOf2(SmallVTBits);
11661167 for (; SmallVTBits < BitWidth; SmallVTBits = NextPowerOf2(SmallVTBits)) {
11731174 Op.getNode()->getOperand(0)),
11741175 DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
11751176 Op.getNode()->getOperand(1)));
1176 SDValue Z = DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), X);
1177 bool NeedZext = DemandedSize > SmallVTBits;
1178 SDValue Z = DAG.getNode(NeedZext ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND,
1179 dl, Op.getValueType(), X);
11771180 return CombineTo(Op, Z);
11781181 }
11791182 }
0 ; RUN: llc < %s
1
2 define void @main() {
3 if.end:
4 br label %block.i.i
5
6 block.i.i:
7 %tmpbb = load i8* undef
8 %tmp54 = zext i8 %tmpbb to i64
9 %tmp59 = and i64 %tmp54, 8
10 %tmp60 = add i64 %tmp59, 3691045929300498764
11 %tmp62 = sub i64 %tmp60, 3456506383779105993
12 %tmp63 = xor i64 1050774804270620004, %tmp62
13 %tmp65 = xor i64 %tmp62, 234539545521392771
14 %tmp67 = or i64 %tmp65, %tmp63
15 %tmp71 = xor i64 %tmp67, 6781485823212740913
16 %tmp72 = trunc i64 %tmp71 to i32
17 %tmp74 = lshr i32 2, %tmp72
18 store i32 %tmp74, i32* undef
19 br label %block.i.i
20 }