llvm.org GIT mirror llvm / bf3b1ac
Fix assert in X86 backend. When running combine on an extract_vector_elt, it wants to look through a bitcast to check if the argument to the bitcast was itself an extract_vector_elt with particular operands. However, it called getOperand() on the argument to the bitcast *before* checking that the opcode was EXTRACT_VECTOR_ELT, assert-failing if there were zero operands for the actual opcode. Fix, and add trivial test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249891 91177308-0d34-0410-b5e6-96231b3b80d8 James Y Knight 4 years ago
2 changed file(s) with 14 addition(s) and 8 deletion(s). Raw diff Collapse all Expand all
2291222912 InputVector.getNode()->getOperand(0));
2291322913
2291422914 // The mmx is indirect: (i64 extract_elt (v1i64 bitcast (x86mmx ...))).
22915 SDValue MMXSrcOp = MMXSrc.getOperand(0);
2291622915 if (MMXSrc.getOpcode() == ISD::EXTRACT_VECTOR_ELT && MMXSrc.hasOneUse() &&
22917 MMXSrc.getValueType() == MVT::i64 && MMXSrcOp.hasOneUse() &&
22918 MMXSrcOp.getOpcode() == ISD::BITCAST &&
22919 MMXSrcOp.getValueType() == MVT::v1i64 &&
22920 MMXSrcOp.getOperand(0).getValueType() == MVT::x86mmx)
22921 return DAG.getNode(X86ISD::MMX_MOVD2W, SDLoc(InputVector),
22922 N->getValueType(0),
22923 MMXSrcOp.getOperand(0));
22916 MMXSrc.getValueType() == MVT::i64) {
22917 SDValue MMXSrcOp = MMXSrc.getOperand(0);
22918 if (MMXSrcOp.hasOneUse() && MMXSrcOp.getOpcode() == ISD::BITCAST &&
22919 MMXSrcOp.getValueType() == MVT::v1i64 &&
22920 MMXSrcOp.getOperand(0).getValueType() == MVT::x86mmx)
22921 return DAG.getNode(X86ISD::MMX_MOVD2W, SDLoc(InputVector),
22922 N->getValueType(0), MMXSrcOp.getOperand(0));
22923 }
2292422924 }
2292522925
2292622926 EVT VT = N->getValueType(0);
155155 %w = getelementptr [3 x {i32, i32}], <2 x [3 x {i32, i32}]*> %a, <2 x i32> , <2 x i32> , <2 x i32>
156156 ret <2 x i32*> %w
157157 }
158
159 define i32 @extractelt_constant_bitcast() {
160 %1 = bitcast i64 4 to <2 x i32>
161 %2 = extractelement <2 x i32> %1, i32 0
162 ret i32 %2
163 }