llvm.org GIT mirror llvm / be4f88a
Improve the LiveInterval class to keep track of which machine instruction defines each value# tracked by the interval. This will be used to improve coallescing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29830 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 13 years ago
3 changed file(s) with 63 addition(s) and 19 deletion(s). Raw diff Collapse all Expand all
7878 Ranges ranges; // the ranges in which this register is live
7979 private:
8080 unsigned NumValues; // the number of distinct values in this interval.
81
82 /// InstDefiningValue - This tracks the def index of the instruction that
83 /// defines a particular value number in the interval. This may be ~0,
84 /// which is treated as unknown.
85 SmallVector InstDefiningValue;
8186 public:
8287
8388 LiveInterval(unsigned Reg, float Weight)
108113 void swap(LiveInterval& other) {
109114 std::swap(reg, other.reg);
110115 std::swap(weight, other.weight);
111 ranges.swap(other.ranges);
116 std::swap(ranges, other.ranges);
112117 std::swap(NumValues, other.NumValues);
113118 }
114119
115120 bool containsOneValue() const { return NumValues == 1; }
116121
117 unsigned getNextValue() {
122 /// getNextValue - Create a new value number and return it. MIIdx specifies
123 /// the instruction that defines the value number.
124 unsigned getNextValue(unsigned MIIdx) {
125 InstDefiningValue.push_back(MIIdx);
118126 return NumValues++;
119127 }
128
129 /// getInstForValNum - Return the machine instruction index that defines the
130 /// specified value number.
131 unsigned getInstForValNum(unsigned ValNo) const {
132 return InstDefiningValue[ValNo];
133 }
134
135 /// setInstDefiningValNum - Change the instruction defining the specified
136 /// value number to the specified instruction.
137 void setInstDefiningValNum(unsigned ValNo, unsigned MIIdx) {
138 InstDefiningValue[ValNo] = MIIdx;
139 }
140
120141
121142 bool empty() const { return ranges.empty(); }
122143
387387 I->ValId = MergedDstValIdx;
388388 else {
389389 unsigned &NV = Dst2SrcIdxMap[I->ValId];
390 if (NV == 0) NV = getNextValue();
390 if (NV == 0) NV = getNextValue(Other.getInstForValNum(I->ValId));
391391 I->ValId = NV;
392392 }
393393
421421 E = ranges.end(); I != E; ++I)
422422 OS << *I;
423423 }
424
425 // Print value number info.
426 if (NumValues) {
427 OS << " ";
428 for (unsigned i = 0; i != NumValues; ++i) {
429 if (i) OS << " ";
430 OS << i << "@";
431 if (InstDefiningValue[i] == ~0U) {
432 OS << "?";
433 } else {
434 OS << InstDefiningValue[i];
435 }
436 }
437 }
424438 }
425439
426440 void LiveInterval::dump() const {
327327 // the spill weight is now infinity as it
328328 // cannot be spilled again
329329 nI.weight = float(HUGE_VAL);
330 LiveRange LR(start, end, nI.getNextValue());
330 LiveRange LR(start, end, nI.getNextValue(~0U));
331331 DEBUG(std::cerr << " +" << LR);
332332 nI.addRange(LR);
333333 added.push_back(&nI);
350350 return added;
351351 }
352352
353 void LiveIntervals::printRegName(unsigned reg) const
354 {
353 void LiveIntervals::printRegName(unsigned reg) const {
355354 if (MRegisterInfo::isPhysicalRegister(reg))
356355 std::cerr << mri_->getName(reg);
357356 else
358357 std::cerr << "%reg" << reg;
359358 }
360359
361 void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock* mbb,
360 void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
362361 MachineBasicBlock::iterator mi,
363 LiveInterval& interval)
364 {
362 LiveInterval &interval) {
365363 DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg));
366364 LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg);
367365
373371 // Get the Idx of the defining instructions.
374372 unsigned defIndex = getDefIndex(getInstructionIndex(mi));
375373
376 unsigned ValNum = interval.getNextValue();
374 unsigned ValNum = interval.getNextValue(defIndex);
377375 assert(ValNum == 0 && "First value in interval is not 0?");
378376 ValNum = 0; // Clue in the optimizer.
379377
455453 unsigned RedefIndex = getDefIndex(getInstructionIndex(mi));
456454
457455 // Delete the initial value, which should be short and continuous,
458 // becuase the 2-addr copy must be in the same MBB as the redef.
456 // because the 2-addr copy must be in the same MBB as the redef.
459457 interval.removeRange(DefIndex, RedefIndex);
460458
461 LiveRange LR(DefIndex, RedefIndex, interval.getNextValue());
459 // Two-address vregs should always only be redefined once. This means
460 // that at this point, there should be exactly one value number in it.
461 assert(interval.containsOneValue() && "Unexpected 2-addr liveint!");
462
463 // The new value number is defined by the instruction we claimed defined
464 // value #0.
465 unsigned ValNo = interval.getNextValue(DefIndex);
466
467 // Value#1 is now defined by the 2-addr instruction.
468 interval.setInstDefiningValNum(0, RedefIndex);
469
470 // Add the new live interval which replaces the range for the input copy.
471 LiveRange LR(DefIndex, RedefIndex, ValNo);
462472 DEBUG(std::cerr << " replace range with " << LR);
463473 interval.addRange(LR);
464474
486496 interval.removeRange(Start, End);
487497 DEBUG(std::cerr << "RESULT: " << interval);
488498
489 // Replace the interval with one of a NEW value number.
490 LiveRange LR(Start, End, interval.getNextValue());
499 // Replace the interval with one of a NEW value number. Note that this
500 // value number isn't actually defined by an instruction, weird huh? :)
501 LiveRange LR(Start, End, interval.getNextValue(~0U));
491502 DEBUG(std::cerr << " replace range with " << LR);
492503 interval.addRange(LR);
493504 DEBUG(std::cerr << "RESULT: " << interval);
499510 unsigned defIndex = getDefIndex(getInstructionIndex(mi));
500511 LiveRange LR(defIndex,
501512 getInstructionIndex(&mbb->back()) + InstrSlots::NUM,
502 interval.getNextValue());
513 interval.getNextValue(defIndex));
503514 interval.addRange(LR);
504515 DEBUG(std::cerr << " +" << LR);
505516 }
512523 MachineBasicBlock::iterator mi,
513524 LiveInterval& interval,
514525 unsigned SrcReg, unsigned DestReg,
515 bool isLiveIn)
516 {
526 bool isLiveIn) {
517527 // A physical register cannot be live across basic block, so its
518528 // lifetime must end somewhere in its defining basic block.
519529 DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg));
590600 }
591601 }
592602
593
594 LiveRange LR(start, end, interval.getNextValue());
603 LiveRange LR(start, end, interval.getNextValue(start));
595604 interval.addRange(LR);
596605 DEBUG(std::cerr << " +" << LR << '\n');
597606 }