llvm.org GIT mirror llvm / be08d6e
Defer asm errors to post-statement failure Recommitting after fixing AsmParser Initialization. Allow errors to be deferred and emitted as part of clean up to simplify and shorten Assembly parser code. This will allow error messages to be emitted in helper functions and be modified by the caller which has better context. As part of this many minor cleanups to the Parser: * Unify parser cleanup on error * Add Workaround for incorrect return values in ParseDirective instances * Tighten checks on error-signifying return values for parser functions and fix in-tree TargetParsers to be more consistent with the changes. * Fix AArch64 test cases checking for spurious error messages that are now fixed. These changes should be backwards compatible with current Target Parsers so long as the error status are correctly returned in appropriate functions. Reviewers: rnk, majnemer Subscribers: aemerson, jyknight, llvm-commits Differential Revision: https://reviews.llvm.org/D24047 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281336 91177308-0d34-0410-b5e6-96231b3b80d8 Nirav Dave 3 years ago
16 changed file(s) with 537 addition(s) and 849 deletion(s). Raw diff Collapse all Expand all
143143 const char *TokStart;
144144 bool SkipSpace;
145145 bool AllowAtInIdentifier;
146 bool IsAtStartOfStatement;
146147
147148 MCAsmLexer();
148149
162163 /// the main input file has been reached.
163164 const AsmToken &Lex() {
164165 assert(!CurTok.empty());
166 // Mark if we parsing out a EndOfStatement.
167 IsAtStartOfStatement = CurTok.front().getKind() == AsmToken::EndOfStatement;
165168 CurTok.erase(CurTok.begin());
166169 // LexToken may generate multiple tokens via UnLex but will always return
167170 // the first one. Place returned value at head of CurTok vector.
173176 }
174177
175178 void UnLex(AsmToken const &Token) {
179 IsAtStartOfStatement = false;
176180 CurTok.insert(CurTok.begin(), Token);
177181 }
182
183 bool isAtStartOfStatement() { return IsAtStartOfStatement; }
178184
179185 virtual StringRef LexUntilEndOfStatement() = 0;
180186
1010 #define LLVM_MC_MCPARSER_MCASMPARSER_H
1111
1212 #include "llvm/ADT/ArrayRef.h"
13 #include "llvm/ADT/SmallString.h"
1314 #include "llvm/ADT/StringRef.h"
15 #include "llvm/ADT/Twine.h"
1416 #include "llvm/MC/MCParser/AsmLexer.h"
1517 #include "llvm/Support/DataTypes.h"
1618
6668 typedef std::pair
6769 ExtensionDirectiveHandler;
6870
71 struct MCPendingError {
72 SMLoc Loc;
73 SmallString<64> Msg;
74 SMRange Range;
75 };
76
6977 private:
7078 MCAsmParser(const MCAsmParser &) = delete;
7179 void operator=(const MCAsmParser &) = delete;
7684
7785 protected: // Can only create subclasses.
7886 MCAsmParser();
87
88 bool HadError;
89
90 SmallVector PendingErrors;
91 /// Flag tracking whether any errors have been encountered.
7992
8093 public:
8194 virtual ~MCAsmParser();
121134 const MCInstPrinter *IP, MCAsmParserSemaCallback &SI) = 0;
122135
123136 /// \brief Emit a note at the location \p L, with the message \p Msg.
124 virtual void Note(SMLoc L, const Twine &Msg,
125 ArrayRef Ranges = None) = 0;
137 virtual void Note(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
126138
127139 /// \brief Emit a warning at the location \p L, with the message \p Msg.
128140 ///
129141 /// \return The return value is true, if warnings are fatal.
130 virtual bool Warning(SMLoc L, const Twine &Msg,
131 ArrayRef Ranges = None) = 0;
132
133 /// \brief Emit an error at the location \p L, with the message \p Msg.
142 virtual bool Warning(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
143
144 /// \brief Return an error at the location \p L, with the message \p Msg. This
145 /// may be modified before being emitted.
134146 ///
135147 /// \return The return value is always true, as an idiomatic convenience to
136148 /// clients.
137 virtual bool Error(SMLoc L, const Twine &Msg,
138 ArrayRef Ranges = None) = 0;
149 bool Error(SMLoc L, const Twine &Msg, SMRange Range = None);
150
151 /// \brief Emit an error at the location \p L, with the message \p Msg.
152 ///
153 /// \return The return value is always true, as an idiomatic convenience to
154 /// clients.
155 virtual bool printError(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
156
157 bool hasPendingError() { return !PendingErrors.empty(); }
158
159 bool printPendingErrors() {
160 bool rv = !PendingErrors.empty();
161 for (auto Err : PendingErrors) {
162 printError(Err.Loc, Twine(Err.Msg), Err.Range);
163 }
164 PendingErrors.clear();
165 return rv;
166 }
139167
140168 /// \brief Get the next AsmToken in the stream, possibly handling file
141169 /// inclusion first.
145173 const AsmToken &getTok() const;
146174
147175 /// \brief Report an error at the current lexer location.
148 bool TokError(const Twine &Msg, ArrayRef Ranges = None);
176 bool TokError(const Twine &Msg, SMRange Range = None);
149177
150178 bool parseTokenLoc(SMLoc &Loc);
151179 bool parseToken(AsmToken::TokenKind T, const Twine &Msg);
1414 #ifndef LLVM_SUPPORT_SMLOC_H
1515 #define LLVM_SUPPORT_SMLOC_H
1616
17 #include "llvm/ADT/None.h"
1718 #include
1819
1920 namespace llvm {
4950 SMLoc Start, End;
5051
5152 SMRange() {}
53 SMRange(NoneType) : Start(), End() {}
5254 SMRange(SMLoc St, SMLoc En) : Start(St), End(En) {
5355 assert(Start.isValid() == End.isValid() &&
5456 "Start and end should either both be valid or both be invalid!");
177177 /// \brief Keeps track of how many .macro's have been instantiated.
178178 unsigned NumOfMacroInstantiations;
179179
180 /// Flag tracking whether any errors have been encountered.
181 unsigned HadError : 1;
182
183180 /// The values from the last parsed cpp hash file line comment if any.
184181 struct CppHashInfoTy {
185182 StringRef Filename;
246243 AssemblerDialect = i;
247244 }
248245
249 void Note(SMLoc L, const Twine &Msg,
250 ArrayRef Ranges = None) override;
251 bool Warning(SMLoc L, const Twine &Msg,
252 ArrayRef Ranges = None) override;
253 bool Error(SMLoc L, const Twine &Msg,
254 ArrayRef Ranges = None) override;
246 void Note(SMLoc L, const Twine &Msg, SMRange Range = None) override;
247 bool Warning(SMLoc L, const Twine &Msg, SMRange Range = None) override;
248 bool printError(SMLoc L, const Twine &Msg, SMRange Range = None) override;
255249
256250 const AsmToken &Lex() override;
257251
336330
337331 void printMacroInstantiations();
338332 void printMessage(SMLoc Loc, SourceMgr::DiagKind Kind, const Twine &Msg,
339 ArrayRef Ranges = None) const {
333 SMRange Range = None) const {
334 ArrayRef Ranges(Range);
340335 SrcMgr.PrintMessage(Loc, Kind, Msg, Ranges);
341336 }
342337 static void DiagHandler(const SMDiagnostic &Diag, void *Context);
564559 const MCAsmInfo &MAI)
565560 : Lexer(MAI), Ctx(Ctx), Out(Out), MAI(MAI), SrcMgr(SM),
566561 PlatformParser(nullptr), CurBuffer(SM.getMainFileID()),
567 MacrosEnabledFlag(true), HadError(false), CppHashInfo(),
568 AssemblerDialect(~0U), IsDarwin(false), ParsingInlineAsm(false) {
562 MacrosEnabledFlag(true), CppHashInfo(), AssemblerDialect(~0U),
563 IsDarwin(false), ParsingInlineAsm(false) {
564 HadError = false;
569565 // Save the old handler.
570566 SavedDiagHandler = SrcMgr.getDiagHandler();
571567 SavedDiagContext = SrcMgr.getDiagContext();
608604 "while in macro instantiation");
609605 }
610606
611 void AsmParser::Note(SMLoc L, const Twine &Msg, ArrayRef Ranges) {
612 printMessage(L, SourceMgr::DK_Note, Msg, Ranges);
607 void AsmParser::Note(SMLoc L, const Twine &Msg, SMRange Range) {
608 printPendingErrors();
609 printMessage(L, SourceMgr::DK_Note, Msg, Range);
613610 printMacroInstantiations();
614611 }
615612
616 bool AsmParser::Warning(SMLoc L, const Twine &Msg, ArrayRef Ranges) {
613 bool AsmParser::Warning(SMLoc L, const Twine &Msg, SMRange Range) {
617614 if(getTargetParser().getTargetOptions().MCNoWarn)
618615 return false;
619616 if (getTargetParser().getTargetOptions().MCFatalWarnings)
620 return Error(L, Msg, Ranges);
621 printMessage(L, SourceMgr::DK_Warning, Msg, Ranges);
617 return Error(L, Msg, Range);
618 printMessage(L, SourceMgr::DK_Warning, Msg, Range);
622619 printMacroInstantiations();
623620 return false;
624621 }
625622
626 bool AsmParser::Error(SMLoc L, const Twine &Msg, ArrayRef Ranges) {
623 bool AsmParser::printError(SMLoc L, const Twine &Msg, SMRange Range) {
627624 HadError = true;
628 printMessage(L, SourceMgr::DK_Error, Msg, Ranges);
625 printMessage(L, SourceMgr::DK_Error, Msg, Range);
629626 printMacroInstantiations();
630627 return true;
631628 }
730727 if (!parseStatement(Info, nullptr))
731728 continue;
732729
733 // If we've failed, but on a Error Token, but did not consume it in
734 // favor of a better message, emit it now.
735 if (Lexer.getTok().is(AsmToken::Error)) {
730 // If we have a Lexer Error we are on an Error Token. Load in Lexer Error
731 // for printing ErrMsg via Lex() only if no (presumably better) parser error
732 // exists.
733 if (!hasPendingError() && Lexer.getTok().is(AsmToken::Error)) {
736734 Lex();
737735 }
738736
739 // We had an error, validate that one was emitted and recover by skipping to
740 // the next line.
741 assert(HadError && "Parse statement returned an error, but none emitted!");
742 eatToEndOfStatement();
743 }
737 // parseStatement returned true so may need to emit an error.
738 printPendingErrors();
739
740 // Skipping to the next line if needed.
741 if (!getLexer().isAtStartOfStatement())
742 eatToEndOfStatement();
743 }
744
745 // All errors should have been emitted.
746 assert(!hasPendingError() && "unexpected error from parseStatement");
744747
745748 getTargetParser().flushPendingInstructions(getStreamer());
746749
747750 if (TheCondState.TheCond != StartingCondState.TheCond ||
748751 TheCondState.Ignore != StartingCondState.Ignore)
749 return TokError("unmatched .ifs or .elses");
750
752 printError(getTok().getLoc(), "unmatched .ifs or .elses");
751753 // Check to see there are no empty DwarfFile slots.
752754 const auto &LineTables = getContext().getMCDwarfLineTables();
753755 if (!LineTables.empty()) {
754756 unsigned Index = 0;
755757 for (const auto &File : LineTables.begin()->second.getMCDwarfFiles()) {
756758 if (File.Name.empty() && Index != 0)
757 TokError("unassigned file number: " + Twine(Index) +
758 " for .file directives");
759 printError(getTok().getLoc(), "unassigned file number: " +
760 Twine(Index) +
761 " for .file directives");
759762 ++Index;
760763 }
761764 }
775778 // FIXME: We would really like to refer back to where the symbol was
776779 // first referenced for a source location. We need to add something
777780 // to track that. Currently, we just point to the end of the file.
778 HadError |=
779 Error(getTok().getLoc(), "assembler local symbol '" +
780 Sym->getName() + "' not defined");
781 printError(getTok().getLoc(), "assembler local symbol '" +
782 Sym->getName() + "' not defined");
781783 }
782784 }
783785
788790 // Reset the state of any "# line file" directives we've seen to the
789791 // context as it was at the diagnostic site.
790792 CppHashInfo = std::get<1>(LocSym);
791 HadError |= Error(std::get<0>(LocSym), "directional label undefined");
793 printError(std::get<0>(LocSym), "directional label undefined");
792794 }
793795 }
794796 }
803805
804806 void AsmParser::checkForValidSection() {
805807 if (!ParsingInlineAsm && !getStreamer().getCurrentSection().first) {
806 TokError("expected section directive before assembly directive");
808 printError(getTok().getLoc(),
809 "expected section directive before assembly directive");
807810 Out.InitSections(false);
808811 }
809812 }
14341437 /// ::= Label* Identifier OperandList* EndOfStatement
14351438 bool AsmParser::parseStatement(ParseStatementInfo &Info,
14361439 MCAsmParserSemaCallback *SI) {
1440 assert(!hasPendingError() && "parseStatement started with pending error");
14371441 // Eat initial spaces and comments
14381442 while (Lexer.is(AsmToken::Space))
14391443 Lex();
14661470 if (Lexer.is(AsmToken::Integer)) {
14671471 LocalLabelVal = getTok().getIntVal();
14681472 if (LocalLabelVal < 0) {
1469 if (!TheCondState.Ignore)
1470 return TokError("unexpected token at start of statement");
1473 if (!TheCondState.Ignore) {
1474 Lex(); // always eat a token
1475 return Error(IDLoc, "unexpected token at start of statement");
1476 }
14711477 IDVal = "";
14721478 } else {
14731479 IDVal = getTok().getString();
14741480 Lex(); // Consume the integer token to be used as an identifier token.
14751481 if (Lexer.getKind() != AsmToken::Colon) {
1476 if (!TheCondState.Ignore)
1477 return TokError("unexpected token at start of statement");
1482 if (!TheCondState.Ignore) {
1483 Lex(); // always eat a token
1484 return Error(IDLoc, "unexpected token at start of statement");
1485 }
14781486 }
14791487 }
14801488 } else if (Lexer.is(AsmToken::Dot)) {
14911499 Lex();
14921500 IDVal = "}";
14931501 } else if (parseIdentifier(IDVal)) {
1494 if (!TheCondState.Ignore)
1495 return TokError("unexpected token at start of statement");
1502 if (!TheCondState.Ignore) {
1503 Lex(); // always eat a token
1504 return Error(IDLoc, "unexpected token at start of statement");
1505 }
14961506 IDVal = "";
14971507 }
14981508
16541664
16551665 getTargetParser().flushPendingInstructions(getStreamer());
16561666
1657 // First query the target-specific parser. It will return 'true' if it
1658 // isn't interested in this directive.
1659 if (!getTargetParser().ParseDirective(ID))
1667 SMLoc StartTokLoc = getTok().getLoc();
1668 bool TPDirectiveReturn = getTargetParser().ParseDirective(ID);
1669
1670 if (hasPendingError())
1671 return true;
1672 // Currently the return value should be true if we are
1673 // uninterested but as this is at odds with the standard parsing
1674 // convention (return true = error) we have instances of a parsed
1675 // directive that fails returning true as an error. Catch these
1676 // cases as best as possible errors here.
1677 if (TPDirectiveReturn && StartTokLoc != getTok().getLoc())
1678 return true;
1679 // Return if we did some parsing or believe we succeeded.
1680 if (!TPDirectiveReturn || StartTokLoc != getTok().getLoc())
16601681 return false;
16611682
16621683 // Next, check the extension directive map to see if any extension has
19111932 // Canonicalize the opcode to lower case.
19121933 std::string OpcodeStr = IDVal.lower();
19131934 ParseInstructionInfo IInfo(Info.AsmRewrites);
1914 bool HadError = getTargetParser().ParseInstruction(IInfo, OpcodeStr, ID,
1915 Info.ParsedOperands);
1916 Info.ParseError = HadError;
1935 bool ParseHadError = getTargetParser().ParseInstruction(IInfo, OpcodeStr, ID,
1936 Info.ParsedOperands);
1937 Info.ParseError = ParseHadError;
19171938
19181939 // Dump the parsed representation, if requested.
19191940 if (getShowParsedOperands()) {
19301951 printMessage(IDLoc, SourceMgr::DK_Note, OS.str());
19311952 }
19321953
1954 // Fail even if ParseInstruction erroneously returns false.
1955 if (hasPendingError() || ParseHadError)
1956 return true;
1957
19331958 // If we are generating dwarf for the current section then generate a .loc
19341959 // directive for the instruction.
1935 if (!HadError && getContext().getGenDwarfForAssembly() &&
1960 if (!ParseHadError && getContext().getGenDwarfForAssembly() &&
19361961 getContext().getGenDwarfSectionSyms().count(
19371962 getStreamer().getCurrentSection().first)) {
19381963 unsigned Line;
19741999 }
19752000
19762001 // If parsing succeeded, match the instruction.
1977 if (!HadError) {
2002 if (!ParseHadError) {
19782003 uint64_t ErrorInfo;
1979 getTargetParser().MatchAndEmitInstruction(IDLoc, Info.Opcode,
1980 Info.ParsedOperands, Out,
1981 ErrorInfo, ParsingInlineAsm);
1982 }
1983
1984 // Don't skip the rest of the line, the instruction parser is responsible for
1985 // that.
2004 if (getTargetParser().MatchAndEmitInstruction(IDLoc, Info.Opcode,
2005 Info.ParsedOperands, Out,
2006 ErrorInfo, ParsingInlineAsm))
2007 return true;
2008 }
19862009 return false;
19872010 }
19882011
20182041 "Lexing Cpp line comment: Expected String");
20192042 StringRef Filename = getTok().getString();
20202043 Lex();
2044
20212045 // Get rid of the enclosing quotes.
20222046 Filename = Filename.substr(1, Filename.size() - 2);
20232047
23522376 MCAsmMacroParameter FA;
23532377
23542378 if (Lexer.is(AsmToken::Identifier) && Lexer.peekTok().is(AsmToken::Equal)) {
2355 if (parseIdentifier(FA.Name)) {
2356 Error(IDLoc, "invalid argument identifier for formal argument");
2357 eatToEndOfStatement();
2358 return true;
2359 }
2360
2361 if (Lexer.isNot(AsmToken::Equal)) {
2362 TokError("expected '=' after formal parameter identifier");
2363 eatToEndOfStatement();
2364 return true;
2365 }
2379 if (parseIdentifier(FA.Name))
2380 return Error(IDLoc, "invalid argument identifier for formal argument");
2381
2382 if (Lexer.isNot(AsmToken::Equal))
2383 return TokError("expected '=' after formal parameter identifier");
2384
23662385 Lex();
23672386
23682387 NamedParametersFound = true;
23692388 }
23702389
2371 if (NamedParametersFound && FA.Name.empty()) {
2372 Error(IDLoc, "cannot mix positional and keyword arguments");
2373 eatToEndOfStatement();
2374 return true;
2375 }
2390 if (NamedParametersFound && FA.Name.empty())
2391 return Error(IDLoc, "cannot mix positional and keyword arguments");
23762392
23772393 bool Vararg = HasVararg && Parameter == (NParameters - 1);
23782394 if (parseMacroArgument(FA.Value, Vararg))
23872403
23882404 if (FAI >= NParameters) {
23892405 assert(M && "expected macro to be defined");
2390 Error(IDLoc,
2391 "parameter named '" + FA.Name + "' does not exist for macro '" +
2392 M->Name + "'");
2393 return true;
2406 return Error(IDLoc, "parameter named '" + FA.Name +
2407 "' does not exist for macro '" + M->Name + "'");
23942408 }
23952409 PI = FAI;
23962410 }
29913005 if (!HasFillExpr)
29923006 FillExpr = 0;
29933007
3008 // Always emit an alignment here even if we thrown an error.
3009 bool ReturnVal = false;
3010
29943011 // Compute alignment in bytes.
29953012 if (IsPow2) {
29963013 // FIXME: Diagnose overflow.
29973014 if (Alignment >= 32) {
2998 Error(AlignmentLoc, "invalid alignment value");
3015 ReturnVal |= Error(AlignmentLoc, "invalid alignment value");
29993016 Alignment = 31;
30003017 }
30013018
30073024 if (Alignment == 0)
30083025 Alignment = 1;
30093026 if (!isPowerOf2_64(Alignment))
3010 Error(AlignmentLoc, "alignment must be a power of 2");
3027 ReturnVal |= Error(AlignmentLoc, "alignment must be a power of 2");
30113028 }
30123029
30133030 // Diagnose non-sensical max bytes to align.
30143031 if (MaxBytesLoc.isValid()) {
30153032 if (MaxBytesToFill < 1) {
3016 Error(MaxBytesLoc, "alignment directive can never be satisfied in this "
3033 ReturnVal |= Error(MaxBytesLoc,
3034 "alignment directive can never be satisfied in this "
30173035 "many bytes, ignoring maximum bytes expression");
30183036 MaxBytesToFill = 0;
30193037 }
30393057 MaxBytesToFill);
30403058 }
30413059
3042 return false;
3060 return ReturnVal;
30433061 }
30443062
30453063 /// parseDirectiveFile
30933111 getContext().setGenDwarfForAssembly(false);
30943112 else if (getStreamer().EmitDwarfFileDirective(FileNumber, Directory, Filename) ==
30953113 0)
3096 Error(FileNumberLoc, "file number already allocated");
3114 return Error(FileNumberLoc, "file number already allocated");
30973115 }
30983116
30993117 return false;
33453363
33463364 if (!getStreamer().EmitCVInlineSiteIdDirective(FunctionId, IAFunc, IAFile,
33473365 IALine, IACol, FunctionIdLoc))
3348 Error(FunctionIdLoc, "function id already allocated");
3366 return Error(FunctionIdLoc, "function id already allocated");
33493367
33503368 return false;
33513369 }
43394357 return true;
43404358
43414359 if (Str.empty())
4342 Error(Loc, ".abort detected. Assembly stopping.");
4360 return Error(Loc, ".abort detected. Assembly stopping.");
43434361 else
4344 Error(Loc, ".abort '" + Str + "' detected. Assembly stopping.");
4362 return Error(Loc, ".abort '" + Str + "' detected. Assembly stopping.");
43454363 // FIXME: Actually abort assembly here.
43464364
43474365 return false;
44864504 bool AsmParser::parseDirectiveIfeqs(SMLoc DirectiveLoc, bool ExpectEqual) {
44874505 if (Lexer.isNot(AsmToken::String)) {
44884506 if (ExpectEqual)
4489 TokError("expected string parameter for '.ifeqs' directive");
4490 else
4491 TokError("expected string parameter for '.ifnes' directive");
4492 eatToEndOfStatement();
4493 return true;
4507 return TokError("expected string parameter for '.ifeqs' directive");
4508 return TokError("expected string parameter for '.ifnes' directive");
44944509 }
44954510
44964511 StringRef String1 = getTok().getStringContents();
44984513
44994514 if (Lexer.isNot(AsmToken::Comma)) {
45004515 if (ExpectEqual)
4501 TokError("expected comma after first string for '.ifeqs' directive");
4502 else
4503 TokError("expected comma after first string for '.ifnes' directive");
4504 eatToEndOfStatement();
4505 return true;
4516 return TokError(
4517 "expected comma after first string for '.ifeqs' directive");
4518 return TokError("expected comma after first string for '.ifnes' directive");
45064519 }
45074520
45084521 Lex();
45094522
45104523 if (Lexer.isNot(AsmToken::String)) {
45114524 if (ExpectEqual)
4512 TokError("expected string parameter for '.ifeqs' directive");
4513 else
4514 TokError("expected string parameter for '.ifnes' directive");
4515 eatToEndOfStatement();
4516 return true;
4525 return TokError("expected string parameter for '.ifeqs' directive");
4526 return TokError("expected string parameter for '.ifnes' directive");
45174527 }
45184528
45194529 StringRef String2 = getTok().getStringContents();
45584568 bool AsmParser::parseDirectiveElseIf(SMLoc DirectiveLoc) {
45594569 if (TheCondState.TheCond != AsmCond::IfCond &&
45604570 TheCondState.TheCond != AsmCond::ElseIfCond)
4561 Error(DirectiveLoc, "Encountered a .elseif that doesn't follow a .if or "
4562 " an .elseif");
4571 return Error(DirectiveLoc, "Encountered a .elseif that doesn't follow an"
4572 " .if or an .elseif");
45634573 TheCondState.TheCond = AsmCond::ElseIfCond;
45644574
45654575 bool LastIgnoreState = false;
45934603
45944604 if (TheCondState.TheCond != AsmCond::IfCond &&
45954605 TheCondState.TheCond != AsmCond::ElseIfCond)
4596 Error(DirectiveLoc, "Encountered a .else that doesn't follow a .if or an "
4597 ".elseif");
4606 return Error(DirectiveLoc, "Encountered a .else that doesn't follow "
4607 " an .if or an .elseif");
45984608 TheCondState.TheCond = AsmCond::ElseCond;
45994609 bool LastIgnoreState = false;
46004610 if (!TheCondStack.empty())
46364646
46374647 StringRef Message = ".error directive invoked in source file";
46384648 if (Lexer.isNot(AsmToken::EndOfStatement)) {
4639 if (Lexer.isNot(AsmToken::String)) {
4640 TokError(".error argument must be a string");
4641 eatToEndOfStatement();
4642 return true;
4643 }
4649 if (Lexer.isNot(AsmToken::String))
4650 return TokError(".error argument must be a string");
46444651
46454652 Message = getTok().getStringContents();
46464653 Lex();
46474654 }
46484655
4649 Error(L, Message);
4650 return true;
4656 return Error(L, Message);
46514657 }
46524658
46534659 /// parseDirectiveWarning
46624668
46634669 StringRef Message = ".warning directive invoked in source file";
46644670 if (Lexer.isNot(AsmToken::EndOfStatement)) {
4665 if (Lexer.isNot(AsmToken::String)) {
4666 TokError(".warning argument must be a string");
4667 eatToEndOfStatement();
4668 return true;
4669 }
4671 if (Lexer.isNot(AsmToken::String))
4672 return TokError(".warning argument must be a string");
46704673
46714674 Message = getTok().getStringContents();
46724675 Lex();
46734676 }
46744677
4675 Warning(L, Message);
4676 return false;
4678 return Warning(L, Message);
46774679 }
46784680
46794681 /// parseDirectiveEndIf
46844686 return true;
46854687
46864688 if ((TheCondState.TheCond == AsmCond::NoCond) || TheCondStack.empty())
4687 Error(DirectiveLoc, "Encountered a .endif that doesn't follow a .if or "
4688 ".else");
4689 return Error(DirectiveLoc, "Encountered a .endif that doesn't follow "
4690 "an .if or .else");
46894691 if (!TheCondStack.empty()) {
46904692 TheCondState = TheCondStack.back();
46914693 TheCondStack.pop_back();
48374839 while (true) {
48384840 // Check whether we have reached the end of the file.
48394841 if (getLexer().is(AsmToken::Eof)) {
4840 Error(DirectiveLoc, "no matching '.endr' in definition");
4842 printError(DirectiveLoc, "no matching '.endr' in definition");
48414843 return nullptr;
48424844 }
48434845
48544856 EndToken = getTok();
48554857 Lex();
48564858 if (Lexer.isNot(AsmToken::EndOfStatement)) {
4857 TokError("unexpected token in '.endr' directive");
4859 printError(getTok().getLoc(),
4860 "unexpected token in '.endr' directive");
48584861 return nullptr;
48594862 }
48604863 break;
49044907
49054908 int64_t Count;
49064909 if (!CountExpr->evaluateAsAbsolute(Count)) {
4907 eatToEndOfStatement();
49084910 return Error(CountLoc, "unexpected token in '" + Dir + "' directive");
49094911 }
49104912
51075109 continue;
51085110
51095111 ParseStatementInfo Info(&AsmStrRewrites);
5110 if (parseStatement(Info, &SI))
5112 bool StatementErr = parseStatement(Info, &SI);
5113
5114 if (StatementErr || Info.ParseError) {
5115 // Emit pending errors if any exist.
5116 printPendingErrors();
51115117 return true;
5112
5113 if (Info.ParseError)
5114 return true;
5118 }
5119
5120 // No pending error should exist here.
5121 assert(!hasPendingError() && "unexpected error from parseStatement");
51155122
51165123 if (Info.Opcode == ~0U)
51175124 continue;
53385345
53395346 if (Parser.parseExpression(Value)) {
53405347 Parser.TokError("missing expression");
5341 Parser.eatToEndOfStatement();
53425348 return true;
53435349 }
53445350
1111
1212 using namespace llvm;
1313
14 MCAsmLexer::MCAsmLexer() : TokStart(nullptr), SkipSpace(true) {
14 MCAsmLexer::MCAsmLexer()
15 : TokStart(nullptr), SkipSpace(true), IsAtStartOfStatement(true) {
1516 CurTok.emplace_back(AsmToken::Space, StringRef());
1617 }
1718
1616 #include "llvm/Support/raw_ostream.h"
1717 using namespace llvm;
1818
19 MCAsmParser::MCAsmParser() : TargetParser(nullptr), ShowParsedOperands(0) {
20 }
19 MCAsmParser::MCAsmParser()
20 : TargetParser(nullptr), ShowParsedOperands(0), HadError(false), PendingErrors() {}
2121
2222 MCAsmParser::~MCAsmParser() {
2323 }
8383 return false;
8484 }
8585
86 bool MCAsmParser::TokError(const Twine &Msg, ArrayRef Ranges) {
87 Error(getLexer().getLoc(), Msg, Ranges);
86 bool MCAsmParser::TokError(const Twine &Msg, SMRange Range) {
87 return Error(getLexer().getLoc(), Msg, Range);
88 }
89
90 bool MCAsmParser::Error(SMLoc L, const Twine &Msg, SMRange Range) {
91 HadError = true;
92
93 MCPendingError PErr;
94 PErr.Loc = L;
95 Msg.toVector(PErr.Msg);
96 PErr.Range = Range;
97 PendingErrors.push_back(PErr);
8898 return true;
8999 }
90100
27012701 }
27022702
27032703 if (getLexer().isNot(AsmToken::EndOfStatement)) {
2704 Parser.eatToEndOfStatement();
27052704 return TokError("unexpected token in argument list");
27062705 }
27072706
33213320 // IC, DC, AT, and TLBI instructions are aliases for the SYS instruction.
33223321 if (Head == "ic" || Head == "dc" || Head == "at" || Head == "tlbi") {
33233322 bool IsError = parseSysAlias(Head, NameLoc, Operands);
3324 if (IsError && getLexer().isNot(AsmToken::EndOfStatement))
3325 Parser.eatToEndOfStatement();
33263323 return IsError;
33273324 }
33283325
33793376 if (getLexer().isNot(AsmToken::EndOfStatement)) {
33803377 // Read the first operand.
33813378 if (parseOperand(Operands, false, false)) {
3382 Parser.eatToEndOfStatement();
33833379 return true;
33843380 }
33853381
33923388 (N == 3 && condCodeThirdOperand) ||
33933389 (N == 2 && condCodeSecondOperand),
33943390 condCodeSecondOperand || condCodeThirdOperand)) {
3395 Parser.eatToEndOfStatement();
33963391 return true;
33973392 }
33983393
34243419
34253420 if (getLexer().isNot(AsmToken::EndOfStatement)) {
34263421 SMLoc Loc = Parser.getTok().getLoc();
3427 Parser.eatToEndOfStatement();
34283422 return Error(Loc, "unexpected token in argument list");
34293423 }
34303424
41824176 if (IDVal == ".inst")
41834177 return parseDirectiveInst(Loc);
41844178 }
4185
4186 return parseDirectiveLOH(IDVal, Loc);
4179 if (IDVal == MCLOHDirectiveName())
4180 return parseDirectiveLOH(IDVal, Loc);
4181
4182 return true;
41874183 }
41884184
41894185 static const struct {
43444340 bool AArch64AsmParser::parseDirectiveInst(SMLoc Loc) {
43454341 MCAsmParser &Parser = getParser();
43464342 if (getLexer().is(AsmToken::EndOfStatement)) {
4347 Parser.eatToEndOfStatement();
43484343 Error(Loc, "expected expression following directive");
43494344 return false;
43504345 }
44024397 /// ::= .loh label1, ..., labelN
44034398 /// The number of arguments depends on the loh identifier.
44044399 bool AArch64AsmParser::parseDirectiveLOH(StringRef IDVal, SMLoc Loc) {
4405 if (IDVal != MCLOHDirectiveName())
4406 return true;
44074400 MCLOHType Kind;
44084401 if (getParser().getTok().isNot(AsmToken::Identifier)) {
44094402 if (getParser().getTok().isNot(AsmToken::Integer))
44114404 // We successfully get a numeric value for the identifier.
44124405 // Check if it is valid.
44134406 int64_t Id = getParser().getTok().getIntVal();
4414 if (Id <= -1U && !isValidMCLOHType(Id))
4415 return TokError("invalid numeric identifier in directive");
4407 if (Id <= -1U && !isValidMCLOHType(Id)) {
4408 TokError("invalid numeric identifier in directive");
4409 return false;
4410 }
44164411 Kind = (MCLOHType)Id;
44174412 } else {
44184413 StringRef Name = getTok().getIdentifier();
44704465 if (RegNum == static_cast(-1)) {
44714466 StringRef Kind;
44724467 RegNum = tryMatchVectorRegister(Kind, false);
4473 if (!Kind.empty()) {
4474 Error(SRegLoc, "vector register without type specifier expected");
4475 return false;
4476 }
4468 if (!Kind.empty())
4469 return Error(SRegLoc, "vector register without type specifier expected");
44774470 IsVector = true;
44784471 }
44794472
4480 if (RegNum == static_cast(-1)) {
4481 Parser.eatToEndOfStatement();
4482 Error(SRegLoc, "register name or alias expected");
4483 return false;
4484 }
4473 if (RegNum == static_cast(-1))
4474 return Error(SRegLoc, "register name or alias expected");
44854475
44864476 // Shouldn't be anything else.
4487 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
4488 Error(Parser.getTok().getLoc(), "unexpected input in .req directive");
4489 Parser.eatToEndOfStatement();
4490 return false;
4491 }
4477 if (Parser.getTok().isNot(AsmToken::EndOfStatement))
4478 return Error(Parser.getTok().getLoc(),
4479 "unexpected input in .req directive");
44924480
44934481 Parser.Lex(); // Consume the EndOfStatement
44944482
44964484 if (RegisterReqs.insert(std::make_pair(Name, pair)).first->second != pair)
44974485 Warning(L, "ignoring redefinition of register alias '" + Name + "'");
44984486
4499 return true;
4487 return false;
45004488 }
45014489
45024490 /// parseDirectiveUneq
45054493 MCAsmParser &Parser = getParser();
45064494 if (Parser.getTok().isNot(AsmToken::Identifier)) {
45074495 Error(Parser.getTok().getLoc(), "unexpected input in .unreq directive.");
4508 Parser.eatToEndOfStatement();
45094496 return false;
45104497 }
45114498 RegisterReqs.erase(Parser.getTok().getIdentifier().lower());
338338 return;
339339 }
340340
341 void Note(SMLoc L, const Twine &Msg, ArrayRef Ranges = None) {
342 return getParser().Note(L, Msg, Ranges);
343 }
344 bool Warning(SMLoc L, const Twine &Msg,
345 ArrayRef Ranges = None) {
346 return getParser().Warning(L, Msg, Ranges);
347 }
348 bool Error(SMLoc L, const Twine &Msg,
349 ArrayRef Ranges = None) {
350 return getParser().Error(L, Msg, Ranges);
341 void Note(SMLoc L, const Twine &Msg, SMRange Range = None) {
342 return getParser().Note(L, Msg, Range);
343 }
344 bool Warning(SMLoc L, const Twine &Msg, SMRange Range = None) {
345 return getParser().Warning(L, Msg, Range);
346 }
347 bool Error(SMLoc L, const Twine &Msg, SMRange Range = None) {
348 return getParser().Error(L, Msg, Range);
351349 }
352350
353351 bool validatetLDMRegList(const MCInst &Inst, const OperandVector &Operands,
60076005
60086006 // In Thumb1, only the branch (B) instruction can be predicated.
60096007 if (isThumbOne() && PredicationCode != ARMCC::AL && Mnemonic != "b") {
6010 Parser.eatToEndOfStatement();
60116008 return Error(NameLoc, "conditional execution not supported in Thumb1");
60126009 }
60136010
60216018 if (Mnemonic == "it") {
60226019 SMLoc Loc = SMLoc::getFromPointer(NameLoc.getPointer() + 2);
60236020 if (ITMask.size() > 3) {
6024 Parser.eatToEndOfStatement();
60256021 return Error(Loc, "too many conditions on IT instruction");
60266022 }
60276023 unsigned Mask = 8;
60286024 for (unsigned i = ITMask.size(); i != 0; --i) {
60296025 char pos = ITMask[i - 1];
60306026 if (pos != 't' && pos != 'e') {
6031 Parser.eatToEndOfStatement();
60326027 return Error(Loc, "illegal IT block condition mask '" + ITMask + "'");
60336028 }
60346029 Mask >>= 1;
60546049 // If we had a carry-set on an instruction that can't do that, issue an
60556050 // error.
60566051 if (!CanAcceptCarrySet && CarrySetting) {
6057 Parser.eatToEndOfStatement();
60586052 return Error(NameLoc, "instruction '" + Mnemonic +
60596053 "' can not set flags, but 's' suffix specified");
60606054 }
60616055 // If we had a predication code on an instruction that can't do that, issue an
60626056 // error.
60636057 if (!CanAcceptPredicationCode && PredicationCode != ARMCC::AL) {
6064 Parser.eatToEndOfStatement();
60656058 return Error(NameLoc, "instruction '" + Mnemonic +
60666059 "' is not predicable, but condition code specified");
60676060 }
61056098 // For for ARM mode generate an error if the .n qualifier is used.
61066099 if (ExtraToken == ".n" && !isThumb()) {
61076100 SMLoc Loc = SMLoc::getFromPointer(NameLoc.getPointer() + Start);
6108 Parser.eatToEndOfStatement();
61096101 return Error(Loc, "instruction with .n (narrow) qualifier not allowed in "
61106102 "arm mode");
61116103 }
61236115 if (getLexer().isNot(AsmToken::EndOfStatement)) {
61246116 // Read the first operand.
61256117 if (parseOperand(Operands, Mnemonic)) {
6126 Parser.eatToEndOfStatement();
61276118 return true;
61286119 }
61296120
61326123
61336124 // Parse and remember the operand.
61346125 if (parseOperand(Operands, Mnemonic)) {
6135 Parser.eatToEndOfStatement();
61366126 return true;
61376127 }
61386128 }
61396129 }
61406130
61416131 if (getLexer().isNot(AsmToken::EndOfStatement)) {
6142 SMLoc Loc = getLexer().getLoc();
6143 Parser.eatToEndOfStatement();
6144 return Error(Loc, "unexpected token in argument list");
6132 return TokError("unexpected token in argument list");
61456133 }
61466134
61476135 Parser.Lex(); // Consume the EndOfStatement
93339321 for (;;) {
93349322 const MCExpr *Value;
93359323 if (getParser().parseExpression(Value)) {
9336 Parser.eatToEndOfStatement();
93379324 return false;
93389325 }
93399326
94369423
94379424 if (getLexer().isNot(AsmToken::EndOfStatement)) {
94389425 Error(Parser.getTok().getLoc(), "unexpected token in directive");
9439 Parser.eatToEndOfStatement();
94409426 return false;
94419427 }
94429428
95299515 unsigned Reg;
95309516 SMLoc SRegLoc, ERegLoc;
95319517 if (ParseRegister(Reg, SRegLoc, ERegLoc)) {
9532 Parser.eatToEndOfStatement();
95339518 Error(SRegLoc, "register name expected");
95349519 return false;
95359520 }
95369521
95379522 // Shouldn't be anything else.
95389523 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
9539 Parser.eatToEndOfStatement();
95409524 Error(Parser.getTok().getLoc(), "unexpected input in .req directive.");
95419525 return false;
95429526 }
95569540 bool ARMAsmParser::parseDirectiveUnreq(SMLoc L) {
95579541 MCAsmParser &Parser = getParser();
95589542 if (Parser.getTok().isNot(AsmToken::Identifier)) {
9559 Parser.eatToEndOfStatement();
95609543 Error(L, "unexpected input in .unreq directive.");
95619544 return false;
95629545 }
96269609 Tag = ARMBuildAttrs::AttrTypeFromString(Name);
96279610 if (Tag == -1) {
96289611 Error(TagLoc, "attribute name not recognised: " + Name);
9629 Parser.eatToEndOfStatement();
96309612 return false;
96319613 }
96329614 Parser.Lex();
96359617
96369618 TagLoc = Parser.getTok().getLoc();
96379619 if (Parser.parseExpression(AttrExpr)) {
9638 Parser.eatToEndOfStatement();
96399620 return false;
96409621 }
96419622
96429623 const MCConstantExpr *CE = dyn_cast(AttrExpr);
96439624 if (!CE) {
96449625 Error(TagLoc, "expected numeric constant");
9645 Parser.eatToEndOfStatement();
96469626 return false;
96479627 }
96489628
96519631
96529632 if (Parser.getTok().isNot(AsmToken::Comma)) {
96539633 Error(Parser.getTok().getLoc(), "comma expected");
9654 Parser.eatToEndOfStatement();
96559634 return false;
96569635 }
96579636 Parser.Lex(); // skip comma
96789657 const MCExpr *ValueExpr;
96799658 SMLoc ValueExprLoc = Parser.getTok().getLoc();
96809659 if (Parser.parseExpression(ValueExpr)) {
9681 Parser.eatToEndOfStatement();
96829660 return false;
96839661 }
96849662
96859663 const MCConstantExpr *CE = dyn_cast(ValueExpr);
96869664 if (!CE) {
96879665 Error(ValueExprLoc, "expected numeric constant");
9688 Parser.eatToEndOfStatement();
96899666 return false;
96909667 }
96919668
96979674 IsStringValue = false;
96989675 if (Parser.getTok().isNot(AsmToken::Comma)) {
96999676 Error(Parser.getTok().getLoc(), "comma expected");
9700 Parser.eatToEndOfStatement();
97019677 return false;
97029678 } else {
97039679 Parser.Lex();
97079683 if (IsStringValue) {
97089684 if (Parser.getTok().isNot(AsmToken::String)) {
97099685 Error(Parser.getTok().getLoc(), "bad string constant");
9710 Parser.eatToEndOfStatement();
97119686 return false;
97129687 }
97139688
98519826 return false;
98529827 }
98539828 if (HasExistingPersonality) {
9854 Parser.eatToEndOfStatement();
98559829 Error(L, "multiple personality directives");
98569830 UC.emitPersonalityLocNotes();
98579831 return false;
98599833
98609834 // Parse the name of the personality routine
98619835 if (Parser.getTok().isNot(AsmToken::Identifier)) {
9862 Parser.eatToEndOfStatement();
98639836 Error(L, "unexpected input in .personality directive.");
98649837 return false;
98659838 }
1005910032 Width = 4;
1006010033 break;
1006110034 default:
10062 Parser.eatToEndOfStatement();
1006310035 Error(Loc, "cannot determine Thumb instruction size, "
1006410036 "use inst.n/inst.w instead");
1006510037 return false;
1006610038 }
1006710039 } else {
1006810040 if (Suffix) {
10069 Parser.eatToEndOfStatement();
1007010041 Error(Loc, "width suffixes are invalid in ARM mode");
1007110042 return false;
1007210043 }
1007410045 }
1007510046
1007610047 if (getLexer().is(AsmToken::EndOfStatement)) {
10077 Parser.eatToEndOfStatement();
1007810048 Error(Loc, "expected expression following directive");
1007910049 return false;
1008010050 }
1016610136 UC.recordPersonalityIndex(L);
1016710137
1016810138 if (!UC.hasFnStart()) {
10169 Parser.eatToEndOfStatement();
1017010139 Error(L, ".fnstart must precede .personalityindex directive");
1017110140 return false;
1017210141 }
1017310142 if (UC.cantUnwind()) {
10174 Parser.eatToEndOfStatement();
1017510143 Error(L, ".personalityindex cannot be used with .cantunwind");
1017610144 UC.emitCantUnwindLocNotes();
1017710145 return false;
1017810146 }
1017910147 if (UC.hasHandlerData()) {
10180 Parser.eatToEndOfStatement();
1018110148 Error(L, ".personalityindex must precede .handlerdata directive");
1018210149 UC.emitHandlerDataLocNotes();
1018310150 return false;
1018410151 }
1018510152 if (HasExistingPersonality) {
10186 Parser.eatToEndOfStatement();
1018710153 Error(L, "multiple personality directives");
1018810154 UC.emitPersonalityLocNotes();
1018910155 return false;
1019210158 const MCExpr *IndexExpression;
1019310159 SMLoc IndexLoc = Parser.getTok().getLoc();
1019410160 if (Parser.parseExpression(IndexExpression)) {
10195 Parser.eatToEndOfStatement();
1019610161 return false;
1019710162 }
1019810163
1019910164 const MCConstantExpr *CE = dyn_cast(IndexExpression);
1020010165 if (!CE) {
10201 Parser.eatToEndOfStatement();
1020210166 Error(IndexLoc, "index must be a constant number");
1020310167 return false;
1020410168 }
1020510169 if (CE->getValue() < 0 ||
1020610170 CE->getValue() >= ARM::EHABI::NUM_PERSONALITY_INDEX) {
10207 Parser.eatToEndOfStatement();
1020810171 Error(IndexLoc, "personality routine index should be in range [0-3]");
1020910172 return false;
1021010173 }
1021810181 bool ARMAsmParser::parseDirectiveUnwindRaw(SMLoc L) {
1021910182 MCAsmParser &Parser = getParser();
1022010183 if (!UC.hasFnStart()) {
10221 Parser.eatToEndOfStatement();
1022210184 Error(L, ".fnstart must precede .unwind_raw directives");
1022310185 return false;
1022410186 }
1023010192 if (getLexer().is(AsmToken::EndOfStatement) ||
1023110193 getParser().parseExpression(OffsetExpr)) {
1023210194 Error(OffsetLoc, "expected expression");
10233 Parser.eatToEndOfStatement();
1023410195 return false;
1023510196 }
1023610197
1023710198 const MCConstantExpr *CE = dyn_cast(OffsetExpr);
1023810199 if (!CE) {
1023910200 Error(OffsetLoc, "offset must be a constant");
10240 Parser.eatToEndOfStatement();
1024110201 return false;
1024210202 }
1024310203
1024510205
1024610206 if (getLexer().isNot(AsmToken::Comma)) {
1024710207 Error(getLexer().getLoc(), "expected comma");
10248 Parser.eatToEndOfStatement();
1024910208 return false;
1025010209 }
1025110210 Parser.Lex();
1025710216 SMLoc OpcodeLoc = getLexer().getLoc();
1025810217 if (getLexer().is(AsmToken::EndOfStatement) || Parser.parseExpression(OE)) {
1025910218 Error(OpcodeLoc, "expected opcode expression");
10260 Parser.eatToEndOfStatement();
1026110219 return false;
1026210220 }
1026310221
1026410222 const MCConstantExpr *OC = dyn_cast(OE);
1026510223 if (!OC) {
1026610224 Error(OpcodeLoc, "opcode value must be a constant");
10267 Parser.eatToEndOfStatement();
1026810225 return false;
1026910226 }
1027010227
1027110228 const int64_t Opcode = OC->getValue();
1027210229 if (Opcode & ~0xff) {
1027310230 Error(OpcodeLoc, "invalid opcode");
10274 Parser.eatToEndOfStatement();
1027510231 return false;
1027610232 }
1027710233
1028210238
1028310239 if (getLexer().isNot(AsmToken::Comma)) {
1028410240 Error(getLexer().getLoc(), "unexpected token in directive");
10285 Parser.eatToEndOfStatement();
1028610241 return false;
1028710242 }
1028810243
1030210257
1030310258 if (getLexer().isNot(AsmToken::Identifier)) {
1030410259 TokError("expected variable after '.tlsdescseq' directive");
10305 Parser.eatToEndOfStatement();
1030610260 return false;
1030710261 }
1030810262
1031310267
1031410268 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1031510269 Error(Parser.getTok().getLoc(), "unexpected token");
10316 Parser.eatToEndOfStatement();
1031710270 return false;
1031810271 }
1031910272
1032610279 bool ARMAsmParser::parseDirectiveMovSP(SMLoc L) {
1032710280 MCAsmParser &Parser = getParser();
1032810281 if (!UC.hasFnStart()) {
10329 Parser.eatToEndOfStatement();
1033010282 Error(L, ".fnstart must precede .movsp directives");
1033110283 return false;
1033210284 }
1033310285 if (UC.getFPReg() != ARM::SP) {
10334 Parser.eatToEndOfStatement();
1033510286 Error(L, "unexpected .movsp directive");
1033610287 return false;
1033710288 }
1033910290 SMLoc SPRegLoc = Parser.getTok().getLoc();
1034010291 int SPReg = tryParseRegister();
1034110292 if (SPReg == -1) {
10342 Parser.eatToEndOfStatement();
1034310293 Error(SPRegLoc, "register expected");
1034410294 return false;
1034510295 }
1034610296
1034710297 if (SPReg == ARM::SP || SPReg == ARM::PC) {
10348 Parser.eatToEndOfStatement();
1034910298 Error(SPRegLoc, "sp and pc are not permitted in .movsp directive");
1035010299 return false;
1035110300 }
1035610305
1035710306 if (Parser.getTok().isNot(AsmToken::Hash)) {
1035810307 Error(Parser.getTok().getLoc(), "expected #constant");
10359 Parser.eatToEndOfStatement();
1036010308 return false;
1036110309 }
1036210310 Parser.Lex();
1036410312 const MCExpr *OffsetExpr;
1036510313 SMLoc OffsetLoc = Parser.getTok().getLoc();
1036610314 if (Parser.parseExpression(OffsetExpr)) {
10367 Parser.eatToEndOfStatement();
1036810315 Error(OffsetLoc, "malformed offset expression");
1036910316 return false;
1037010317 }
1037110318
1037210319 const MCConstantExpr *CE = dyn_cast(OffsetExpr);
1037310320 if (!CE) {
10374 Parser.eatToEndOfStatement();
1037510321 Error(OffsetLoc, "offset must be an immediate constant");
1037610322 return false;
1037710323 }
1039110337 MCAsmParser &Parser = getParser();
1039210338 if (getLexer().isNot(AsmToken::Identifier)) {
1039310339 Error(getLexer().getLoc(), "unexpected token");
10394 Parser.eatToEndOfStatement();
1039510340 return false;
1039610341 }
1039710342
1040310348
1040410349 if (ID == ARM::AK_INVALID) {
1040510350 Error(ArchLoc, "unknown architecture '" + Arch + "'");
10406 Parser.eatToEndOfStatement();
1040710351 return false;
1040810352 }
1040910353
1041110355
1041210356 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1041310357 Error(getLexer().getLoc(), "unexpected token");
10414 Parser.eatToEndOfStatement();
1041510358 }
1041610359
1041710360 return false;
1044410387 StringRef Name;
1044510388 if (Parser.parseIdentifier(Name)) {
1044610389 TokError("expected identifier after '.thumb_set'");
10447 Parser.eatToEndOfStatement();
1044810390 return false;
1044910391 }
1045010392
1045110393 if (getLexer().isNot(AsmToken::Comma)) {
1045210394 TokError("expected comma after name '" + Name + "'");
10453 Parser.eatToEndOfStatement();
1045410395 return false;
1045510396 }
1045610397 Lex();
1051410455
1051510456 if (getLexer().isNot(AsmToken::Identifier)) {
1051610457 Error(getLexer().getLoc(), "expected architecture extension name");
10517 Parser.eatToEndOfStatement();
1051810458 return false;
1051910459 }
1052010460
1056010500 }
1056110501
1056210502 Error(ExtLoc, "unknown architectural extension: " + Name);
10563 Parser.eatToEndOfStatement();
1056410503 return false;
1056510504 }
1056610505
113113 uint64_t &ErrorInfo, bool MatchingInlineAsm) override;
114114
115115 unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind) override;
116 void OutOfRange(SMLoc IDLoc, long long Val, long long Max);
116 bool OutOfRange(SMLoc IDLoc, long long Val, long long Max);
117117 int processInstruction(MCInst &Inst, OperandVector const &Operands,
118118 SMLoc IDLoc);
119119
636636 uint64_t Err = Check.getError();
637637 if (Err != HexagonMCErrInfo::CHECK_SUCCESS) {
638638 if (HexagonMCErrInfo::CHECK_ERROR_BRANCHES & Err)
639 Error(IDLoc,
640 "unconditional branch cannot precede another branch in packet");
639 return Error(
640 IDLoc,
641 "unconditional branch cannot precede another branch in packet");
641642
642643 if (HexagonMCErrInfo::CHECK_ERROR_NEWP & Err ||
643644 HexagonMCErrInfo::CHECK_ERROR_NEWV & Err)
644 Error(IDLoc, "register `" + R +
645 "' used with `.new' "
646 "but not validly modified in the same packet");
645 return Error(IDLoc, "register `" + R +
646 "' used with `.new' "
647 "but not validly modified in the same packet");
647648
648649 if (HexagonMCErrInfo::CHECK_ERROR_REGISTERS & Err)
649 Error(IDLoc, "register `" + R + "' modified more than once");
650 return Error(IDLoc, "register `" + R + "' modified more than once");
650651
651652 if (HexagonMCErrInfo::CHECK_ERROR_READONLY & Err)
652 Error(IDLoc, "cannot write to read-only register `" + R + "'");
653 return Error(IDLoc, "cannot write to read-only register `" + R + "'");
653654
654655 if (HexagonMCErrInfo::CHECK_ERROR_LOOP & Err)
655 Error(IDLoc, "loop-setup and some branch instructions "
656 "cannot be in the same packet");
656 return Error(IDLoc, "loop-setup and some branch instructions "
657 "cannot be in the same packet");
657658
658659 if (HexagonMCErrInfo::CHECK_ERROR_ENDLOOP & Err) {
659660 Twine N(HexagonMCInstrInfo::isInnerLoop(MCB) ? '0' : '1');
660 Error(IDLoc, "packet marked with `:endloop" + N + "' " +
661 return Error(IDLoc,
662 "packet marked with `:endloop" + N + "' " +
661663 "cannot contain instructions that modify register " +
662664 "`" + R + "'");
663665 }
664666
665667 if (HexagonMCErrInfo::CHECK_ERROR_SOLO & Err)
666 Error(IDLoc,
667 "instruction cannot appear in packet with other instructions");
668 return Error(
669 IDLoc,
670 "instruction cannot appear in packet with other instructions");
668671
669672 if (HexagonMCErrInfo::CHECK_ERROR_NOSLOTS & Err)
670 Error(IDLoc, "too many slots used in packet");
673 return Error(IDLoc, "too many slots used in packet");
671674
672675 if (Err & HexagonMCErrInfo::CHECK_ERROR_SHUFFLE) {
673676 uint64_t Erm = Check.getShuffleError();
674677
675678 if (HexagonShuffler::SHUFFLE_ERROR_INVALID == Erm)
676 Error(IDLoc, "invalid instruction packet");
679 return Error(IDLoc, "invalid instruction packet");
677680 else if (HexagonShuffler::SHUFFLE_ERROR_STORES == Erm)
678 Error(IDLoc, "invalid instruction packet: too many stores");
681 return Error(IDLoc, "invalid instruction packet: too many stores");
679682 else if (HexagonShuffler::SHUFFLE_ERROR_LOADS == Erm)
680 Error(IDLoc, "invalid instruction packet: too many loads");
683 return Error(IDLoc, "invalid instruction packet: too many loads");
681684 else if (HexagonShuffler::SHUFFLE_ERROR_BRANCHES == Erm)
682 Error(IDLoc, "too many branches in packet");
685 return Error(IDLoc, "too many branches in packet");
683686 else if (HexagonShuffler::SHUFFLE_ERROR_NOSLOTS == Erm)
684 Error(IDLoc, "invalid instruction packet: out of slots");
687 return Error(IDLoc, "invalid instruction packet: out of slots");
685688 else if (HexagonShuffler::SHUFFLE_ERROR_SLOTS == Erm)
686 Error(IDLoc, "invalid instruction packet: slot error");
689 return Error(IDLoc, "invalid instruction packet: slot error");
687690 else if (HexagonShuffler::SHUFFLE_ERROR_ERRATA2 == Erm)
688 Error(IDLoc, "v60 packet violation");
691 return Error(IDLoc, "v60 packet violation");
689692 else if (HexagonShuffler::SHUFFLE_ERROR_STORE_LOAD_CONFLICT == Erm)
690 Error(IDLoc, "slot 0 instruction does not allow slot 1 store");
693 return Error(IDLoc, "slot 0 instruction does not allow slot 1 store");
691694 else
692 Error(IDLoc, "unknown error in instruction packet");
695 return Error(IDLoc, "unknown error in instruction packet");
693696 }
694697 }
695698
15071510 return Match_InvalidOperand;
15081511 }
15091512
1510 void HexagonAsmParser::OutOfRange(SMLoc IDLoc, long long Val, long long Max) {
1513 // FIXME: Calls to OutOfRange shoudl propagate failure up to parseStatement.
1514 bool HexagonAsmParser::OutOfRange(SMLoc IDLoc, long long Val, long long Max) {
15111515 std::string errStr;
15121516 raw_string_ostream ES(errStr);
15131517 ES << "value " << Val << "(" << format_hex(Val, 0) << ") out of range: ";
15151519 ES << "0-" << Max;
15161520 else
15171521 ES << Max << "-" << (-Max - 1);
1518 Error(IDLoc, ES.str().c_str());
1522 return Parser.printError(IDLoc, ES.str().c_str());
15191523 }
15201524
15211525 int HexagonAsmParser::processInstruction(MCInst &Inst,
923923 assert(N == 1 && "Invalid number of operands!");
924924 Inst.addOperand(MCOperand::createReg(getFGR32Reg()));
925925 // FIXME: We ought to do this for -integrated-as without -via-file-asm too.
926 // FIXME: This should propagate failure up to parseStatement.
926927 if (!AsmParser.useOddSPReg() && RegIdx.Index & 1)
927 AsmParser.Error(StartLoc, "-mno-odd-spreg prohibits the use of odd FPU "
928 "registers");
928 AsmParser.getParser().printError(
929 StartLoc, "-mno-odd-spreg prohibits the use of odd FPU "
930 "registers");
929931 }
930932
931933 void addFGRH32AsmRegOperands(MCInst &Inst, unsigned N) const {
18591861 if (MemOffset < -32768 || MemOffset > 32767) {
18601862 // Offset can't exceed 16bit value.
18611863 expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), true);
1862 return false;
1864 return getParser().hasPendingError();
18631865 }
18641866 } else if (Op.isExpr()) {
18651867 const MCExpr *Expr = Op.getExpr();
18691871 if (SR->getKind() == MCSymbolRefExpr::VK_None) {
18701872 // Expand symbol.
18711873 expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), false);
1872 return false;
1874 return getParser().hasPendingError();
18731875 }
18741876 } else if (!isEvaluated(Expr)) {
18751877 expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), false);
1876 return false;
1878 return getParser().hasPendingError();
18771879 }
18781880 }
18791881 }
24652467 Error(IDLoc, "la used to load 64-bit address");
24662468 // Continue as if we had 'dla' instead.
24672469 Is32BitAddress = false;
2470 return true;
24682471 }
24692472
24702473 // dla requires 64-bit addresses.
26912694 Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM);
26922695 } else {
26932696 if (!isInt<17>(Offset.getImm()))
2694 Error(IDLoc, "branch target out of range");
2697 return Error(IDLoc, "branch target out of range");
26952698 if (OffsetToAlignment(Offset.getImm(), 1LL << 1))
2696 Error(IDLoc, "branch to misaligned address");
2699 return Error(IDLoc, "branch to misaligned address");
26972700 Inst.clear();
26982701 Inst.setOpcode(Mips::BEQ_MM);
26992702 Inst.addOperand(MCOperand::createReg(Mips::ZERO));
33013304 MipsTargetStreamer &TOut = getTargetStreamer();
33023305
33033306 if (hasMips32r6() || hasMips64r6()) {
3304 Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
3305 return false;
3307 return Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
33063308 }
33073309
33083310 warnIfNoMacro(IDLoc);
33793381 const MCSubtargetInfo *STI) {
33803382 MipsTargetStreamer &TOut = getTargetStreamer();
33813383
3382 if (hasMips32r6() || hasMips64r6()) {
3383 Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
3384 return false;
3385 }
3384 if (hasMips32r6() || hasMips64r6())
3385 return Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
33863386
33873387 const MCOperand &DstRegOp = Inst.getOperand(0);
33883388 assert(DstRegOp.isReg() && "expected register operand kind");
48164816 Parser.Lex();
48174817 if (parseOperand(Operands, Name)) {
48184818 SMLoc Loc = getLexer().getLoc();
4819 Parser.eatToEndOfStatement();
48204819 return Error(Loc, "unexpected token in argument list");
48214820 }
48224821 if (Parser.getTok().isNot(AsmToken::RParen)) {
48234822 SMLoc Loc = getLexer().getLoc();
4824 Parser.eatToEndOfStatement();
48254823 return Error(Loc, "unexpected token, expected ')'");
48264824 }
48274825 Operands.push_back(
48464844 Parser.Lex();
48474845 if (parseOperand(Operands, Name)) {
48484846 SMLoc Loc = getLexer().getLoc();
4849 Parser.eatToEndOfStatement();
48504847 return Error(Loc, "unexpected token in argument list");
48514848 }
48524849 if (Parser.getTok().isNot(AsmToken::RBrac)) {
48534850 SMLoc Loc = getLexer().getLoc();
4854 Parser.eatToEndOfStatement();
48554851 return Error(Loc, "unexpected token, expected ']'");
48564852 }
48574853 Operands.push_back(
48714867
48724868 // Check if we have valid mnemonic
48734869 if (!mnemonicIsValid(Name, 0)) {
4874 Parser.eatToEndOfStatement();
48754870 return Error(NameLoc, "unknown instruction");
48764871 }
48774872 // First operand in MCInst is instruction mnemonic.
48824877 // Read the first operand.
48834878 if (parseOperand(Operands, Name)) {
48844879 SMLoc Loc = getLexer().getLoc();
4885 Parser.eatToEndOfStatement();
48864880 return Error(Loc, "unexpected token in argument list");
48874881 }
48884882 if (getLexer().is(AsmToken::LBrac) && parseBracketSuffix(Name, Operands))
48944888 // Parse and remember the operand.
48954889 if (parseOperand(Operands, Name)) {
48964890 SMLoc Loc = getLexer().getLoc();
4897 Parser.eatToEndOfStatement();
48984891 return Error(Loc, "unexpected token in argument list");
48994892 }
49004893 // Parse bracket and parenthesis suffixes before we iterate
49084901 }
49094902 if (getLexer().isNot(AsmToken::EndOfStatement)) {
49104903 SMLoc Loc = getLexer().getLoc();
4911 Parser.eatToEndOfStatement();
49124904 return Error(Loc, "unexpected token in argument list");
49134905 }
49144906 Parser.Lex(); // Consume the EndOfStatement.
49184910 // FIXME: Given that these have the same name, these should both be
49194911 // consistent on affecting the Parser.
49204912 bool MipsAsmParser::reportParseError(Twine ErrorMsg) {
4921 MCAsmParser &Parser = getParser();
49224913 SMLoc Loc = getLexer().getLoc();
4923 Parser.eatToEndOfStatement();
49244914 return Error(Loc, ErrorMsg);
49254915 }
49264916
54215411 MCAsmParser &Parser = getParser();
54225412 if (getLexer().isNot(AsmToken::Comma)) {
54235413 SMLoc Loc = getLexer().getLoc();
5424 Parser.eatToEndOfStatement();
54255414 return Error(Loc, ErrorStr);
54265415 }
54275416
55305519 MipsOperand &FuncRegOpnd = static_cast(*TmpReg[0]);
55315520 if (!FuncRegOpnd.isGPRAsmReg()) {
55325521 reportParseError(FuncRegOpnd.getStartLoc(), "invalid register");
5533 Parser.eatToEndOfStatement();
55345522 return false;
55355523 }
55365524
55495537 if (Parser.parseExpression(OffsetExpr) ||
55505538 !OffsetExpr->evaluateAsAbsolute(OffsetVal)) {
55515539 reportParseError(ExprLoc, "expected save register or stack offset");
5552 Parser.eatToEndOfStatement();
55535540 return false;
55545541 }
55555542
55595546 MipsOperand &SaveOpnd = static_cast(*TmpReg[0]);
55605547 if (!SaveOpnd.isGPRAsmReg()) {
55615548 reportParseError(SaveOpnd.getStartLoc(), "invalid register");
5562 Parser.eatToEndOfStatement();
55635549 return false;
55645550 }
55655551 Save = SaveOpnd.getGPR32Reg();
58475833 AsmToken Tok = Parser.getTok();
58485834 // At the moment only identifiers are supported.
58495835 if (Tok.isNot(AsmToken::Identifier)) {
5850 Error(Parser.getTok().getLoc(), "unexpected token, expected identifier");
5851 Parser.eatToEndOfStatement();
5852 return false;
5836 return Error(Parser.getTok().getLoc(),
5837 "unexpected token, expected identifier");
58535838 }
58545839
58555840 StringRef Option = Tok.getIdentifier();
58615846 getTargetStreamer().emitDirectiveOptionPic0();
58625847 Parser.Lex();
58635848 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
5864 Error(Parser.getTok().getLoc(),
5865 "unexpected token, expected end of statement");
5866 Parser.eatToEndOfStatement();
5849 return Error(Parser.getTok().getLoc(),
5850 "unexpected token, expected end of statement");
58675851 }
58685852 return false;
58695853 }
58755859 getTargetStreamer().emitDirectiveOptionPic2();
58765860 Parser.Lex();
58775861 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
5878 Error(Parser.getTok().getLoc(),
5879 "unexpected token, expected end of statement");
5880 Parser.eatToEndOfStatement();
5862 return Error(Parser.getTok().getLoc(),
5863 "unexpected token, expected end of statement");
58815864 }
58825865 return false;
58835866 }
59685951 return false; // parseDirectiveModule has finished successfully.
59695952 } else if (Option == "nooddspreg") {
59705953 if (!isABI_O32()) {
5971 Error(L, "'.module nooddspreg' requires the O32 ABI");
5972 return false;
5954 return Error(L, "'.module nooddspreg' requires the O32 ABI");
59735955 }
59745956
59755957 setModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
64306412 if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
64316413 Error(Parser.getTok().getLoc(),
64326414 "unexpected token, expected end of statement");
6433 // Clear line
6434 Parser.eatToEndOfStatement();
64356415 }
64366416 return false;
64376417 }
8383 return getSTI().getTargetTriple().getArch() == Triple::sparcv9;
8484 }
8585
86 void expandSET(MCInst &Inst, SMLoc IDLoc,
86 bool expandSET(MCInst &Inst, SMLoc IDLoc,
8787 SmallVectorImpl &Instructions);
8888
8989 public:
465465
466466 } // end namespace
467467
468 void SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
468 bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
469469 SmallVectorImpl &Instructions) {
470470 MCOperand MCRegOp = Inst.getOperand(0);
471471 MCOperand MCValOp = Inst.getOperand(1);
478478
479479 // Allow either a signed or unsigned 32-bit immediate.
480480 if (RawImmValue < -2147483648LL || RawImmValue > 4294967295LL) {
481 Error(IDLoc, "set: argument must be between -2147483648 and 4294967295");
482 return;
481 return Error(IDLoc,
482 "set: argument must be between -2147483648 and 4294967295");
483483 }
484484
485485 // If the value was expressed as a large unsigned number, that's ok.
536536 TmpInst.addOperand(MCOperand::createExpr(Expr));
537537 Instructions.push_back(TmpInst);
538538 }
539 return false;
539540 }
540541
541542 bool SparcAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
555556 Instructions.push_back(Inst);
556557 break;
557558 case SP::SET:
558 expandSET(Inst, IDLoc, Instructions);
559 if (expandSET(Inst, IDLoc, Instructions))
560 return true;
559561 break;
560562 }
561563
625627 if (getLexer().is(AsmToken::Comma)) {
626628 if (parseBranchModifiers(Operands) != MatchOperand_Success) {
627629 SMLoc Loc = getLexer().getLoc();
628 Parser.eatToEndOfStatement();
629630 return Error(Loc, "unexpected token");
630631 }
631632 }
632633 if (parseOperand(Operands, Name) != MatchOperand_Success) {
633634 SMLoc Loc = getLexer().getLoc();
634 Parser.eatToEndOfStatement();
635635 return Error(Loc, "unexpected token");
636636 }
637637
644644 // Parse and remember the operand.
645645 if (parseOperand(Operands, Name) != MatchOperand_Success) {
646646 SMLoc Loc = getLexer().getLoc();
647 Parser.eatToEndOfStatement();
648647 return Error(Loc, "unexpected token");
649648 }
650649 }
651650 }
652651 if (getLexer().isNot(AsmToken::EndOfStatement)) {
653652 SMLoc Loc = getLexer().getLoc();
654 Parser.eatToEndOfStatement();
655653 return Error(Loc, "unexpected token");
656654 }
657655 Parser.Lex(); // Consume the EndOfStatement.
958958 if (getLexer().isNot(AsmToken::EndOfStatement)) {
959959 // Read the first operand.
960960 if (parseOperand(Operands, Name)) {
961 Parser.eatToEndOfStatement();
962961 return true;
963962 }
964963
966965 while (getLexer().is(AsmToken::Comma)) {
967966 Parser.Lex();
968967 if (parseOperand(Operands, Name)) {
969 Parser.eatToEndOfStatement();
970968 return true;
971969 }
972970 }
973971 if (getLexer().isNot(AsmToken::EndOfStatement)) {
974972 SMLoc Loc = getLexer().getLoc();
975 Parser.eatToEndOfStatement();
976973 return Error(Loc, "unexpected token in argument list");
977974 }
978975 }
658658 }
659659 };
660660
661 bool Error(SMLoc L, const Twine &Msg,
662 ArrayRef Ranges = None,
661 bool Error(SMLoc L, const Twine &Msg, SMRange Range = None,
663662 bool MatchingInlineAsm = false) {
664663 MCAsmParser &Parser = getParser();
665 if (MatchingInlineAsm) return true;
666 return Parser.Error(L, Msg, Ranges);
667 }
668
669 bool ErrorAndEatStatement(SMLoc L, const Twine &Msg,
670 ArrayRef Ranges = None,
671 bool MatchingInlineAsm = false) {
672 MCAsmParser &Parser = getParser();
673 Parser.eatToEndOfStatement();
674 return Error(L, Msg, Ranges, MatchingInlineAsm);
664 if (MatchingInlineAsm) {
665 Parser.eatToEndOfStatement();
666 return false;
667 }
668 return Parser.Error(L, Msg, Range);
675669 }
676670
677671 std::nullptr_t ErrorOperand(SMLoc Loc, StringRef Msg) {
18941888 if(getLexer().is(AsmToken::Integer)) {
18951889 // Parse memory broadcasting ({1to}).
18961890 if (getLexer().getTok().getIntVal() != 1)
1897 return !ErrorAndEatStatement(getLexer().getLoc(),
1898 "Expected 1to at this point");
1891 return !TokError("Expected 1to at this point");
18991892 Parser.Lex(); // Eat "1" of 1to8
19001893 if (!getLexer().is(AsmToken::Identifier) ||
19011894 !getLexer().getTok().getIdentifier().startswith("to"))
1902 return !ErrorAndEatStatement(getLexer().getLoc(),
1903 "Expected 1to at this point");
1895 return !TokError("Expected 1to at this point");
19041896 // Recognize only reasonable suffixes.
19051897 const char *BroadcastPrimitive =
19061898 StringSwitch(getLexer().getTok().getIdentifier())
19101902 .Case("to16", "{1to16}")
19111903 .Default(nullptr);
19121904 if (!BroadcastPrimitive)
1913 return !ErrorAndEatStatement(getLexer().getLoc(),
1914 "Invalid memory broadcast primitive.");
1905 return !TokError("Invalid memory broadcast primitive.");
19151906 Parser.Lex(); // Eat "toN" of 1toN
19161907 if (!getLexer().is(AsmToken::RCurly))
1917 return !ErrorAndEatStatement(getLexer().getLoc(),
1918 "Expected } at this point");
1908 return !TokError("Expected } at this point");
19191909 Parser.Lex(); // Eat "}"
19201910 Operands.push_back(X86Operand::CreateToken(BroadcastPrimitive,
19211911 consumedToken));
19281918 if (std::unique_ptr Op = ParseOperand()) {
19291919 Operands.push_back(std::move(Op));
19301920 if (!getLexer().is(AsmToken::RCurly))
1931 return !ErrorAndEatStatement(getLexer().getLoc(),
1932 "Expected } at this point");
1921 return !TokError("Expected } at this point");
19331922 Operands.push_back(X86Operand::CreateToken("}", consumeToken()));
19341923
19351924 // Parse "zeroing non-masked" semantic {z}
19371926 Operands.push_back(X86Operand::CreateToken("{z}", consumeToken()));
19381927 if (!getLexer().is(AsmToken::Identifier) ||
19391928 getLexer().getTok().getIdentifier() != "z")
1940 return !ErrorAndEatStatement(getLexer().getLoc(),
1941 "Expected z at this point");
1929 return !TokError("Expected z at this point");
19421930 Parser.Lex(); // Eat the z
19431931 if (!getLexer().is(AsmToken::RCurly))
1944 return !ErrorAndEatStatement(getLexer().getLoc(),
1945 "Expected } at this point");
1932 return !TokError("Expected } at this point");
19461933 Parser.Lex(); // Eat the }
19471934 }
19481935 }
22862273 if (!HandleAVX512Operand(Operands, *Operands.back()))
22872274 return true;
22882275 } else {
2289 Parser.eatToEndOfStatement();
22902276 return true;
22912277 }
22922278 // check for comma and eat it
23022288 isParsingIntelSyntax() && isParsingInlineAsm() &&
23032289 (getLexer().is(AsmToken::LCurly) || getLexer().is(AsmToken::RCurly));
23042290 if (getLexer().isNot(AsmToken::EndOfStatement) && !CurlyAsEndOfStatement)
2305 return ErrorAndEatStatement(getLexer().getLoc(),
2306 "unexpected token in argument list");
2291 return TokError("unexpected token in argument list");
23072292 }
23082293
23092294 // Consume the EndOfStatement or the prefix separator Slash
25692554 bool X86AsmParser::ErrorMissingFeature(SMLoc IDLoc, uint64_t ErrorInfo,
25702555 bool MatchingInlineAsm) {
25712556 assert(ErrorInfo && "Unknown missing feature!");
2572 ArrayRef EmptyRanges = None;
25732557 SmallString<126> Msg;
25742558 raw_svector_ostream OS(Msg);
25752559 OS << "instruction requires:";
25792563 OS << ' ' << getSubtargetFeatureName(ErrorInfo & Mask);
25802564 Mask <<= 1;
25812565 }
2582 return Error(IDLoc, OS.str(), EmptyRanges, MatchingInlineAsm);
2566 return Error(IDLoc, OS.str(), SMRange(), MatchingInlineAsm);
25832567 }
25842568
25852569 bool X86AsmParser::MatchAndEmitATTInstruction(SMLoc IDLoc, unsigned &Opcode,
25902574 assert(!Operands.empty() && "Unexpect empty operand list!");
25912575 X86Operand &Op = static_cast(*Operands[0]);
25922576 assert(Op.isToken() && "Leading operand should always be a mnemonic!");
2593 ArrayRef EmptyRanges = None;
2577 SMRange EmptyRange = None;
25942578
25952579 // First, handle aliases that expand to multiple instructions.
25962580 MatchFPUWaitAlias(IDLoc, Op, Operands, Out, MatchingInlineAsm);
26972681 OS << "'" << Base << MatchChars[i] << "'";
26982682 }
26992683 OS << ")";
2700 Error(IDLoc, OS.str(), EmptyRanges, MatchingInlineAsm);
2684 Error(IDLoc, OS.str(), EmptyRange, MatchingInlineAsm);
27012685 return true;
27022686 }
27032687
27072691 // mnemonic was invalid.
27082692 if (std::count(std::begin(Match), std::end(Match), Match_MnemonicFail) == 4) {
27092693 if (!WasOriginallyInvalidOperand) {
2710 SMRange OpRange = Op.getLocRange();
2711 ArrayRef Ranges = MatchingInlineAsm ? EmptyRanges : OpRange;
27122694 return Error(IDLoc, "invalid instruction mnemonic '" + Base + "'",
2713 Ranges, MatchingInlineAsm);
2695 Op.getLocRange(), MatchingInlineAsm);
27142696 }
27152697
27162698 // Recover location info for the operand if we know which was the problem.
27172699 if (ErrorInfo != ~0ULL) {
27182700 if (ErrorInfo >= Operands.size())
2719 return Error(IDLoc, "too few operands for instruction",
2720 EmptyRanges, MatchingInlineAsm);
2701 return Error(IDLoc, "too few operands for instruction", EmptyRange,
2702 MatchingInlineAsm);
27212703
27222704 X86Operand &Operand = (X86Operand &)*Operands[ErrorInfo];
27232705 if (Operand.getStartLoc().isValid()) {
27272709 }
27282710 }
27292711
2730 return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
2712 return Error(IDLoc, "invalid operand for instruction", EmptyRange,
27312713 MatchingInlineAsm);
27322714 }
27332715
27442726 // operand failure.
27452727 if (std::count(std::begin(Match), std::end(Match),
27462728 Match_InvalidOperand) == 1) {
2747 return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
2729 return Error(IDLoc, "invalid operand for instruction", EmptyRange,
27482730 MatchingInlineAsm);
27492731 }
27502732
27512733 // If all of these were an outright failure, report it in a useless way.
27522734 Error(IDLoc, "unknown use of instruction mnemonic without a size suffix",
2753 EmptyRanges, MatchingInlineAsm);
2735 EmptyRange, MatchingInlineAsm);
27542736 return true;
27552737 }
27562738
27632745 X86Operand &Op = static_cast(*Operands[0]);
27642746 assert(Op.isToken() && "Leading operand should always be a mnemonic!");
27652747 StringRef Mnemonic = Op.getToken();
2766 ArrayRef EmptyRanges = None;
2748 SMRange EmptyRange = None;
27672749
27682750 // First, handle aliases that expand to multiple instructions.
27692751 MatchFPUWaitAlias(IDLoc, Op, Operands, Out, MatchingInlineAsm);
28352817
28362818 // If it's a bad mnemonic, all results will be the same.
28372819 if (Match.back() == Match_MnemonicFail) {
2838 ArrayRef Ranges =
2839 MatchingInlineAsm ? EmptyRanges : Op.getLocRange();
28402820 return Error(IDLoc, "invalid instruction mnemonic '" + Mnemonic + "'",
2841 Ranges, MatchingInlineAsm);
2821 Op.getLocRange(), MatchingInlineAsm);
28422822 }
28432823
28442824 // If exactly one matched, then we treat that as a successful match (and the
28612841 } else if (NumSuccessfulMatches > 1) {
28622842 assert(UnsizedMemOp &&
28632843 "multiple matches only possible with unsized memory operands");
2864 SMRange OpRange = UnsizedMemOp->getLocRange();
2865 ArrayRef Ranges = MatchingInlineAsm ? EmptyRanges : OpRange;
28662844 return Error(UnsizedMemOp->getStartLoc(),
28672845 "ambiguous operand size for instruction '" + Mnemonic + "\'",
2868 Ranges, MatchingInlineAsm);
2846 UnsizedMemOp->getLocRange(), MatchingInlineAsm);
28692847 }
28702848
28712849 // If one instruction matched with a missing feature, report this as a
28812859 // operand failure.
28822860 if (std::count(std::begin(Match), std::end(Match),
28832861 Match_InvalidOperand) == 1) {
2884 return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
2862 return Error(IDLoc, "invalid operand for instruction", EmptyRange,
28852863 MatchingInlineAsm);
28862864 }
28872865
28882866 // If all of these were an outright failure, report it in a useless way.
2889 return Error(IDLoc, "unknown instruction mnemonic", EmptyRanges,
2867 return Error(IDLoc, "unknown instruction mnemonic", EmptyRange,
28902868 MatchingInlineAsm);
28912869 }
28922870
2020 // CHECK: sqrdmlsh v0.8h, v1.8h, v2.8h // encoding: [0x20,0x8c,0x42,0x6e]
2121
2222 sqrdmlah v0.2h, v1.2h, v2.2h
23 // CHECK-ERROR: [[@LINE-1]]:12: error: invalid operand for instruction
2324 sqrdmlsh v0.2h, v1.2h, v2.2h
25 // CHECK-ERROR: [[@LINE-1]]:12: error: invalid operand for instruction
2426 sqrdmlah v0.8s, v1.8s, v2.8s
27 // CHECK-ERROR: [[@LINE-1]]:12: error: invalid vector kind qualifier
28 // CHECK-ERROR: [[@LINE-2]]:19: error: invalid vector kind qualifier
29 // CHECK-ERROR: [[@LINE-3]]:26: error: invalid vector kind qualifier
2530 sqrdmlsh v0.8s, v1.8s, v2.8s
31 // CHECK-ERROR: [[@LINE-1]]:12: error: invalid vector kind qualifier
32 // CHECK-ERROR: [[@LINE-2]]:19: error: invalid vector kind qualifier
33 // CHECK-ERROR: [[@LINE-3]]:26: error: invalid vector kind qualifier
2634 sqrdmlah v0.2s, v1.4h, v2.8h
35 // CHECK-ERROR: [[@LINE-1]]:19: error: invalid operand for instruction
2736 sqrdmlsh v0.4s, v1.8h, v2.2s
28 // CHECK-ERROR: error: invalid operand for instruction
29 // CHECK-ERROR: sqrdmlah v0.2h, v1.2h, v2.2h
30 // CHECK-ERROR: ^
31 // CHECK-ERROR: error: invalid operand for instruction
32 // CHECK-ERROR: sqrdmlsh v0.2h, v1.2h, v2.2h
33 // CHECK-ERROR: ^
34 // CHECK-ERROR: error: invalid vector kind qualifier
35 // CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s
36 // CHECK-ERROR: ^
37 // CHECK-ERROR: error: invalid vector kind qualifier
38 // CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s
39 // CHECK-ERROR: ^
40 // CHECK-ERROR: error: invalid vector kind qualifier
41 // CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s
42 // CHECK-ERROR: ^
43 // CHECK-ERROR: error: invalid operand for instruction
44 // CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s
45 // CHECK-ERROR: ^
46 // CHECK-ERROR: error: invalid vector kind qualifier
47 // CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s
48 // CHECK-ERROR: ^
49 // CHECK-ERROR: error: invalid vector kind qualifier
50 // CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s
51 // CHECK-ERROR: ^
52 // CHECK-ERROR: error: invalid vector kind qualifier
53 // CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s
54 // CHECK-ERROR: ^
55 // CHECK-ERROR: error: invalid operand for instruction
56 // CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s
57 // CHECK-ERROR: ^
58 // CHECK-ERROR: error: invalid operand for instruction
59 // CHECK-ERROR: sqrdmlah v0.2s, v1.4h, v2.8h
60 // CHECK-ERROR: ^
61 // CHECK-ERROR: error: invalid operand for instruction
62 // CHECK-ERROR: sqrdmlsh v0.4s, v1.8h, v2.2s
63 // CHECK-ERROR: ^
37 // CHECK-ERROR: [[@LINE-1]]:19: error: invalid operand for instruction
6438
6539 //AdvSIMD RDMA scalar
6640 sqrdmlah h0, h1, h2
1616
1717 .inst 0x5e104020 0x5e104020
1818 // CHECK-ERROR: unexpected token in directive
19
20 // CHECK-ERROR-NOT: unexpected token at start of statement
13421342 // CHECK-ERROR: error: invalid operand for instruction
13431343 // CHECK-ERROR: ushll v1.16b, v25.16b, #6
13441344 // CHECK-ERROR: ^
1345 // CHECK-ERROR: error: invalid operand for instruction
1345 // CHECK-ERROR: error: invalid vector kind qualifier
13461346 // CHECK-ERROR: sshll2 v0.2d, v3.8s, #15
13471347 // CHECK-ERROR: ^
13481348 // CHECK-ERROR: error: invalid operand for instruction
21132113 saddl2 v0.8h, v1.16h, v2.16b
21142114 saddl2 v0.2d, v1.4d, v2.4s
21152115
2116 // CHECK-ERROR: error: invalid operand for instruction
2116 // CHECK-ERROR: error: invalid vector kind qualifier
21172117 // CHECK-ERROR: saddl2 v0.4s, v1.8s, v2.8h
21182118 // CHECK-ERROR: ^
2119 // CHECK-ERROR: error: invalid operand for instruction
2119 // CHECK-ERROR: error: invalid vector kind qualifier
21202120 // CHECK-ERROR: saddl2 v0.8h, v1.16h, v2.16b
21212121 // CHECK-ERROR: ^
2122 // CHECK-ERROR: error: invalid operand for instruction
2122 // CHECK-ERROR: error: invalid vector kind qualifier
21232123 // CHECK-ERROR: saddl2 v0.2d, v1.4d, v2.4s
21242124 // CHECK-ERROR: ^
21252125
21412141 uaddl2 v0.4s, v1.8s, v2.8h
21422142 uaddl2 v0.2d, v1.4d, v2.4s
21432143
2144 // CHECK-ERROR: error: invalid operand for instruction
2145 // CHECK-ERROR: uaddl2 v0.8h, v1.16h, v2.16b
2146 // CHECK-ERROR: ^
2147 // CHECK-ERROR: error: invalid operand for instruction
2148 // CHECK-ERROR: uaddl2 v0.4s, v1.8s, v2.8h
2149 // CHECK-ERROR: ^
2150 // CHECK-ERROR: error: invalid operand for instruction
2151 // CHECK-ERROR: uaddl2 v0.2d, v1.4d, v2.4s
2152 // CHECK-ERROR: ^
2144 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
2145 // CHECK-ERROR-NEXT: uaddl2 v0.8h, v1.16h, v2.16b
2146 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
2147 // CHECK-ERROR-NEXT: uaddl2 v0.4s, v1.8s, v2.8h
2148 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
2149 // CHECK-ERROR-NEXT: uaddl2 v0.2d, v1.4d, v2.4s
21532150
21542151 ssubl v0.8h, v1.8h, v2.8b
21552152 ssubl v0.4s, v1.4s, v2.4h
21562153 ssubl v0.2d, v1.2d, v2.2s
21572154
2158 // CHECK-ERROR: error: invalid operand for instruction
2159 // CHECK-ERROR: ssubl v0.8h, v1.8h, v2.8b
2160 // CHECK-ERROR: ^
2155 // CHECK-ERROR: [[@LINE-4]]:22: error: invalid operand for instruction
2156 // CHECK-ERROR-NEXT: ssubl v0.8h, v1.8h, v2.8b
21612157 // CHECK-ERROR: error: invalid operand for instruction
21622158 // CHECK-ERROR: ssubl v0.4s, v1.4s, v2.4h
21632159 // CHECK-ERROR: ^
21692165 ssubl2 v0.4s, v1.8s, v2.8h
21702166 ssubl2 v0.2d, v1.4d, v2.4s
21712167
2172 // CHECK-ERROR: error: invalid operand for instruction
2168 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
21732169 // CHECK-ERROR: ssubl2 v0.8h, v1.16h, v2.16b
21742170 // CHECK-ERROR: ^
2175 // CHECK-ERROR: error: invalid operand for instruction
2171 // CHECK-ERROR: error: invalid vector kind qualifier
21762172 // CHECK-ERROR: ssubl2 v0.4s, v1.8s, v2.8h
21772173 // CHECK-ERROR: ^
2178 // CHECK-ERROR: error: invalid operand for instruction
2174 // CHECK-ERROR: error: invalid vector kind qualifier
21792175 // CHECK-ERROR: ssubl2 v0.2d, v1.4d, v2.4s
21802176 // CHECK-ERROR: ^
21812177
21972193 usubl2 v0.4s, v1.8s, v2.8h
21982194 usubl2 v0.2d, v1.4d, v2.4s
21992195
2200 // CHECK-ERROR: error: invalid operand for instruction
2196 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
22012197 // CHECK-ERROR: usubl2 v0.8h, v1.16h, v2.16b
2202 // CHECK-ERROR: ^
2203 // CHECK-ERROR: error: invalid operand for instruction
2198 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
22042199 // CHECK-ERROR: usubl2 v0.4s, v1.8s, v2.8h
2205 // CHECK-ERROR: ^
2206 // CHECK-ERROR: error: invalid operand for instruction
2200 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
22072201 // CHECK-ERROR: usubl2 v0.2d, v1.4d, v2.4s
2208 // CHECK-ERROR: ^
22092202
22102203 sabal v0.8h, v1.8h, v2.8b
22112204 sabal v0.4s, v1.4s, v2.4h
22252218 sabal2 v0.4s, v1.8s, v2.8h
22262219 sabal2 v0.2d, v1.4d, v2.4s
22272220
2228 // CHECK-ERROR: error: invalid operand for instruction
2221 // CHECK-ERROR: error: invalid vector kind qualifier
22292222 // CHECK-ERROR: sabal2 v0.8h, v1.16h, v2.16b
22302223 // CHECK-ERROR: ^
2231 // CHECK-ERROR: error: invalid operand for instruction
2224 // CHECK-ERROR: error: invalid vector kind qualifier
22322225 // CHECK-ERROR: sabal2 v0.4s, v1.8s, v2.8h
22332226 // CHECK-ERROR: ^
2234 // CHECK-ERROR: error: invalid operand for instruction
2227 // CHECK-ERROR: error: invalid vector kind qualifier
22352228 // CHECK-ERROR: sabal2 v0.2d, v1.4d, v2.4s
22362229 // CHECK-ERROR: ^
22372230
22532246 uabal2 v0.4s, v1.8s, v2.8h
22542247 uabal2 v0.2d, v1.4d, v2.4s
22552248
2256 // CHECK-ERROR: error: invalid operand for instruction
2249 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
22572250 // CHECK-ERROR: uabal2 v0.8h, v1.16h, v2.16b
2258 // CHECK-ERROR: ^
2259 // CHECK-ERROR: error: invalid operand for instruction
2251 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
22602252 // CHECK-ERROR: uabal2 v0.4s, v1.8s, v2.8h
2261 // CHECK-ERROR: ^
2262 // CHECK-ERROR: error: invalid operand for instruction
2253 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
22632254 // CHECK-ERROR: uabal2 v0.2d, v1.4d, v2.4s
2264 // CHECK-ERROR: ^
22652255
22662256 sabdl v0.8h, v1.8h, v2.8b
22672257 sabdl v0.4s, v1.4s, v2.4h
22812271 sabdl2 v0.4s, v1.8s, v2.8h
22822272 sabdl2 v0.2d, v1.4d, v2.4s
22832273
2284 // CHECK-ERROR: error: invalid operand for instruction
2274 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
22852275 // CHECK-ERROR: sabdl2 v0.8h, v1.16h, v2.16b
2286 // CHECK-ERROR: ^
2287 // CHECK-ERROR: error: invalid operand for instruction
2276 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
22882277 // CHECK-ERROR: sabdl2 v0.4s, v1.8s, v2.8h
2289 // CHECK-ERROR: ^
2290 // CHECK-ERROR: error: invalid operand for instruction
2278 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
22912279 // CHECK-ERROR: sabdl2 v0.2d, v1.4d, v2.4s
2292 // CHECK-ERROR: ^
22932280
22942281 uabdl v0.8h, v1.8h, v2.8b
22952282 uabdl v0.4s, v1.4s, v2.4h
23092296 uabdl2 v0.4s, v1.8s, v2.8h
23102297 uabdl2 v0.2d, v1.4d, v2.4s
23112298
2312 // CHECK-ERROR: error: invalid operand for instruction
2299 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
23132300 // CHECK-ERROR: uabdl2 v0.8h, v1.16h, v2.16b
2314 // CHECK-ERROR: ^
2315 // CHECK-ERROR: error: invalid operand for instruction
2301 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
23162302 // CHECK-ERROR: uabdl2 v0.4s, v1.8s, v2.8h
2317 // CHECK-ERROR: ^
2318 // CHECK-ERROR: error: invalid operand for instruction
2303 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
23192304 // CHECK-ERROR: uabdl2 v0.2d, v1.4d, v2.4s
2320 // CHECK-ERROR: ^
23212305
23222306 smlal v0.8h, v1.8h, v2.8b
23232307 smlal v0.4s, v1.4s, v2.4h
23372321 smlal2 v0.4s, v1.8s, v2.8h
23382322 smlal2 v0.2d, v1.4d, v2.4s
23392323
2340 // CHECK-ERROR: error: invalid operand for instruction
2324 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
23412325 // CHECK-ERROR: smlal2 v0.8h, v1.16h, v2.16b
2342 // CHECK-ERROR: ^
2343 // CHECK-ERROR: error: invalid operand for instruction
2326 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
23442327 // CHECK-ERROR: smlal2 v0.4s, v1.8s, v2.8h
2345 // CHECK-ERROR: ^
2346 // CHECK-ERROR: error: invalid operand for instruction
2328 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
23472329 // CHECK-ERROR: smlal2 v0.2d, v1.4d, v2.4s
2348 // CHECK-ERROR: ^
23492330
23502331 umlal v0.8h, v1.8h, v2.8b
23512332 umlal v0.4s, v1.4s, v2.4h
23522333 umlal v0.2d, v1.2d, v2.2s
23532334
2354 // CHECK-ERROR: error: invalid operand for instruction
2335 // CHECK-ERROR: [[@LINE-4]]:22: error: invalid operand for instruction
23552336 // CHECK-ERROR: umlal v0.8h, v1.8h, v2.8b
2356 // CHECK-ERROR: ^
2357 // CHECK-ERROR: error: invalid operand for instruction
2337 // CHECK-ERROR: [[@LINE-5]]:22: error: invalid operand for instruction
23582338 // CHECK-ERROR: umlal v0.4s, v1.4s, v2.4h
2359 // CHECK-ERROR: ^
2360 // CHECK-ERROR: error: invalid operand for instruction
2339 // CHECK-ERROR: [[@LINE-6]]:22: error: invalid operand for instruction
23612340 // CHECK-ERROR: umlal v0.2d, v1.2d, v2.2s
2362 // CHECK-ERROR: ^
23632341
23642342 umlal2 v0.8h, v1.16h, v2.16b
23652343 umlal2 v0.4s, v1.8s, v2.8h
23662344 umlal2 v0.2d, v1.4d, v2.4s
23672345
2368 // CHECK-ERROR: error: invalid operand for instruction
2346 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
23692347 // CHECK-ERROR: umlal2 v0.8h, v1.16h, v2.16b
2370 // CHECK-ERROR: ^
2371 // CHECK-ERROR: error: invalid operand for instruction
2348 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
23722349 // CHECK-ERROR: umlal2 v0.4s, v1.8s, v2.8h
2373 // CHECK-ERROR: ^
2374 // CHECK-ERROR: error: invalid operand for instruction
2350 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
23752351 // CHECK-ERROR: umlal2 v0.2d, v1.4d, v2.4s
2376 // CHECK-ERROR: ^
23772352
23782353 smlsl v0.8h, v1.8h, v2.8b
23792354 smlsl v0.4s, v1.4s, v2.4h
23802355 smlsl v0.2d, v1.2d, v2.2s
23812356
2382 // CHECK-ERROR: error: invalid operand for instruction
2357 // CHECK-ERROR: [[@LINE-4]]:22: error: invalid operand for instruction
23832358 // CHECK-ERROR: smlsl v0.8h, v1.8h, v2.8b
2384 // CHECK-ERROR: ^
2385 // CHECK-ERROR: error: invalid operand for instruction
2359 // CHECK-ERROR: [[@LINE-5]]:22: error: invalid operand for instruction
23862360 // CHECK-ERROR: smlsl v0.4s, v1.4s, v2.4h
2387 // CHECK-ERROR: ^
2388 // CHECK-ERROR: error: invalid operand for instruction
2361 // CHECK-ERROR: [[@LINE-6]]:22: error: invalid operand for instruction
23892362 // CHECK-ERROR: smlsl v0.2d, v1.2d, v2.2s
2390 // CHECK-ERROR: ^
23912363
23922364 smlsl2 v0.8h, v1.16h, v2.16b
23932365 smlsl2 v0.4s, v1.8s, v2.8h
23942366 smlsl2 v0.2d, v1.4d, v2.4s
23952367
2396 // CHECK-ERROR: error: invalid operand for instruction
2368 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
23972369 // CHECK-ERROR: smlsl2 v0.8h, v1.16h, v2.16b
2398 // CHECK-ERROR: ^
2399 // CHECK-ERROR: error: invalid operand for instruction
2370 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
24002371 // CHECK-ERROR: smlsl2 v0.4s, v1.8s, v2.8h
2401 // CHECK-ERROR: ^
2402 // CHECK-ERROR: error: invalid operand for instruction
2372 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
24032373 // CHECK-ERROR: smlsl2 v0.2d, v1.4d, v2.4s
2404 // CHECK-ERROR: ^
24052374
24062375 umlsl v0.8h, v1.8h, v2.8b
24072376 umlsl v0.4s, v1.4s, v2.4h
24212390 umlsl2 v0.4s, v1.8s, v2.8h
24222391 umlsl2 v0.2d, v1.4d, v2.4s
24232392
2424 // CHECK-ERROR: error: invalid operand for instruction
2393 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
24252394 // CHECK-ERROR: umlsl2 v0.8h, v1.16h, v2.16b
2426 // CHECK-ERROR: ^
2427 // CHECK-ERROR: error: invalid operand for instruction
2395 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
24282396 // CHECK-ERROR: umlsl2 v0.4s, v1.8s, v2.8h
2429 // CHECK-ERROR: ^
2430 // CHECK-ERROR: error: invalid operand for instruction
2397 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
24312398 // CHECK-ERROR: umlsl2 v0.2d, v1.4d, v2.4s
2432 // CHECK-ERROR: ^
24332399
24342400 smull v0.8h, v1.8h, v2.8b
24352401 smull v0.4s, v1.4s, v2.4h
24492415 smull2 v0.4s, v1.8s, v2.8h
24502416 smull2 v0.2d, v1.4d, v2.4s
24512417
2452 // CHECK-ERROR: error: invalid operand for instruction
2418 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
24532419 // CHECK-ERROR: smull2 v0.8h, v1.16h, v2.16b
2454 // CHECK-ERROR: ^
2455 // CHECK-ERROR: error: invalid operand for instruction
2420 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
24562421 // CHECK-ERROR: smull2 v0.4s, v1.8s, v2.8h
2457 // CHECK-ERROR: ^
2458 // CHECK-ERROR: error: invalid operand for instruction
2422 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
24592423 // CHECK-ERROR: smull2 v0.2d, v1.4d, v2.4s
2460 // CHECK-ERROR: ^
24612424
24622425 umull v0.8h, v1.8h, v2.8b
24632426 umull v0.4s, v1.4s, v2.4h
24772440 umull2 v0.4s, v1.8s, v2.8h
24782441 umull2 v0.2d, v1.4d, v2.4s
24792442
2480 // CHECK-ERROR: error: invalid operand for instruction
2443 // CHECK-ERROR: [[@LINE-4]]:23: error: invalid vector kind qualifier
24812444 // CHECK-ERROR: umull2 v0.8h, v1.16h, v2.16b
2482 // CHECK-ERROR: ^
2483 // CHECK-ERROR: error: invalid operand for instruction
2445 // CHECK-ERROR: [[@LINE-5]]:23: error: invalid vector kind qualifier
24842446 // CHECK-ERROR: umull2 v0.4s, v1.8s, v2.8h
2485 // CHECK-ERROR: ^
2486 // CHECK-ERROR: error: invalid operand for instruction
2447 // CHECK-ERROR: [[@LINE-6]]:23: error: invalid vector kind qualifier
24872448 // CHECK-ERROR: umull2 v0.2d, v1.4d, v2.4s
2488 // CHECK-ERROR: ^
24892449
24902450 //------------------------------------------------------------------------------
24912451 // Long - Variant 2
25042464 sqdmlal2 v0.4s, v1.8s, v2.8h
25052465 sqdmlal2 v0.2d, v1.4d, v2.4s
25062466
2507 // CHECK-ERROR: error: invalid operand for instruction
2467 // CHECK-ERROR: [[@LINE-3]]:25: error: invalid vector kind qualifier
25082468 // CHECK-ERROR: sqdmlal2 v0.4s, v1.8s, v2.8h
2509 // CHECK-ERROR: ^
2510 // CHECK-ERROR: error: invalid operand for instruction
2469 // CHECK-ERROR: [[@LINE-4]]:25: error: invalid vector kind qualifier
25112470 // CHECK-ERROR: sqdmlal2 v0.2d, v1.4d, v2.4s
2512 // CHECK-ERROR: ^
25132471
25142472 // Mismatched vector types
25152473 sqdmlal v0.8h, v1.8b, v2.8b
25352493 sqdmlsl2 v0.4s, v1.8s, v2.8h
25362494 sqdmlsl2 v0.2d, v1.4d, v2.4s
25372495
2538 // CHECK-ERROR: error: invalid operand for instruction
2496 // CHECK-ERROR: [[@LINE-3]]:25: error: invalid vector kind qualifier
25392497 // CHECK-ERROR: sqdmlsl2 v0.4s, v1.8s, v2.8h
2540 // CHECK-ERROR: ^
2541 // CHECK-ERROR: error: invalid operand for instruction
2498 // CHECK-ERROR: [[@LINE-4]]:25: error: invalid vector kind qualifier
25422499 // CHECK-ERROR: sqdmlsl2 v0.2d, v1.4d, v2.4s
2543 // CHECK-ERROR: ^
25442500
25452501 // Mismatched vector types
25462502 sqdmlsl v0.8h, v1.8b, v2.8b
25672523 sqdmull2 v0.4s, v1.8s, v2.8h
25682524 sqdmull2 v0.2d, v1.4d, v2.4s
25692525
2570 // CHECK-ERROR: error: invalid operand for instruction
2526 // CHECK-ERROR: [[@LINE-3]]:25: error: invalid vector kind qualifier
25712527 // CHECK-ERROR: sqdmull2 v0.4s, v1.8s, v2.8h
2572 // CHECK-ERROR: ^
2573 // CHECK-ERROR: error: invalid operand for instruction
2528 // CHECK-ERROR: [[@LINE-4]]:25: error: invalid vector kind qualifier
25742529 // CHECK-ERROR: sqdmull2 v0.2d, v1.4d, v2.4s
2575 // CHECK-ERROR: ^
25762530
25772531 // Mismatched vector types
25782532 sqdmull v0.8h, v1.8b, v2.8b
26152569
26162570
26172571 pmull2 v0.8h, v1.16h, v2.16b
2618
2619 // CHECK-ERROR: error: invalid operand for instruction
2572 // CHECK-ERROR: [[@LINE-1]]:23: error: invalid vector kind qualifier
26202573 // CHECK-ERROR: pmull2 v0.8h, v1.16h, v2.16b
2621 // CHECK-ERROR: ^
26222574
26232575 pmull2 v0.q, v1.2d, v2.2d
2624
2625 // CHECK-ERROR: error: invalid operand for instruction
2576 // CHECK-ERROR: [[@LINE-1]]:16: error: invalid vector kind qualifier
26262577 // CHECK-ERROR: pmull2 v0.q, v1.2d, v2.2d
2627 // CHECK-ERROR: ^
26282578
26292579 // Mismatched vector types
26302580 pmull2 v0.4s, v1.8h v2.8h
26612611 saddw2 v0.4s, v1.4s, v2.8s
26622612 saddw2 v0.2d, v1.2d, v2.4d
26632613
2664 // CHECK-ERROR: error: invalid operand for instruction
2614 // CHECK-ERROR: [[@LINE-4]]:30: error: invalid vector kind qualifier
26652615 // CHECK-ERROR: saddw2 v0.8h, v1.8h, v2.16h
2666 // CHECK-ERROR: ^
2667 // CHECK-ERROR: error: invalid operand for instruction
2616 // CHECK-ERROR: [[@LINE-5]]:30: error: invalid vector kind qualifier
26682617 // CHECK-ERROR: saddw2 v0.4s, v1.4s, v2.8s
2669 // CHECK-ERROR: ^
2670 // CHECK-ERROR: error: invalid operand for instruction
2618 // CHECK-ERROR: [[@LINE-6]]:30: error: invalid vector kind qualifier
26712619 // CHECK-ERROR: saddw2 v0.2d, v1.2d, v2.4d
2672 // CHECK-ERROR: ^
26732620
26742621 uaddw v0.8h, v1.8h, v2.8h
26752622 uaddw v0.4s, v1.4s, v2.4s
26892636 uaddw2 v0.4s, v1.4s, v2.8s
26902637 uaddw2 v0.2d, v1.2d, v2.4d
26912638
2692 // CHECK-ERROR: error: invalid operand for instruction
2639 // CHECK-ERROR: [[@LINE-4]]:30: error: invalid vector kind qualifier
26932640 // CHECK-ERROR: uaddw2 v0.8h, v1.8h, v2.16h
2694 // CHECK-ERROR: ^
2695 // CHECK-ERROR: error: invalid operand for instruction
2641 // CHECK-ERROR: [[@LINE-5]]:30: error: invalid vector kind qualifier
26962642 // CHECK-ERROR: uaddw2 v0.4s, v1.4s, v2.8s
2697 // CHECK-ERROR: ^
2698 // CHECK-ERROR: error: invalid operand for instruction
2643 // CHECK-ERROR: [[@LINE-6]]:30: error: invalid vector kind qualifier
26992644 // CHECK-ERROR: uaddw2 v0.2d, v1.2d, v2.4d
2700 // CHECK-ERROR: ^
27012645
27022646 ssubw v0.8h, v1.8h, v2.8h
27032647 ssubw v0.4s, v1.4s, v2.4s
27172661 ssubw2 v0.4s, v1.4s, v2.8s
27182662 ssubw2 v0.2d, v1.2d, v2.4d
27192663
2720 // CHECK-ERROR: error: invalid operand for instruction
2664 // CHECK-ERROR: [[@LINE-4]]:30: error: invalid vector kind qualifier
27212665 // CHECK-ERROR: ssubw2 v0.8h, v1.8h, v2.16h
2722 // CHECK-ERROR: ^
2723 // CHECK-ERROR: error: invalid operand for instruction
2666 // CHECK-ERROR: [[@LINE-5]]:30: error: invalid vector kind qualifier
27242667 // CHECK-ERROR: ssubw2 v0.4s, v1.4s, v2.8s
2725 // CHECK-ERROR: ^
2726 // CHECK-ERROR: error: invalid operand for instruction
2668 // CHECK-ERROR: [[@LINE-6]]:30: error: invalid vector kind qualifier
27272669 // CHECK-ERROR: ssubw2 v0.2d, v1.2d, v2.4d
2728 // CHECK-ERROR: ^
27292670
27302671 usubw v0.8h, v1.8h, v2.8h
27312672 usubw v0.4s, v1.4s, v2.4s
27452686 usubw2 v0.4s, v1.4s, v2.8s
27462687 usubw2 v0.2d, v1.2d, v2.4d
27472688
2748 // CHECK-ERROR: error: invalid operand for instruction
2689 // CHECK-ERROR: [[@LINE-4]]:30: error: invalid vector kind qualifier
27492690 // CHECK-ERROR: usubw2 v0.8h, v1.8h, v2.16h
2750 // CHECK-ERROR: ^
2751 // CHECK-ERROR: error: invalid operand for instruction
2691 // CHECK-ERROR: [[@LINE-5]]:30: error: invalid vector kind qualifier
27522692 // CHECK-ERROR: usubw2 v0.4s, v1.4s, v2.8s
2753 // CHECK-ERROR: ^
2754 // CHECK-ERROR: error: invalid operand for instruction
2693 // CHECK-ERROR: [[@LINE-6]]:30: error: invalid vector kind qualifier
27552694 // CHECK-ERROR: usubw2 v0.2d, v1.2d, v2.4d
2756 // CHECK-ERROR: ^
27572695
27582696 //------------------------------------------------------------------------------
27592697 // Narrow
27632701 addhn v0.4h, v1.4s, v2.4h
27642702 addhn v0.2s, v1.2d, v2.2s
27652703
2766 // CHECK-ERROR: error: invalid operand for instruction
2704 // CHECK-ERROR: [[@LINE-4]]:29: error: invalid vector kind qualifier
27672705 // CHECK-ERROR: addhn v0.8b, v1.8h, v2.8d
2768 // CHECK-ERROR: ^
2769 // CHECK-ERROR: error: invalid operand for instruction
2706 // CHECK-ERROR: [[@LINE-5]]:29: error: invalid operand for instruction
27702707 // CHECK-ERROR: addhn v0.4h, v1.4s, v2.4h
2771 // CHECK-ERROR: ^
2772 // CHECK-ERROR: error: invalid operand for instruction
2708 // CHECK-ERROR: [[@LINE-6]]:29: error: invalid operand for instruction
27732709 // CHECK-ERROR: addhn v0.2s, v1.2d, v2.2s
2774 // CHECK-ERROR: ^
27752710
27762711 addhn2 v0.16b, v1.8h, v2.8b
27772712 addhn2 v0.8h, v1.4s, v2.4h
44784413 // CHECK-ERROR: error: invalid operand for instruction
44794414 // CHECK-ERROR: dup v1.16b, d2
44804415 // CHECK-ERROR: ^
4481 // CHECK-ERROR: error: invalid operand for instruction
4416 // CHECK-ERROR: error: invalid vector kind qualifier
44824417 // CHECK-ERROR: dup v11.8s, w16
44834418 // CHECK-ERROR: ^
4484 // CHECK-ERROR: error: invalid operand for instruction
4419 // CHECK-ERROR: error: invalid vector kind qualifier
44854420 // CHECK-ERROR: dup v17.4d, w28
44864421 // CHECK-ERROR: ^
44874422 // CHECK-ERROR: error: invalid operand for instruction
64576392 //----------------------------------------------------------------------
64586393
64596394 uzp1 v0.16b, v1.8b, v2.8b
6395 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
64606396 uzp1 v0.8b, v1.4b, v2.4b
6397 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6398 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64616399 uzp1 v0.8h, v1.4h, v2.4h
6400 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64626401 uzp1 v0.4h, v1.2h, v2.2h
6402 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64636403 uzp1 v0.4s, v1.2s, v2.2s
6404 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64646405 uzp1 v0.2s, v1.1s, v2.1s
6406 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6407 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64656408 uzp1 v0.2d, v1.1d, v2.1d
6409 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64666410 uzp1 v0.1d, v1.1d, v2.1d
6467
6468 // CHECK-ERROR: error: invalid operand for instruction
6469 // CHECK-ERROR: uzp1 v0.16b, v1.8b, v2.8b
6470 // CHECK-ERROR: ^
6471 // CHECK-ERROR: error: invalid operand for instruction
6472 // CHECK-ERROR: uzp1 v0.8b, v1.4b, v2.4b
6473 // CHECK-ERROR: ^
6474 // CHECK-ERROR: error: invalid operand for instruction
6475 // CHECK-ERROR: uzp1 v0.8h, v1.4h, v2.4h
6476 // CHECK-ERROR: ^
6477 // CHECK-ERROR: error: invalid operand for instruction
6478 // CHECK-ERROR: uzp1 v0.4h, v1.2h, v2.2h
6479 // CHECK-ERROR: ^
6480 // CHECK-ERROR: error: invalid operand for instruction
6481 // CHECK-ERROR: uzp1 v0.4s, v1.2s, v2.2s
6482 // CHECK-ERROR: ^
6483 // CHECK-ERROR: error: invalid operand for instruction
6484 // CHECK-ERROR: uzp1 v0.2s, v1.1s, v2.1s
6485 // CHECK-ERROR: ^
6486 // CHECK-ERROR: error: invalid operand for instruction
6487 // CHECK-ERROR: uzp1 v0.2d, v1.1d, v2.1d
6488 // CHECK-ERROR: ^
6489 // CHECK-ERROR: error: invalid operand for instruction
6490 // CHECK-ERROR: uzp1 v0.1d, v1.1d, v2.1d
6491 // CHECK-ERROR: ^
6411 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6412
6413
64926414
64936415 uzp2 v0.16b, v1.8b, v2.8b
6416 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
64946417 uzp2 v0.8b, v1.4b, v2.4b
6418 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6419 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64956420 uzp2 v0.8h, v1.4h, v2.4h
6421 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64966422 uzp2 v0.4h, v1.2h, v2.2h
6423 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64976424 uzp2 v0.4s, v1.2s, v2.2s
6425 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
64986426 uzp2 v0.2s, v1.1s, v2.1s
6427 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6428 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
64996429 uzp2 v0.2d, v1.1d, v2.1d
6430 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65006431 uzp2 v0.1d, v1.1d, v2.1d
6501
6502 // CHECK-ERROR: error: invalid operand for instruction
6503 // CHECK-ERROR: uzp2 v0.16b, v1.8b, v2.8b
6504 // CHECK-ERROR: ^
6505 // CHECK-ERROR: error: invalid operand for instruction
6506 // CHECK-ERROR: uzp2 v0.8b, v1.4b, v2.4b
6507 // CHECK-ERROR: ^
6508 // CHECK-ERROR: error: invalid operand for instruction
6509 // CHECK-ERROR: uzp2 v0.8h, v1.4h, v2.4h
6510 // CHECK-ERROR: ^
6511 // CHECK-ERROR: error: invalid operand for instruction
6512 // CHECK-ERROR: uzp2 v0.4h, v1.2h, v2.2h
6513 // CHECK-ERROR: ^
6514 // CHECK-ERROR: error: invalid operand for instruction
6515 // CHECK-ERROR: uzp2 v0.4s, v1.2s, v2.2s
6516 // CHECK-ERROR: ^
6517 // CHECK-ERROR: error: invalid operand for instruction
6518 // CHECK-ERROR: uzp2 v0.2s, v1.1s, v2.1s
6519 // CHECK-ERROR: ^
6520 // CHECK-ERROR: error: invalid operand for instruction
6521 // CHECK-ERROR: uzp2 v0.2d, v1.1d, v2.1d
6522 // CHECK-ERROR: ^
6523 // CHECK-ERROR: error: invalid operand for instruction
6524 // CHECK-ERROR: uzp2 v0.1d, v1.1d, v2.1d
6525 // CHECK-ERROR: ^
6432 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6433
6434
65266435
65276436 zip1 v0.16b, v1.8b, v2.8b
6437 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
65286438 zip1 v0.8b, v1.4b, v2.4b
6439 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6440 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65296441 zip1 v0.8h, v1.4h, v2.4h
6442 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65306443 zip1 v0.4h, v1.2h, v2.2h
6444 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65316445 zip1 v0.4s, v1.2s, v2.2s
6446 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65326447 zip1 v0.2s, v1.1s, v2.1s
6448 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6449 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65336450 zip1 v0.2d, v1.1d, v2.1d
6451 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65346452 zip1 v0.1d, v1.1d, v2.1d
6535
6536 // CHECK-ERROR: error: invalid operand for instruction
6537 // CHECK-ERROR: zip1 v0.16b, v1.8b, v2.8b
6538 // CHECK-ERROR: ^
6539 // CHECK-ERROR: error: invalid operand for instruction
6540 // CHECK-ERROR: zip1 v0.8b, v1.4b, v2.4b
6541 // CHECK-ERROR: ^
6542 // CHECK-ERROR: error: invalid operand for instruction
6543 // CHECK-ERROR: zip1 v0.8h, v1.4h, v2.4h
6544 // CHECK-ERROR: ^
6545 // CHECK-ERROR: error: invalid operand for instruction
6546 // CHECK-ERROR: zip1 v0.4h, v1.2h, v2.2h
6547 // CHECK-ERROR: ^
6548 // CHECK-ERROR: error: invalid operand for instruction
6549 // CHECK-ERROR: zip1 v0.4s, v1.2s, v2.2s
6550 // CHECK-ERROR: ^
6551 // CHECK-ERROR: error: invalid operand for instruction
6552 // CHECK-ERROR: zip1 v0.2s, v1.1s, v2.1s
6553 // CHECK-ERROR: ^
6554 // CHECK-ERROR: error: invalid operand for instruction
6555 // CHECK-ERROR: zip1 v0.2d, v1.1d, v2.1d
6556 // CHECK-ERROR: ^
6557 // CHECK-ERROR: error: invalid operand for instruction
6558 // CHECK-ERROR: zip1 v0.1d, v1.1d, v2.1d
6559 // CHECK-ERROR: ^
6560
6453 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6454
6455
6456 \
65616457 zip2 v0.16b, v1.8b, v2.8b
6458 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
65626459 zip2 v0.8b, v1.4b, v2.4b
6460 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6461 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65636462 zip2 v0.8h, v1.4h, v2.4h
6463 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65646464 zip2 v0.4h, v1.2h, v2.2h
6465 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65656466 zip2 v0.4s, v1.2s, v2.2s
6467 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65666468 zip2 v0.2s, v1.1s, v2.1s
6469 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6470 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65676471 zip2 v0.2d, v1.1d, v2.1d
6472 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65686473 zip2 v0.1d, v1.1d, v2.1d
6569
6570 // CHECK-ERROR: error: invalid operand for instruction
6571 // CHECK-ERROR: zip2 v0.16b, v1.8b, v2.8b
6572 // CHECK-ERROR: ^
6573 // CHECK-ERROR: error: invalid operand for instruction
6574 // CHECK-ERROR: zip2 v0.8b, v1.4b, v2.4b
6575 // CHECK-ERROR: ^
6576 // CHECK-ERROR: error: invalid operand for instruction
6577 // CHECK-ERROR: zip2 v0.8h, v1.4h, v2.4h
6578 // CHECK-ERROR: ^
6579 // CHECK-ERROR: error: invalid operand for instruction
6580 // CHECK-ERROR: zip2 v0.4h, v1.2h, v2.2h
6581 // CHECK-ERROR: ^
6582 // CHECK-ERROR: error: invalid operand for instruction
6583 // CHECK-ERROR: zip2 v0.4s, v1.2s, v2.2s
6584 // CHECK-ERROR: ^
6585 // CHECK-ERROR: error: invalid operand for instruction
6586 // CHECK-ERROR: zip2 v0.2s, v1.1s, v2.1s
6587 // CHECK-ERROR: ^
6588 // CHECK-ERROR: error: invalid operand for instruction
6589 // CHECK-ERROR: zip2 v0.2d, v1.1d, v2.1d
6590 // CHECK-ERROR: ^
6591 // CHECK-ERROR: error: invalid operand for instruction
6592 // CHECK-ERROR: zip2 v0.1d, v1.1d, v2.1d
6593 // CHECK-ERROR: ^
6474 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6475
6476
65946477
65956478 trn1 v0.16b, v1.8b, v2.8b
6479 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
65966480 trn1 v0.8b, v1.4b, v2.4b
6481 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6482 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
65976483 trn1 v0.8h, v1.4h, v2.4h
6484 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65986485 trn1 v0.4h, v1.2h, v2.2h
6486 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
65996487 trn1 v0.4s, v1.2s, v2.2s
6488 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66006489 trn1 v0.2s, v1.1s, v2.1s
6490 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6491 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
66016492 trn1 v0.2d, v1.1d, v2.1d
6493 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66026494 trn1 v0.1d, v1.1d, v2.1d
6603
6604 // CHECK-ERROR: error: invalid operand for instruction
6605 // CHECK-ERROR: trn1 v0.16b, v1.8b, v2.8b
6606 // CHECK-ERROR: ^
6607 // CHECK-ERROR: error: invalid operand for instruction
6608 // CHECK-ERROR: trn1 v0.8b, v1.4b, v2.4b
6609 // CHECK-ERROR: ^
6610 // CHECK-ERROR: error: invalid operand for instruction
6611 // CHECK-ERROR: trn1 v0.8h, v1.4h, v2.4h
6612 // CHECK-ERROR: ^
6613 // CHECK-ERROR: error: invalid operand for instruction
6614 // CHECK-ERROR: trn1 v0.4h, v1.2h, v2.2h
6615 // CHECK-ERROR: ^
6616 // CHECK-ERROR: error: invalid operand for instruction
6617 // CHECK-ERROR: trn1 v0.4s, v1.2s, v2.2s
6618 // CHECK-ERROR: ^
6619 // CHECK-ERROR: error: invalid operand for instruction
6620 // CHECK-ERROR: trn1 v0.2s, v1.1s, v2.1s
6621 // CHECK-ERROR: ^
6622 // CHECK-ERROR: error: invalid operand for instruction
6623 // CHECK-ERROR: trn1 v0.2d, v1.1d, v2.1d
6624 // CHECK-ERROR: ^
6625 // CHECK-ERROR: error: invalid operand for instruction
6626 // CHECK-ERROR: trn1 v0.1d, v1.1d, v2.1d
6627 // CHECK-ERROR: ^
6495 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6496
6497
66286498
66296499 trn2 v0.16b, v1.8b, v2.8b
6500 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
66306501 trn2 v0.8b, v1.4b, v2.4b
6502 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6503 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
66316504 trn2 v0.8h, v1.4h, v2.4h
6505 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66326506 trn2 v0.4h, v1.2h, v2.2h
6507 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66336508 trn2 v0.4s, v1.2s, v2.2s
6509 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66346510 trn2 v0.2s, v1.1s, v2.1s
6511 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6512 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
66356513 trn2 v0.2d, v1.1d, v2.1d
6514 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66366515 trn2 v0.1d, v1.1d, v2.1d
6637
6638 // CHECK-ERROR: error: invalid operand for instruction
6639 // CHECK-ERROR: trn2 v0.16b, v1.8b, v2.8b
6640 // CHECK-ERROR: ^
6641 // CHECK-ERROR: error: invalid operand for instruction
6642 // CHECK-ERROR: trn2 v0.8b, v1.4b, v2.4b
6643 // CHECK-ERROR: ^
6644 // CHECK-ERROR: error: invalid operand for instruction
6645 // CHECK-ERROR: trn2 v0.8h, v1.4h, v2.4h
6646 // CHECK-ERROR: ^
6647 // CHECK-ERROR: error: invalid operand for instruction
6648 // CHECK-ERROR: trn2 v0.4h, v1.2h, v2.2h
6649 // CHECK-ERROR: ^
6650 // CHECK-ERROR: error: invalid operand for instruction
6651 // CHECK-ERROR: trn2 v0.4s, v1.2s, v2.2s
6652 // CHECK-ERROR: ^
6653 // CHECK-ERROR: error: invalid operand for instruction
6654 // CHECK-ERROR: trn2 v0.2s, v1.1s, v2.1s
6655 // CHECK-ERROR: ^
6656 // CHECK-ERROR: error: invalid operand for instruction
6657 // CHECK-ERROR: trn2 v0.2d, v1.1d, v2.1d
6658 // CHECK-ERROR: ^
6659 // CHECK-ERROR: error: invalid operand for instruction
6660 // CHECK-ERROR: trn2 v0.1d, v1.1d, v2.1d
6661 // CHECK-ERROR: ^
6516 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
66626517
66636518 //----------------------------------------------------------------------
66646519 // Permutation with 3 vectors
66656520 //----------------------------------------------------------------------
66666521
66676522 uzp1 v0.16b, v1.8b, v2.8b
6523 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
66686524 uzp1 v0.8b, v1.4b, v2.4b
6525 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6526 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
66696527 uzp1 v0.8h, v1.4h, v2.4h
6528 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66706529 uzp1 v0.4h, v1.2h, v2.2h
6530 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66716531 uzp1 v0.4s, v1.2s, v2.2s
6532 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66726533 uzp1 v0.2s, v1.1s, v2.1s
6534 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6535 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
66736536 uzp1 v0.2d, v1.1d, v2.1d
6537 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
66746538 uzp1 v0.1d, v1.1d, v2.1d
6675
6676 // CHECK-ERROR: error: invalid operand for instruction
6677 // CHECK-ERROR: uzp1 v0.16b, v1.8b, v2.8b
6678 // CHECK-ERROR: ^
6679 // CHECK-ERROR: error: invalid operand for instruction
6680 // CHECK-ERROR: uzp1 v0.8b, v1.4b, v2.4b
6681 // CHECK-ERROR: ^
6682 // CHECK-ERROR: error: invalid operand for instruction
6683 // CHECK-ERROR: uzp1 v0.8h, v1.4h, v2.4h
6684 // CHECK-ERROR: ^
6685 // CHECK-ERROR: error: invalid operand for instruction
6686 // CHECK-ERROR: uzp1 v0.4h, v1.2h, v2.2h
6687 // CHECK-ERROR: ^
6688 // CHECK-ERROR: error: invalid operand for instruction
6689 // CHECK-ERROR: uzp1 v0.4s, v1.2s, v2.2s
6690 // CHECK-ERROR: ^
6691 // CHECK-ERROR: error: invalid operand for instruction
6692 // CHECK-ERROR: uzp1 v0.2s, v1.1s, v2.1s
6693 // CHECK-ERROR: ^
6694 // CHECK-ERROR: error: invalid operand for instruction
6695 // CHECK-ERROR: uzp1 v0.2d, v1.1d, v2.1d
6696 // CHECK-ERROR: ^
6697 // CHECK-ERROR: error: invalid operand for instruction
6698 // CHECK-ERROR: uzp1 v0.1d, v1.1d, v2.1d
6699 // CHECK-ERROR: ^
6539 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
67006540
67016541 uzp2 v0.16b, v1.8b, v2.8b
6542 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
67026543 uzp2 v0.8b, v1.4b, v2.4b
6544 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6545 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
67036546 uzp2 v0.8h, v1.4h, v2.4h
6547 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67046548 uzp2 v0.4h, v1.2h, v2.2h
6549 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67056550 uzp2 v0.4s, v1.2s, v2.2s
6551 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67066552 uzp2 v0.2s, v1.1s, v2.1s
6553 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6554 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
67076555 uzp2 v0.2d, v1.1d, v2.1d
6556 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67086557 uzp2 v0.1d, v1.1d, v2.1d
6709
6710 // CHECK-ERROR: error: invalid operand for instruction
6711 // CHECK-ERROR: uzp2 v0.16b, v1.8b, v2.8b
6712 // CHECK-ERROR: ^
6713 // CHECK-ERROR: error: invalid operand for instruction
6714 // CHECK-ERROR: uzp2 v0.8b, v1.4b, v2.4b
6715 // CHECK-ERROR: ^
6716 // CHECK-ERROR: error: invalid operand for instruction
6717 // CHECK-ERROR: uzp2 v0.8h, v1.4h, v2.4h
6718 // CHECK-ERROR: ^
6719 // CHECK-ERROR: error: invalid operand for instruction
6720 // CHECK-ERROR: uzp2 v0.4h, v1.2h, v2.2h
6721 // CHECK-ERROR: ^
6722 // CHECK-ERROR: error: invalid operand for instruction
6723 // CHECK-ERROR: uzp2 v0.4s, v1.2s, v2.2s
6724 // CHECK-ERROR: ^
6725 // CHECK-ERROR: error: invalid operand for instruction
6726 // CHECK-ERROR: uzp2 v0.2s, v1.1s, v2.1s
6727 // CHECK-ERROR: ^
6728 // CHECK-ERROR: error: invalid operand for instruction
6729 // CHECK-ERROR: uzp2 v0.2d, v1.1d, v2.1d
6730 // CHECK-ERROR: ^
6731 // CHECK-ERROR: error: invalid operand for instruction
6732 // CHECK-ERROR: uzp2 v0.1d, v1.1d, v2.1d
6733 // CHECK-ERROR: ^
6558 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
67346559
67356560 zip1 v0.16b, v1.8b, v2.8b
6561 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
67366562 zip1 v0.8b, v1.4b, v2.4b
6563 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6564 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
67376565 zip1 v0.8h, v1.4h, v2.4h
6566 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67386567 zip1 v0.4h, v1.2h, v2.2h
6568 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67396569 zip1 v0.4s, v1.2s, v2.2s
6570 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67406571 zip1 v0.2s, v1.1s, v2.1s
6572 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6573 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
67416574 zip1 v0.2d, v1.1d, v2.1d
6575 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67426576 zip1 v0.1d, v1.1d, v2.1d
6743
6744 // CHECK-ERROR: error: invalid operand for instruction
6745 // CHECK-ERROR: zip1 v0.16b, v1.8b, v2.8b
6746 // CHECK-ERROR: ^
6747 // CHECK-ERROR: error: invalid operand for instruction
6748 // CHECK-ERROR: zip1 v0.8b, v1.4b, v2.4b
6749 // CHECK-ERROR: ^
6750 // CHECK-ERROR: error: invalid operand for instruction
6751 // CHECK-ERROR: zip1 v0.8h, v1.4h, v2.4h
6752 // CHECK-ERROR: ^
6753 // CHECK-ERROR: error: invalid operand for instruction
6754 // CHECK-ERROR: zip1 v0.4h, v1.2h, v2.2h
6755 // CHECK-ERROR: ^
6756 // CHECK-ERROR: error: invalid operand for instruction
6757 // CHECK-ERROR: zip1 v0.4s, v1.2s, v2.2s
6758 // CHECK-ERROR: ^
6759 // CHECK-ERROR: error: invalid operand for instruction
6760 // CHECK-ERROR: zip1 v0.2s, v1.1s, v2.1s
6761 // CHECK-ERROR: ^
6762 // CHECK-ERROR: error: invalid operand for instruction
6763 // CHECK-ERROR: zip1 v0.2d, v1.1d, v2.1d
6764 // CHECK-ERROR: ^
6765 // CHECK-ERROR: error: invalid operand for instruction
6766 // CHECK-ERROR: zip1 v0.1d, v1.1d, v2.1d
6767 // CHECK-ERROR: ^
6577 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6578
6579
6580
6581
67686582
67696583 zip2 v0.16b, v1.8b, v2.8b
6584 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
67706585 zip2 v0.8b, v1.4b, v2.4b
6586 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6587 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
67716588 zip2 v0.8h, v1.4h, v2.4h
6589 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67726590 zip2 v0.4h, v1.2h, v2.2h
6591 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67736592 zip2 v0.4s, v1.2s, v2.2s
6593 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67746594 zip2 v0.2s, v1.1s, v2.1s
6595 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6596 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
67756597 zip2 v0.2d, v1.1d, v2.1d
6598 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
67766599 zip2 v0.1d, v1.1d, v2.1d
6777
6778 // CHECK-ERROR: error: invalid operand for instruction
6779 // CHECK-ERROR: zip2 v0.16b, v1.8b, v2.8b
6780 // CHECK-ERROR: ^
6781 // CHECK-ERROR: error: invalid operand for instruction
6782 // CHECK-ERROR: zip2 v0.8b, v1.4b, v2.4b
6783 // CHECK-ERROR: ^
6784 // CHECK-ERROR: error: invalid operand for instruction
6785 // CHECK-ERROR: zip2 v0.8h, v1.4h, v2.4h
6786 // CHECK-ERROR: ^
6787 // CHECK-ERROR: error: invalid operand for instruction
6788 // CHECK-ERROR: zip2 v0.4h, v1.2h, v2.2h
6789 // CHECK-ERROR: ^
6790 // CHECK-ERROR: error: invalid operand for instruction
6791 // CHECK-ERROR: zip2 v0.4s, v1.2s, v2.2s
6792 // CHECK-ERROR: ^
6793 // CHECK-ERROR: error: invalid operand for instruction
6794 // CHECK-ERROR: zip2 v0.2s, v1.1s, v2.1s
6795 // CHECK-ERROR: ^
6796 // CHECK-ERROR: error: invalid operand for instruction
6797 // CHECK-ERROR: zip2 v0.2d, v1.1d, v2.1d
6798 // CHECK-ERROR: ^
6799 // CHECK-ERROR: error: invalid operand for instruction
6800 // CHECK-ERROR: zip2 v0.1d, v1.1d, v2.1d
6801 // CHECK-ERROR: ^
6600 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6601
6602
6603
68026604
68036605 trn1 v0.16b, v1.8b, v2.8b
6606 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
68046607 trn1 v0.8b, v1.4b, v2.4b
6608 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6609 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
68056610 trn1 v0.8h, v1.4h, v2.4h
6611 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
68066612 trn1 v0.4h, v1.2h, v2.2h
6613 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
68076614 trn1 v0.4s, v1.2s, v2.2s
6615 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
68086616 trn1 v0.2s, v1.1s, v2.1s
6617 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6618 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
68096619 trn1 v0.2d, v1.1d, v2.1d
6620 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
68106621 trn1 v0.1d, v1.1d, v2.1d
6811
6812 // CHECK-ERROR: error: invalid operand for instruction
6813 // CHECK-ERROR: trn1 v0.16b, v1.8b, v2.8b
6814 // CHECK-ERROR: ^
6815 // CHECK-ERROR: error: invalid operand for instruction
6816 // CHECK-ERROR: trn1 v0.8b, v1.4b, v2.4b
6817 // CHECK-ERROR: ^
6818 // CHECK-ERROR: error: invalid operand for instruction
6819 // CHECK-ERROR: trn1 v0.8h, v1.4h, v2.4h
6820 // CHECK-ERROR: ^
6821 // CHECK-ERROR: error: invalid operand for instruction
6822 // CHECK-ERROR: trn1 v0.4h, v1.2h, v2.2h
6823 // CHECK-ERROR: ^
6824 // CHECK-ERROR: error: invalid operand for instruction
6825 // CHECK-ERROR: trn1 v0.4s, v1.2s, v2.2s
6826 // CHECK-ERROR: ^
6827 // CHECK-ERROR: error: invalid operand for instruction
6828 // CHECK-ERROR: trn1 v0.2s, v1.1s, v2.1s
6829 // CHECK-ERROR: ^
6830 // CHECK-ERROR: error: invalid operand for instruction
6831 // CHECK-ERROR: trn1 v0.2d, v1.1d, v2.1d
6832 // CHECK-ERROR: ^
6833 // CHECK-ERROR: error: invalid operand for instruction
6834 // CHECK-ERROR: trn1 v0.1d, v1.1d, v2.1d
6835 // CHECK-ERROR: ^
6622 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6623
6624
68366625
68376626 trn2 v0.16b, v1.8b, v2.8b
6627 // CHECK-ERROR: [[@LINE-1]]:22: error: invalid operand for instruction
68386628 trn2 v0.8b, v1.4b, v2.4b
6629 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6630 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
68396631 trn2 v0.8h, v1.4h, v2.4h
6632 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
68406633 trn2 v0.4h, v1.2h, v2.2h
6634 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
68416635 trn2 v0.4s, v1.2s, v2.2s
6636 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
68426637 trn2 v0.2s, v1.1s, v2.1s
6638 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid vector kind qualifier
6639 // CHECK-ERROR: [[@LINE-2]]:28: error: invalid vector kind qualifier
68436640 trn2 v0.2d, v1.1d, v2.1d
6641 // CHECK-ERROR: [[@LINE-1]]:21: error: invalid operand for instruction
68446642 trn2 v0.1d, v1.1d, v2.1d
6845
6846 // CHECK-ERROR: error: invalid operand for instruction
6847 // CHECK-ERROR: trn2 v0.16b, v1.8b, v2.8b
6848 // CHECK-ERROR: ^
6849 // CHECK-ERROR: error: invalid operand for instruction
6850 // CHECK-ERROR: trn2 v0.8b, v1.4b, v2.4b
6851 // CHECK-ERROR: ^
6852 // CHECK-ERROR: error: invalid operand for instruction
6853 // CHECK-ERROR: trn2 v0.8h, v1.4h, v2.4h
6854 // CHECK-ERROR: ^
6855 // CHECK-ERROR: error: invalid operand for instruction
6856 // CHECK-ERROR: trn2 v0.4h, v1.2h, v2.2h
6857 // CHECK-ERROR: ^
6858 // CHECK-ERROR: error: invalid operand for instruction
6859 // CHECK-ERROR: trn2 v0.4s, v1.2s, v2.2s
6860 // CHECK-ERROR: ^
6861 // CHECK-ERROR: error: invalid operand for instruction
6862 // CHECK-ERROR: trn2 v0.2s, v1.1s, v2.1s
6863 // CHECK-ERROR: ^
6864 // CHECK-ERROR: error: invalid operand for instruction
6865 // CHECK-ERROR: trn2 v0.2d, v1.1d, v2.1d
6866 // CHECK-ERROR: ^
6867 // CHECK-ERROR: error: invalid operand for instruction
6868 // CHECK-ERROR: trn2 v0.1d, v1.1d, v2.1d
6869 // CHECK-ERROR: ^
6643 // CHECK-ERROR: [[@LINE-1]]:14: error: invalid operand for instruction
6644
6645
68706646
68716647 //----------------------------------------------------------------------
68726648 // Floating Point multiply (scalar, by element)