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[X86] Add CMOV pseudos for VR128X and VR256X register classes. Use them when AVX512VL is enabled. This allows the phi nodes to be generated with the correct register class when expanded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343710 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 1 year, 9 months ago
2 changed file(s) with 34 addition(s) and 10 deletion(s). Raw diff Collapse all Expand all
2746327463 case X86::CMOV_RFP64:
2746427464 case X86::CMOV_RFP80:
2746527465 case X86::CMOV_VR128:
27466 case X86::CMOV_VR128X:
2746627467 case X86::CMOV_VR256:
27468 case X86::CMOV_VR256X:
2746727469 case X86::CMOV_VR512:
2746827470 case X86::CMOV_VK8:
2746927471 case X86::CMOV_VK16:
2905929061 case X86::CMOV_RFP64:
2906029062 case X86::CMOV_RFP80:
2906129063 case X86::CMOV_VR128:
29064 case X86::CMOV_VR128X:
2906229065 case X86::CMOV_VR256:
29066 case X86::CMOV_VR256X:
2906329067 case X86::CMOV_VR512:
2906429068 case X86::CMOV_VK8:
2906529069 case X86::CMOV_VK16:
589589
590590 defm _FR32 : CMOVrr_PSEUDO;
591591 defm _FR64 : CMOVrr_PSEUDO;
592 defm _VR128 : CMOVrr_PSEUDO;
593 defm _VR256 : CMOVrr_PSEUDO;
592 let Predicates = [NoVLX] in {
593 defm _VR128 : CMOVrr_PSEUDO;
594 defm _VR256 : CMOVrr_PSEUDO;
595 }
596 let Predicates = [HasVLX] in {
597 defm _VR128X : CMOVrr_PSEUDO;
598 defm _VR256X : CMOVrr_PSEUDO;
599 }
594600 defm _VR512 : CMOVrr_PSEUDO;
595601 defm _VK8 : CMOVrr_PSEUDO;
596602 defm _VK16 : CMOVrr_PSEUDO;
600606
601607 def : Pat<(f128 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)),
602608 (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>;
603 def : Pat<(v4f32 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)),
604 (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>;
605 def : Pat<(v2f64 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)),
606 (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>;
607 def : Pat<(v8f32 (X86cmov VR256:$t, VR256:$f, imm:$cond, EFLAGS)),
608 (CMOV_VR256 VR256:$t, VR256:$f, imm:$cond)>;
609 def : Pat<(v4f64 (X86cmov VR256:$t, VR256:$f, imm:$cond, EFLAGS)),
610 (CMOV_VR256 VR256:$t, VR256:$f, imm:$cond)>;
609
610 let Predicates = [NoVLX] in {
611 def : Pat<(v4f32 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)),
612 (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>;
613 def : Pat<(v2f64 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)),
614 (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>;
615 def : Pat<(v8f32 (X86cmov VR256:$t, VR256:$f, imm:$cond, EFLAGS)),
616 (CMOV_VR256 VR256:$t, VR256:$f, imm:$cond)>;
617 def : Pat<(v4f64 (X86cmov VR256:$t, VR256:$f, imm:$cond, EFLAGS)),
618 (CMOV_VR256 VR256:$t, VR256:$f, imm:$cond)>;
619 }
620 let Predicates = [HasVLX] in {
621 def : Pat<(v4f32 (X86cmov VR128X:$t, VR128X:$f, imm:$cond, EFLAGS)),
622 (CMOV_VR128X VR128X:$t, VR128X:$f, imm:$cond)>;
623 def : Pat<(v2f64 (X86cmov VR128X:$t, VR128X:$f, imm:$cond, EFLAGS)),
624 (CMOV_VR128X VR128X:$t, VR128X:$f, imm:$cond)>;
625 def : Pat<(v8f32 (X86cmov VR256X:$t, VR256X:$f, imm:$cond, EFLAGS)),
626 (CMOV_VR256X VR256X:$t, VR256X:$f, imm:$cond)>;
627 def : Pat<(v4f64 (X86cmov VR256X:$t, VR256X:$f, imm:$cond, EFLAGS)),
628 (CMOV_VR256X VR256X:$t, VR256X:$f, imm:$cond)>;
629 }
630
611631 def : Pat<(v16f32 (X86cmov VR512:$t, VR512:$f, imm:$cond, EFLAGS)),
612632 (CMOV_VR512 VR512:$t, VR512:$f, imm:$cond)>;
613633 def : Pat<(v8f64 (X86cmov VR512:$t, VR512:$f, imm:$cond, EFLAGS)),