llvm.org GIT mirror llvm / bd887df
Fix lowering of INSERT_VECTOR_ELT in SPU. The IDX was treated as byte index, not element index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112422 91177308-0d34-0410-b5e6-96231b3b80d8 Kalle Raiskila 10 years ago
2 changed file(s) with 12 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
20522052 SDValue IdxOp = Op.getOperand(2);
20532053 DebugLoc dl = Op.getDebugLoc();
20542054 EVT VT = Op.getValueType();
2055 EVT eltVT = ValOp.getValueType();
20552056
20562057 // use 0 when the lane to insert to is 'undef'
2057 int64_t Idx=0;
2058 int64_t Offset=0;
20582059 if (IdxOp.getOpcode() != ISD::UNDEF) {
20592060 ConstantSDNode *CN = cast(IdxOp);
20602061 assert(CN != 0 && "LowerINSERT_VECTOR_ELT: Index is not constant!");
2061 Idx = (CN->getSExtValue());
2062 Offset = (CN->getSExtValue()) * eltVT.getSizeInBits()/8;
20622063 }
20632064
20642065 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
20652066 // Use $sp ($1) because it's always 16-byte aligned and it's available:
20662067 SDValue Pointer = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
20672068 DAG.getRegister(SPU::R1, PtrVT),
2068 DAG.getConstant(Idx, PtrVT));
2069 DAG.getConstant(Offset, PtrVT));
20692070 // widen the mask when dealing with half vectors
20702071 EVT maskVT = EVT::getVectorVT(*(DAG.getContext()), VT.getVectorElementType(),
20712072 128/ VT.getVectorElementType().getSizeInBits());
3030 ret void
3131 }
3232
33 define <4 x float> @test_insert_1(<4 x float> %vparam, float %eltparam) {
34 ;CHECK: cwd $5, 4($sp)
35 ;CHECK: shufb $3, $4, $3, $5
36 ;CHECK: bi $lr
37 %rv = insertelement <4 x float> %vparam, float %eltparam, i32 1
38 ret <4 x float> %rv
39 }
40