llvm.org GIT mirror llvm / bc5cbb8
Move the code that inserts X87 FP_REG_KILL instructions from a special-purpose hook to a new pass. Also, add check to see if any x87 virtual registers are used, to avoid doing any work in the common case that no x87 code is needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59190 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 11 years ago
7 changed file(s) with 148 addition(s) and 84 deletion(s). Raw diff Collapse all Expand all
6363
6464 virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {}
6565 virtual void InstructionSelect() = 0;
66 virtual void InstructionSelectPostProcessing() {}
6766
6867 void SelectRootInit() {
6968 DAGSize = CurDAG->AssignTopologicalOrder();
839839 void
840840 SelectionDAGISel::FinishBasicBlock() {
841841
842 // Perform target specific isel post processing.
843 InstructionSelectPostProcessing();
844
845842 DOUT << "Target-post-processed machine code:\n";
846843 DEBUG(BB->dump());
847844
1515 X86CodeEmitter.cpp
1616 X86ELFWriterInfo.cpp
1717 X86FloatingPoint.cpp
18 X86FloatingPointRegKill.cpp
1819 X86ISelDAGToDAG.cpp
1920 X86ISelLowering.cpp
2021 X86InstrInfo.cpp
3434 ///
3535 FunctionPass *createX86FloatingPointStackifierPass();
3636
37 /// createX87FPRegKillInserterPass - This function returns a pass which
38 /// inserts FP_REG_KILL instructions where needed.
39 ///
40 FunctionPass *createX87FPRegKillInserterPass();
41
3742 /// createX86CodePrinterPass - Returns a pass that prints the X86
3843 /// assembly code for a MachineFunction to the given output stream,
3944 /// using the given target machine description.
0 //===-- X86FloatingPoint.cpp - FP_REG_KILL inserter -----------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the pass which inserts FP_REG_KILL instructions.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #define DEBUG_TYPE "x86-codegen"
14 #include "X86.h"
15 #include "X86InstrInfo.h"
16 #include "X86Subtarget.h"
17 #include "llvm/Instructions.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/Support/Debug.h"
24 #include "llvm/Support/Compiler.h"
25 #include "llvm/Support/CFG.h"
26 #include "llvm/ADT/Statistic.h"
27 using namespace llvm;
28
29 STATISTIC(NumFPKill, "Number of FP_REG_KILL instructions added");
30
31 namespace {
32 struct VISIBILITY_HIDDEN FPRegKiller : public MachineFunctionPass {
33 static char ID;
34 FPRegKiller() : MachineFunctionPass(&ID) {}
35
36 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
37 AU.addPreservedID(MachineLoopInfoID);
38 AU.addPreservedID(MachineDominatorsID);
39 MachineFunctionPass::getAnalysisUsage(AU);
40 }
41
42 virtual bool runOnMachineFunction(MachineFunction &MF);
43
44 virtual const char *getPassName() const { return "X86 FP_REG_KILL inserter"; }
45 };
46 char FPRegKiller::ID = 0;
47 }
48
49 FunctionPass *llvm::createX87FPRegKillInserterPass() { return new FPRegKiller(); }
50
51 bool FPRegKiller::runOnMachineFunction(MachineFunction &MF) {
52 // If we are emitting FP stack code, scan the basic block to determine if this
53 // block defines any FP values. If so, put an FP_REG_KILL instruction before
54 // the terminator of the block.
55
56 // Note that FP stack instructions are used in all modes for long double,
57 // so we always need to do this check.
58 // Also note that it's possible for an FP stack register to be live across
59 // an instruction that produces multiple basic blocks (SSE CMOV) so we
60 // must check all the generated basic blocks.
61
62 // Scan all of the machine instructions in these MBBs, checking for FP
63 // stores. (RFP32 and RFP64 will not exist in SSE mode, but RFP80 might.)
64
65 // Fast-path: If nothing is using the x87 registers, we don't need to do
66 // any scanning.
67 MachineRegisterInfo &MRI = MF.getRegInfo();
68 if (MRI.getRegClassVirtRegs(X86::RFP80RegisterClass).empty() &&
69 MRI.getRegClassVirtRegs(X86::RFP64RegisterClass).empty() &&
70 MRI.getRegClassVirtRegs(X86::RFP32RegisterClass).empty())
71 return false;
72
73 bool Changed = false;
74 const X86Subtarget &Subtarget = MF.getTarget().getSubtarget();
75 MachineFunction::iterator MBBI = MF.begin();
76 MachineFunction::iterator EndMBB = MF.end();
77 for (; MBBI != EndMBB; ++MBBI) {
78 MachineBasicBlock *MBB = MBBI;
79
80 // If this block returns, ignore it. We don't want to insert an FP_REG_KILL
81 // before the return.
82 if (!MBB->empty()) {
83 MachineBasicBlock::iterator EndI = MBB->end();
84 --EndI;
85 if (EndI->getDesc().isReturn())
86 continue;
87 }
88
89 bool ContainsFPCode = false;
90 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
91 !ContainsFPCode && I != E; ++I) {
92 if (I->getNumOperands() != 0 && I->getOperand(0).isReg()) {
93 const TargetRegisterClass *clas;
94 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
95 if (I->getOperand(op).isReg() && I->getOperand(op).isDef() &&
96 TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()) &&
97 ((clas = MRI.getRegClass(I->getOperand(op).getReg())) ==
98 X86::RFP32RegisterClass ||
99 clas == X86::RFP64RegisterClass ||
100 clas == X86::RFP80RegisterClass)) {
101 ContainsFPCode = true;
102 break;
103 }
104 }
105 }
106 }
107 // Check PHI nodes in successor blocks. These PHI's will be lowered to have
108 // a copy of the input value in this block. In SSE mode, we only care about
109 // 80-bit values.
110 if (!ContainsFPCode) {
111 // Final check, check LLVM BB's that are successors to the LLVM BB
112 // corresponding to BB for FP PHI nodes.
113 const BasicBlock *LLVMBB = MBB->getBasicBlock();
114 const PHINode *PN;
115 for (succ_const_iterator SI = succ_begin(LLVMBB), E = succ_end(LLVMBB);
116 !ContainsFPCode && SI != E; ++SI) {
117 for (BasicBlock::const_iterator II = SI->begin();
118 (PN = dyn_cast(II)); ++II) {
119 if (PN->getType()==Type::X86_FP80Ty ||
120 (!Subtarget.hasSSE1() && PN->getType()->isFloatingPoint()) ||
121 (!Subtarget.hasSSE2() && PN->getType()==Type::DoubleTy)) {
122 ContainsFPCode = true;
123 break;
124 }
125 }
126 }
127 }
128 // Finally, if we found any FP code, emit the FP_REG_KILL instruction.
129 if (ContainsFPCode) {
130 BuildMI(*MBB, MBBI->getFirstTerminator(),
131 MF.getTarget().getInstrInfo()->get(X86::FP_REG_KILL));
132 ++NumFPKill;
133 Changed = true;
134 }
135 }
136
137 return Changed;
138 }
4040 #include "llvm/ADT/Statistic.h"
4141 using namespace llvm;
4242
43 STATISTIC(NumFPKill , "Number of FP_REG_KILL instructions added");
4443 STATISTIC(NumLoadMoved, "Number of loads moved below TokenFactor");
4544
4645 //===----------------------------------------------------------------------===//
138137 /// InstructionSelect - This callback is invoked by
139138 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
140139 virtual void InstructionSelect();
141
142 /// InstructionSelectPostProcessing - Post processing of selected and
143 /// scheduled basic blocks.
144 virtual void InstructionSelectPostProcessing();
145140
146141 virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF);
147142
662657 CurDAG->RemoveDeadNodes();
663658 }
664659
665 void X86DAGToDAGISel::InstructionSelectPostProcessing() {
666 // If we are emitting FP stack code, scan the basic block to determine if this
667 // block defines any FP values. If so, put an FP_REG_KILL instruction before
668 // the terminator of the block.
669
670 // Note that FP stack instructions are used in all modes for long double,
671 // so we always need to do this check.
672 // Also note that it's possible for an FP stack register to be live across
673 // an instruction that produces multiple basic blocks (SSE CMOV) so we
674 // must check all the generated basic blocks.
675
676 // Scan all of the machine instructions in these MBBs, checking for FP
677 // stores. (RFP32 and RFP64 will not exist in SSE mode, but RFP80 might.)
678 MachineFunction::iterator MBBI = CurBB;
679 MachineFunction::iterator EndMBB = BB; ++EndMBB;
680 for (; MBBI != EndMBB; ++MBBI) {
681 MachineBasicBlock *MBB = MBBI;
682
683 // If this block returns, ignore it. We don't want to insert an FP_REG_KILL
684 // before the return.
685 if (!MBB->empty()) {
686 MachineBasicBlock::iterator EndI = MBB->end();
687 --EndI;
688 if (EndI->getDesc().isReturn())
689 continue;
690 }
691
692 bool ContainsFPCode = false;
693 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
694 !ContainsFPCode && I != E; ++I) {
695 if (I->getNumOperands() != 0 && I->getOperand(0).isReg()) {
696 const TargetRegisterClass *clas;
697 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
698 if (I->getOperand(op).isReg() && I->getOperand(op).isDef() &&
699 TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()) &&
700 ((clas = RegInfo->getRegClass(I->getOperand(0).getReg())) ==
701 X86::RFP32RegisterClass ||
702 clas == X86::RFP64RegisterClass ||
703 clas == X86::RFP80RegisterClass)) {
704 ContainsFPCode = true;
705 break;
706 }
707 }
708 }
709 }
710 // Check PHI nodes in successor blocks. These PHI's will be lowered to have
711 // a copy of the input value in this block. In SSE mode, we only care about
712 // 80-bit values.
713 if (!ContainsFPCode) {
714 // Final check, check LLVM BB's that are successors to the LLVM BB
715 // corresponding to BB for FP PHI nodes.
716 const BasicBlock *LLVMBB = BB->getBasicBlock();
717 const PHINode *PN;
718 for (succ_const_iterator SI = succ_begin(LLVMBB), E = succ_end(LLVMBB);
719 !ContainsFPCode && SI != E; ++SI) {
720 for (BasicBlock::const_iterator II = SI->begin();
721 (PN = dyn_cast(II)); ++II) {
722 if (PN->getType()==Type::X86_FP80Ty ||
723 (!Subtarget->hasSSE1() && PN->getType()->isFloatingPoint()) ||
724 (!Subtarget->hasSSE2() && PN->getType()==Type::DoubleTy)) {
725 ContainsFPCode = true;
726 break;
727 }
728 }
729 }
730 }
731 // Finally, if we found any FP code, emit the FP_REG_KILL instruction.
732 if (ContainsFPCode) {
733 BuildMI(*MBB, MBBI->getFirstTerminator(),
734 TM.getInstrInfo()->get(X86::FP_REG_KILL));
735 ++NumFPKill;
736 }
737 }
738 }
739
740660 /// EmitSpecialCodeForMain - Emit any code that needs to be executed only in
741661 /// the main function.
742662 void X86DAGToDAGISel::EmitSpecialCodeForMain(MachineBasicBlock *BB,
187187 if (EnableFastISel)
188188 PM.add(createDeadMachineInstructionElimPass());
189189
190 // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
191 PM.add(createX87FPRegKillInserterPass());
192
190193 return false;
191194 }
192195