llvm.org GIT mirror llvm / bc56501
Fix calling convention on ARM if vfp2+ is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109009 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 9 years ago
2 changed file(s) with 29 addition(s) and 7 deletion(s). Raw diff Collapse all Expand all
830830 CCState &State, bool CanFail) {
831831 static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
832832 static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
833
834 unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2);
833 static const unsigned ShadowRegList[] = { ARM::R0, ARM::R1 };
834
835 unsigned Reg = State.AllocateReg(HiRegList, ShadowRegList, 2);
835836 if (Reg == 0) {
836837 // For the 2nd half of a v2f64, do not just fail.
837838 if (CanFail)
848849 for (i = 0; i < 2; ++i)
849850 if (HiRegList[i] == Reg)
850851 break;
852
853 unsigned T = State.AllocateReg(LoRegList[i]);
854 assert(T == LoRegList[i] && "Could not allocate register");
851855
852856 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
853857 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i],
None ; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=ELF
1 ; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
0 ; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+vfp2 | FileCheck %s -check-prefix=ELF
1 ; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+vfp2 | FileCheck %s -check-prefix=DARWIN
22
3 define i32 @f(i32 %a, i64 %b) {
3 define i32 @f1(i32 %a, i64 %b) {
4 ; ELF: f1:
45 ; ELF: mov r0, r2
6 ; DARWIN: f1:
57 ; DARWIN: mov r0, r1
6 %tmp = call i32 @g(i64 %b)
8 %tmp = call i32 @g1(i64 %b)
79 ret i32 %tmp
810 }
911
10 declare i32 @g(i64)
12 ; test that allocating the double to r2/r3 makes r1 unavailable on gnueabi.
13 define i32 @f2() nounwind optsize {
14 ; ELF: f2:
15 ; ELF: mov r0, #128
16 ; ELF: str r0, [sp]
17 ; DARWIN: f2:
18 ; DARWIN: mov r3, #128
19 entry:
20 %0 = tail call i32 (i32, ...)* @g2(i32 5, double 1.600000e+01, i32 128) nounwind optsize ; [#uses=1]
21 %not. = icmp ne i32 %0, 128 ; [#uses=1]
22 %.0 = zext i1 %not. to i32 ; [#uses=1]
23 ret i32 %.0
24 }
25
26 declare i32 @g1(i64)
27
28 declare i32 @g2(i32 %i, ...)