llvm.org GIT mirror llvm / bc420a0
[MachineSinking] Clear kill flag of all operands at all their uses. When sinking an instruction it might be moved past the original last use of one of its operands. This last use has the kill flag set and the verifier will obviously complain about this. Before Machine Sinking (AArch64): %vreg3<def> = ASRVXr %vreg1, %vreg2<kill> %XZR<def> = SUBSXrs %vreg4, %vreg1<kill>, 160, %NZCV<imp-def> ... After Machine Sinking: %XZR<def> = SUBSXrs %vreg4, %vreg1<kill>, 160, %NZCV<imp-def> ... %vreg3<def> = ASRVXr %vreg1, %vreg2<kill> This fix clears all the kill flags in all instruction that use the same operands as the instruction that is being sunk. This fixes rdar://problem/18180996. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216803 91177308-0d34-0410-b5e6-96231b3b80d8 Juergen Ributzka 6 years ago
2 changed file(s) with 40 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
735735 ++MachineBasicBlock::iterator(DbgMI));
736736 }
737737
738 // Conservatively, clear any kill flags, since it's possible that they are no
739 // longer correct.
740 MI->clearKillInfo();
738 // When sinking the instruction the live time of its operands can be extended
739 // bejond their original last use (marked with a kill flag). Conservatively
740 // clear the kill flag in all instructions that use the same operand
741 // registers.
742 for (auto &MO : MI->uses())
743 if (MO.isReg() && MO.isUse()) {
744 // Preserve the kill flag for this instruction.
745 bool IsKill = MO.isKill();
746 // Clear the kill flag in all instruction that use this operand.
747 MRI->clearKillFlags(MO.getReg());
748 // Restore the kill flag for only this instruction.
749 MO.setIsKill(IsKill);
750 }
741751
742752 return true;
743753 }
0 ; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs < %s
1
2 define void @test() {
3 %sext = shl i64 undef, 32
4 %1 = ashr exact i64 %sext, 32
5 %2 = icmp sgt i64 undef, %1
6 br i1 %2, label %3, label %.critedge1
7
8 ;
9 %4 = getelementptr inbounds i32* undef, i64 %1
10 %5 = load i32* %4, align 4
11 br i1 undef, label %6, label %.critedge1
12
13 ;
14 %7 = and i32 %5, 255
15 %8 = icmp eq i32 %7, 255
16 br i1 %8, label %.lr.ph, label %._crit_edge
17
18 .lr.ph: ; preds = %.lr.ph, %6
19 br i1 undef, label %.lr.ph, label %.critedge1
20
21 ._crit_edge: ; preds = %6
22 ret void
23
24 .critedge1: ; preds = %.lr.ph, %3, %0
25 ret void
26 }