llvm.org GIT mirror llvm / bb539bf
Add AVX2 support for vselect of v32i8 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144187 91177308-0d34-0410-b5e6-96231b3b80d8 Nadav Rotem 8 years ago
3 changed file(s) with 27 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
10491049 setOperationAction(ISD::MUL, MVT::v4i64, Custom);
10501050 setOperationAction(ISD::MUL, MVT::v8i32, Legal);
10511051 setOperationAction(ISD::MUL, MVT::v16i16, Legal);
1052
1053 setOperationAction(ISD::VSELECT, MVT::v32i8, Legal);
10521054 // Don't lower v32i8 because there is no 128-bit byte mul
10531055 } else {
10541056 setOperationAction(ISD::ADD, MVT::v4i64, Custom);
65656565 def : Pat<(v4f64 (vselect (v4i64 VR256:$mask), (v4f64 VR256:$src1),
65666566 (v4f64 VR256:$src2))),
65676567 (VBLENDVPDYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
6568 }
6569
6570 let Predicates = [HasAVX2] in {
6571 def : Pat<(v32i8 (vselect (v32i8 VR256:$mask), (v32i8 VR256:$src1),
6572 (v32i8 VR256:$src2))),
6573 (VPBLENDVBYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
65686574 }
65696575
65706576 /// SS41I_ternary_int - SSE 4.1 ternary operator
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
11
2 ; CHECK: vpandn
23 ; CHECK: vpandn %ymm
4 ; CHECK: ret
35 define <4 x i64> @vpandn(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
46 entry:
57 ; Force the execution domain with an add.
911 ret <4 x i64> %x
1012 }
1113
14 ; CHECK: vpand
1215 ; CHECK: vpand %ymm
16 ; CHECK: ret
1317 define <4 x i64> @vpand(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
1418 entry:
1519 ; Force the execution domain with an add.
1822 ret <4 x i64> %x
1923 }
2024
25 ; CHECK: vpor
2126 ; CHECK: vpor %ymm
27 ; CHECK: ret
2228 define <4 x i64> @vpor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
2329 entry:
2430 ; Force the execution domain with an add.
2733 ret <4 x i64> %x
2834 }
2935
36 ; CHECK: vpxor
3037 ; CHECK: vpxor %ymm
38 ; CHECK: ret
3139 define <4 x i64> @vpxor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
3240 entry:
3341 ; Force the execution domain with an add.
3543 %x = xor <4 x i64> %a2, %b
3644 ret <4 x i64> %x
3745 }
46
47
48
49 ; CHECK: vpblendvb
50 ; CHECK: vpblendvb %ymm
51 ; CHECK: ret
52 define <32 x i8> @vpblendvb(<32 x i8> %x, <32 x i8> %y) {
53 %min_is_x = icmp ult <32 x i8> %x, %y
54 %min = select <32 x i1> %min_is_x, <32 x i8> %x, <32 x i8> %y
55 ret <32 x i8> %min
56 }