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[ARM] Fix unwind information for floating point registers Fixes the unwind information generated for floating-point registers. Previously, all padding registers were assumed to be four bytes wide. Now, the width of the register is used to specify the amount of padding. Patch by Jackson Woodruff! Differential revision: https://reviews.llvm.org/D51494 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342545 91177308-0d34-0410-b5e6-96231b3b80d8 Oliver Stannard 1 year, 9 months ago
2 changed file(s) with 22 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
10701070 MCTargetStreamer &TS = *OutStreamer->getTargetStreamer();
10711071 ARMTargetStreamer &ATS = static_cast(TS);
10721072 const MachineFunction &MF = *MI->getParent()->getParent();
1073 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
1073 const TargetRegisterInfo *TargetRegInfo =
1074 MF.getSubtarget().getRegisterInfo();
1075 const MachineRegisterInfo &MachineRegInfo = MF.getRegInfo();
10741076 const ARMFunctionInfo &AFI = *MF.getInfo();
10751077
1076 unsigned FramePtr = RegInfo->getFrameRegister(MF);
1078 unsigned FramePtr = TargetRegInfo->getFrameRegister(MF);
10771079 unsigned Opc = MI->getOpcode();
10781080 unsigned SrcReg, DstReg;
10791081
11301132 if (MO.isUndef()) {
11311133 assert(RegList.empty() &&
11321134 "Pad registers must come before restored ones");
1133 Pad += 4;
1135 unsigned Width =
1136 TargetRegInfo->getRegSizeInBits(MO.getReg(), MachineRegInfo) / 8;
1137 Pad += Width;
11341138 continue;
11351139 }
11361140 RegList.push_back(MO.getReg());
0 ; RUN: llc < %s -mtriple=armv7a-arm-none-eabi | FileCheck %s
1
2 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
3 target triple = "armv7-arm-none-eabi"
4
5 define void @foo() minsize {
6 entry:
7 ; CHECK: .vsave {[[SAVE_REG:d[0-9]+]]}
8 ; CHECK-NEXT: .pad #8
9 ; CHECK-NEXT: vpush {[[PAD_REG:d[0-9]+]], [[SAVE_REG]]}
10 ; CHECK: vpop {[[PAD_REG]], [[SAVE_REG]]}
11 %a = alloca i32, align 4
12 call void asm sideeffect "", "r,~{d8}"(i32* %a)
13 ret void
14 }