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Add parameter to getDwarfRegNum to permit targets to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8 Dale Johannesen 12 years ago
20 changed file(s) with 32 addition(s) and 32 deletion(s). Raw diff Collapse all Expand all
676676 /// Debug information queries.
677677
678678 /// getDwarfRegNum - Map a target register to an equivalent dwarf register
679 /// number. Returns -1 if there is no equivalent value.
680 virtual int getDwarfRegNum(unsigned RegNum) const = 0;
679 /// number. Returns -1 if there is no equivalent value. The second
680 /// parameter allows targets to use different numberings for EH info and
681 /// deubgging info.
682 virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const = 0;
681683
682684 /// getFrameRegister - This method should return the register used as a base
683685 /// for values allocated in the current stack frame.
967967 /// EmitFrameMoves - Emit frame instructions to describe the layout of the
968968 /// frame.
969969 void EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID,
970 const std::vector &Moves) {
970 const std::vector &Moves, bool isEH) {
971971 int stackGrowth =
972972 Asm->TM.getFrameInfo()->getStackGrowthDirection() ==
973973 TargetFrameInfo::StackGrowsUp ?
10091009 } else {
10101010 Asm->EmitInt8(DW_CFA_def_cfa);
10111011 Asm->EOL("DW_CFA_def_cfa");
1012 Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Src.getRegister()));
1012 Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Src.getRegister(), isEH));
10131013 Asm->EOL("Register");
10141014 }
10151015
10251025 if (Dst.isRegister()) {
10261026 Asm->EmitInt8(DW_CFA_def_cfa_register);
10271027 Asm->EOL("DW_CFA_def_cfa_register");
1028 Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getRegister()));
1028 Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getRegister(), isEH));
10291029 Asm->EOL("Register");
10301030 } else {
10311031 assert(0 && "Machine move no supported yet.");
10321032 }
10331033 } else {
1034 unsigned Reg = RI->getDwarfRegNum(Src.getRegister());
1034 unsigned Reg = RI->getDwarfRegNum(Src.getRegister(), isEH);
10351035 int Offset = Dst.getOffset() / stackGrowth;
10361036
10371037 if (Offset < 0) {
13391339 /// provided.
13401340 void AddAddress(DIE *Die, unsigned Attribute,
13411341 const MachineLocation &Location) {
1342 unsigned Reg = RI->getDwarfRegNum(Location.getRegister());
1342 unsigned Reg = RI->getDwarfRegNum(Location.getRegister(), false);
13431343 DIEBlock *Block = new DIEBlock();
13441344
13451345 if (Location.isRegister()) {
23692369 Asm->EOL("CIE Code Alignment Factor");
23702370 Asm->EmitSLEB128Bytes(stackGrowth);
23712371 Asm->EOL("CIE Data Alignment Factor");
2372 Asm->EmitInt8(RI->getDwarfRegNum(RI->getRARegister()));
2372 Asm->EmitInt8(RI->getDwarfRegNum(RI->getRARegister(), false));
23732373 Asm->EOL("CIE RA Column");
23742374
23752375 std::vector Moves;
23762376 RI->getInitialFrameState(Moves);
23772377
2378 EmitFrameMoves(NULL, 0, Moves);
2378 EmitFrameMoves(NULL, 0, Moves, false);
23792379
23802380 Asm->EmitAlignment(2);
23812381 EmitLabel("debug_frame_common_end", 0);
24082408 "func_begin", DebugFrameInfo.Number);
24092409 Asm->EOL("FDE address range");
24102410
2411 EmitFrameMoves("func_begin", DebugFrameInfo.Number, DebugFrameInfo.Moves);
2411 EmitFrameMoves("func_begin", DebugFrameInfo.Number, DebugFrameInfo.Moves, false);
24122412
24132413 Asm->EmitAlignment(2);
24142414 EmitLabel("debug_frame_end", DebugFrameInfo.Number);
28162816 Asm->EOL("CIE Code Alignment Factor");
28172817 Asm->EmitSLEB128Bytes(stackGrowth);
28182818 Asm->EOL("CIE Data Alignment Factor");
2819 Asm->EmitInt8(RI->getDwarfRegNum(RI->getRARegister()));
2819 Asm->EmitInt8(RI->getDwarfRegNum(RI->getRARegister(), true));
28202820 Asm->EOL("CIE RA Column");
28212821
28222822 // If there is a personality, we need to indicate the functions location.
28522852 // Indicate locations of general callee saved registers in frame.
28532853 std::vector Moves;
28542854 RI->getInitialFrameState(Moves);
2855 EmitFrameMoves(NULL, 0, Moves);
2855 EmitFrameMoves(NULL, 0, Moves, true);
28562856
28572857 Asm->EmitAlignment(2);
28582858 EmitLabel("eh_frame_common_end", Index);
29142914
29152915 // Indicate locations of function specific callee saved registers in
29162916 // frame.
2917 EmitFrameMoves("eh_func_begin", EHFrameInfo.Number, EHFrameInfo.Moves);
2917 EmitFrameMoves("eh_func_begin", EHFrameInfo.Number, EHFrameInfo.Moves, true);
29182918
29192919 Asm->EmitAlignment(2);
29202920 EmitLabel("eh_frame_end", EHFrameInfo.Number);
16591659 return 0;
16601660 }
16611661
1662 int ARMRegisterInfo::getDwarfRegNum(unsigned RegNum) const {
1662 int ARMRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
16631663 assert(0 && "What is the dwarf register number");
16641664 return -1;
16651665 }
117117 unsigned getEHExceptionRegister() const;
118118 unsigned getEHHandlerRegister() const;
119119
120 int getDwarfRegNum(unsigned RegNum) const;
120 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
121121 };
122122
123123 } // end namespace llvm
479479 return 0;
480480 }
481481
482 int AlphaRegisterInfo::getDwarfRegNum(unsigned RegNum) const {
482 int AlphaRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
483483 assert(0 && "What is the dwarf register number");
484484 return -1;
485485 }
9292 unsigned getEHExceptionRegister() const;
9393 unsigned getEHHandlerRegister() const;
9494
95 int getDwarfRegNum(unsigned RegNum) const;
95 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
9696
9797 static std::string getPrettyName(unsigned reg);
9898 };
450450 return 0;
451451 }
452452
453 int IA64RegisterInfo::getDwarfRegNum(unsigned RegNum) const {
453 int IA64RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
454454 assert(0 && "What is the dwarf register number");
455455 return -1;
456456 }
8484 unsigned getEHExceptionRegister() const;
8585 unsigned getEHHandlerRegister() const;
8686
87 int getDwarfRegNum(unsigned RegNum) const;
87 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
8888 };
8989
9090 } // End llvm namespace
538538 }
539539
540540 int MipsRegisterInfo::
541 getDwarfRegNum(unsigned RegNum) const {
541 getDwarfRegNum(unsigned RegNum, bool isEH) const {
542542 assert(0 && "What is the dwarf register number");
543543 return -1;
544544 }
9696 unsigned getEHExceptionRegister() const;
9797 unsigned getEHHandlerRegister() const;
9898
99 int getDwarfRegNum(unsigned RegNum) const;
99 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
100100 };
101101
102102 } // end namespace llvm
12761276 return !Subtarget.isPPC64() ? PPC::R4 : PPC::X4;
12771277 }
12781278
1279 int PPCRegisterInfo::getDwarfRegNum(unsigned RegNum) const {
1279 int PPCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
12801280 // FIXME: Most probably dwarf numbers differs for Linux and Darwin
12811281 return PPCGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
12821282 }
116116 unsigned getEHExceptionRegister() const;
117117 unsigned getEHHandlerRegister() const;
118118
119 int getDwarfRegNum(unsigned RegNum) const;
119 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
120120 };
121121
122122 } // end namespace llvm
5757 UsedDirective = "\t.no_dead_strip\t";
5858 WeakRefDirective = "\t.weak_reference\t";
5959 HiddenDirective = "\t.private_extern\t";
60 SupportsExceptionHandling = false;
60 SupportsExceptionHandling = true;
6161 NeedsIndirectEncoding = true;
6262 BSSSection = 0;
6363
332332 return 0;
333333 }
334334
335 int SparcRegisterInfo::getDwarfRegNum(unsigned RegNum) const {
335 int SparcRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
336336 assert(0 && "What is the dwarf register number");
337337 return -1;
338338 }
9696 unsigned getEHExceptionRegister() const;
9797 unsigned getEHHandlerRegister() const;
9898
99 int getDwarfRegNum(unsigned RegNum) const;
99 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
100100 };
101101
102102 } // end namespace llvm
383383 /// e.g. r8, xmm8, etc.
384384 bool Emitter::isX86_64ExtendedReg(const MachineOperand &MO) {
385385 if (!MO.isRegister()) return false;
386 unsigned RegNo = MO.getReg();
387386 switch (MO.getReg()) {
388387 default: break;
389388 case X86::R8: case X86::R9: case X86::R10: case X86::R11:
656656 // getDwarfRegNum - This function maps LLVM register identifiers to the
657657 // Dwarf specific numbering, used in debug info and exception tables.
658658
659 int X86RegisterInfo::getDwarfRegNum(unsigned RegNo) const {
659 int X86RegisterInfo::getDwarfRegNum(unsigned RegNo, bool isEH) const {
660660 const X86Subtarget *Subtarget = &TM.getSubtarget();
661661 unsigned Flavour = DWARFFlavour::X86_64;
662662 if (!Subtarget->is64Bit()) {
8686
8787 /// getDwarfRegNum - allows modification of X86GenRegisterInfo::getDwarfRegNum
8888 /// (created by TableGen) for target dependencies.
89 int getDwarfRegNum(unsigned RegNum) const;
89 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
9090
9191 /// Code Generation virtual methods...
9292 ///
100100 DwarfMacInfoSection = ".section __DWARF,__debug_macinfo,regular,debug";
101101
102102 // Exceptions handling
103 if (!Subtarget->is64Bit())
104 SupportsExceptionHandling = true;
103 SupportsExceptionHandling = true;
105104 AbsoluteEHSectionOffsets = false;
106105 DwarfEHFrameSection =
107106 ".section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support";
6161 << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
6262 << " virtual int getDwarfRegNumFull(unsigned RegNum, "
6363 << "unsigned Flavour) const;\n"
64 << " virtual int getDwarfRegNum(unsigned RegNum) const = 0;\n"
64 << " virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const = 0;\n"
6565 << " unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n"
6666 << "};\n\n";
6767