llvm.org GIT mirror llvm / b85e4eb
rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is for pre-2.9 bitcode files. We keep x86 unaligned loads, movnt, crc32, and the target indep prefetch change. As usual, updating the testsuite is a PITA. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133337 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 8 years ago
85 changed file(s) with 1406 addition(s) and 4271 deletion(s). Raw diff Collapse all Expand all
4141 Module *M = F->getParent();
4242 switch (Name[5]) {
4343 default: break;
44 case 'a':
45 // This upgrades the llvm.atomic.lcs, llvm.atomic.las, llvm.atomic.lss,
46 // and atomics with default address spaces to their new names to their new
47 // function name (e.g. llvm.atomic.add.i32 => llvm.atomic.add.i32.p0i32)
48 if (Name.compare(5,7,"atomic.",7) == 0) {
49 if (Name.compare(12,3,"lcs",3) == 0) {
50 std::string::size_type delim = Name.find('.',12);
51 F->setName("llvm.atomic.cmp.swap" + Name.substr(delim) +
52 ".p0" + Name.substr(delim+1));
53 NewFn = F;
54 return true;
55 }
56 else if (Name.compare(12,3,"las",3) == 0) {
57 std::string::size_type delim = Name.find('.',12);
58 F->setName("llvm.atomic.load.add"+Name.substr(delim)
59 + ".p0" + Name.substr(delim+1));
60 NewFn = F;
61 return true;
62 }
63 else if (Name.compare(12,3,"lss",3) == 0) {
64 std::string::size_type delim = Name.find('.',12);
65 F->setName("llvm.atomic.load.sub"+Name.substr(delim)
66 + ".p0" + Name.substr(delim+1));
67 NewFn = F;
68 return true;
69 }
70 else if (Name.rfind(".p") == std::string::npos) {
71 // We don't have an address space qualifier so this has be upgraded
72 // to the new name. Copy the type name at the end of the intrinsic
73 // and add to it
74 std::string::size_type delim = Name.find_last_of('.');
75 assert(delim != std::string::npos && "can not find type");
76 F->setName(Name + ".p0" + Name.substr(delim+1));
77 NewFn = F;
78 return true;
79 }
80 } else if (Name.compare(5, 9, "arm.neon.", 9) == 0) {
81 if (((Name.compare(14, 5, "vmovl", 5) == 0 ||
82 Name.compare(14, 5, "vaddl", 5) == 0 ||
83 Name.compare(14, 5, "vsubl", 5) == 0 ||
84 Name.compare(14, 5, "vaddw", 5) == 0 ||
85 Name.compare(14, 5, "vsubw", 5) == 0 ||
86 Name.compare(14, 5, "vmlal", 5) == 0 ||
87 Name.compare(14, 5, "vmlsl", 5) == 0 ||
88 Name.compare(14, 5, "vabdl", 5) == 0 ||
89 Name.compare(14, 5, "vabal", 5) == 0) &&
90 (Name.compare(19, 2, "s.", 2) == 0 ||
91 Name.compare(19, 2, "u.", 2) == 0)) ||
92
93 (Name.compare(14, 4, "vaba", 4) == 0 &&
94 (Name.compare(18, 2, "s.", 2) == 0 ||
95 Name.compare(18, 2, "u.", 2) == 0)) ||
96
97 (Name.compare(14, 6, "vmovn.", 6) == 0)) {
98
99 // Calls to these are transformed into IR without intrinsics.
100 NewFn = 0;
101 return true;
102 }
103 // Old versions of NEON ld/st intrinsics are missing alignment arguments.
104 bool isVLd = (Name.compare(14, 3, "vld", 3) == 0);
105 bool isVSt = (Name.compare(14, 3, "vst", 3) == 0);
106 if (isVLd || isVSt) {
107 unsigned NumVecs = Name.at(17) - '0';
108 if (NumVecs == 0 || NumVecs > 4)
109 return false;
110 bool isLaneOp = (Name.compare(18, 5, "lane.", 5) == 0);
111 if (!isLaneOp && Name.at(18) != '.')
112 return false;
113 unsigned ExpectedArgs = 2; // for the address and alignment
114 if (isVSt || isLaneOp)
115 ExpectedArgs += NumVecs;
116 if (isLaneOp)
117 ExpectedArgs += 1; // for the lane number
118 unsigned NumP = FTy->getNumParams();
119 if (NumP != ExpectedArgs - 1)
120 return false;
121
122 // Change the name of the old (bad) intrinsic, because
123 // its type is incorrect, but we cannot overload that name.
124 F->setName("");
125
126 // One argument is missing: add the alignment argument.
127 std::vector NewParams;
128 for (unsigned p = 0; p < NumP; ++p)
129 NewParams.push_back(FTy->getParamType(p));
130 NewParams.push_back(Type::getInt32Ty(F->getContext()));
131 FunctionType *NewFTy = FunctionType::get(FTy->getReturnType(),
132 NewParams, false);
133 NewFn = cast(M->getOrInsertFunction(Name, NewFTy));
134 return true;
135 }
136 }
137 break;
138 case 'b':
139 // This upgrades the name of the llvm.bswap intrinsic function to only use
140 // a single type name for overloading. We only care about the old format
141 // 'llvm.bswap.i*.i*', so check for 'bswap.' and then for there being
142 // a '.' after 'bswap.'
143 if (Name.compare(5,6,"bswap.",6) == 0) {
144 std::string::size_type delim = Name.find('.',11);
145
146 if (delim != std::string::npos) {
147 // Construct the new name as 'llvm.bswap' + '.i*'
148 F->setName(Name.substr(0,10)+Name.substr(delim));
149 NewFn = F;
150 return true;
151 }
152 }
153 break;
154
155 case 'c':
156 // We only want to fix the 'llvm.ct*' intrinsics which do not have the
157 // correct return type, so we check for the name, and then check if the
158 // return type does not match the parameter type.
159 if ( (Name.compare(5,5,"ctpop",5) == 0 ||
160 Name.compare(5,4,"ctlz",4) == 0 ||
161 Name.compare(5,4,"cttz",4) == 0) &&
162 FTy->getReturnType() != FTy->getParamType(0)) {
163 // We first need to change the name of the old (bad) intrinsic, because
164 // its type is incorrect, but we cannot overload that name. We
165 // arbitrarily unique it here allowing us to construct a correctly named
166 // and typed function below.
167 F->setName("");
168
169 // Now construct the new intrinsic with the correct name and type. We
170 // leave the old function around in order to query its type, whatever it
171 // may be, and correctly convert up to the new type.
172 NewFn = cast(M->getOrInsertFunction(Name,
173 FTy->getParamType(0),
174 FTy->getParamType(0),
175 (Type *)0));
176 return true;
177 }
178 break;
179
180 case 'e':
181 // The old llvm.eh.selector.i32 is equivalent to the new llvm.eh.selector.
182 if (Name.compare("llvm.eh.selector.i32") == 0) {
183 F->setName("llvm.eh.selector");
184 NewFn = F;
185 return true;
186 }
187 // The old llvm.eh.typeid.for.i32 is equivalent to llvm.eh.typeid.for.
188 if (Name.compare("llvm.eh.typeid.for.i32") == 0) {
189 F->setName("llvm.eh.typeid.for");
190 NewFn = F;
191 return true;
192 }
193 // Convert the old llvm.eh.selector.i64 to a call to llvm.eh.selector.
194 if (Name.compare("llvm.eh.selector.i64") == 0) {
195 NewFn = Intrinsic::getDeclaration(M, Intrinsic::eh_selector);
196 return true;
197 }
198 // Convert the old llvm.eh.typeid.for.i64 to a call to llvm.eh.typeid.for.
199 if (Name.compare("llvm.eh.typeid.for.i64") == 0) {
200 NewFn = Intrinsic::getDeclaration(M, Intrinsic::eh_typeid_for);
201 return true;
202 }
203 break;
204
205 case 'm': {
206 // This upgrades the llvm.memcpy, llvm.memmove, and llvm.memset to the
207 // new format that allows overloading the pointer for different address
208 // space (e.g., llvm.memcpy.i16 => llvm.memcpy.p0i8.p0i8.i16)
209 const char* NewFnName = NULL;
210 if (Name.compare(5,8,"memcpy.i",8) == 0) {
211 if (Name[13] == '8')
212 NewFnName = "llvm.memcpy.p0i8.p0i8.i8";
213 else if (Name.compare(13,2,"16") == 0)
214 NewFnName = "llvm.memcpy.p0i8.p0i8.i16";
215 else if (Name.compare(13,2,"32") == 0)
216 NewFnName = "llvm.memcpy.p0i8.p0i8.i32";
217 else if (Name.compare(13,2,"64") == 0)
218 NewFnName = "llvm.memcpy.p0i8.p0i8.i64";
219 } else if (Name.compare(5,9,"memmove.i",9) == 0) {
220 if (Name[14] == '8')
221 NewFnName = "llvm.memmove.p0i8.p0i8.i8";
222 else if (Name.compare(14,2,"16") == 0)
223 NewFnName = "llvm.memmove.p0i8.p0i8.i16";
224 else if (Name.compare(14,2,"32") == 0)
225 NewFnName = "llvm.memmove.p0i8.p0i8.i32";
226 else if (Name.compare(14,2,"64") == 0)
227 NewFnName = "llvm.memmove.p0i8.p0i8.i64";
228 }
229 else if (Name.compare(5,8,"memset.i",8) == 0) {
230 if (Name[13] == '8')
231 NewFnName = "llvm.memset.p0i8.i8";
232 else if (Name.compare(13,2,"16") == 0)
233 NewFnName = "llvm.memset.p0i8.i16";
234 else if (Name.compare(13,2,"32") == 0)
235 NewFnName = "llvm.memset.p0i8.i32";
236 else if (Name.compare(13,2,"64") == 0)
237 NewFnName = "llvm.memset.p0i8.i64";
238 }
239 if (NewFnName) {
240 NewFn = cast(M->getOrInsertFunction(NewFnName,
241 FTy->getReturnType(),
242 FTy->getParamType(0),
243 FTy->getParamType(1),
244 FTy->getParamType(2),
245 FTy->getParamType(3),
246 Type::getInt1Ty(F->getContext()),
247 (Type *)0));
248 return true;
249 }
250 break;
251 }
25244 case 'p':
253 // This upgrades the llvm.part.select overloaded intrinsic names to only
254 // use one type specifier in the name. We only care about the old format
255 // 'llvm.part.select.i*.i*', and solve as above with bswap.
256 if (Name.compare(5,12,"part.select.",12) == 0) {
257 std::string::size_type delim = Name.find('.',17);
258
259 if (delim != std::string::npos) {
260 // Construct a new name as 'llvm.part.select' + '.i*'
261 F->setName(Name.substr(0,16)+Name.substr(delim));
262 NewFn = F;
263 return true;
264 }
265 break;
266 }
267
268 // This upgrades the llvm.part.set intrinsics similarly as above, however
269 // we care about 'llvm.part.set.i*.i*.i*', but only the first two types
270 // must match. There is an additional type specifier after these two
271 // matching types that we must retain when upgrading. Thus, we require
272 // finding 2 periods, not just one, after the intrinsic name.
273 if (Name.compare(5,9,"part.set.",9) == 0) {
274 std::string::size_type delim = Name.find('.',14);
275
276 if (delim != std::string::npos &&
277 Name.find('.',delim+1) != std::string::npos) {
278 // Construct a new name as 'llvm.part.select' + '.i*.i*'
279 F->setName(Name.substr(0,13)+Name.substr(delim));
280 NewFn = F;
281 return true;
282 }
283 break;
284 }
285
28645 // This upgrades the llvm.prefetch intrinsic to accept one more parameter,
28746 // which is a instruction / data cache identifier. The old version only
28847 // implicitly accepted the data version.
33594 }
33695 }
33796
338 // This fixes all MMX shift intrinsic instructions to take a
339 // x86_mmx instead of a v1i64, v2i32, v4i16, or v8i8.
340 if (Name.compare(5, 8, "x86.mmx.", 8) == 0) {
341 const Type *X86_MMXTy = VectorType::getX86_MMXTy(FTy->getContext());
342
343 if (Name.compare(13, 4, "padd", 4) == 0 ||
344 Name.compare(13, 4, "psub", 4) == 0 ||
345 Name.compare(13, 4, "pmul", 4) == 0 ||
346 Name.compare(13, 5, "pmadd", 5) == 0 ||
347 Name.compare(13, 4, "pand", 4) == 0 ||
348 Name.compare(13, 3, "por", 3) == 0 ||
349 Name.compare(13, 4, "pxor", 4) == 0 ||
350 Name.compare(13, 4, "pavg", 4) == 0 ||
351 Name.compare(13, 4, "pmax", 4) == 0 ||
352 Name.compare(13, 4, "pmin", 4) == 0 ||
353 Name.compare(13, 4, "psad", 4) == 0 ||
354 Name.compare(13, 4, "psll", 4) == 0 ||
355 Name.compare(13, 4, "psrl", 4) == 0 ||
356 Name.compare(13, 4, "psra", 4) == 0 ||
357 Name.compare(13, 4, "pack", 4) == 0 ||
358 Name.compare(13, 6, "punpck", 6) == 0 ||
359 Name.compare(13, 4, "pcmp", 4) == 0) {
360 assert(FTy->getNumParams() == 2 && "MMX intrinsic takes 2 args!");
361 const Type *SecondParamTy = X86_MMXTy;
362
363 if (Name.compare(13, 5, "pslli", 5) == 0 ||
364 Name.compare(13, 5, "psrli", 5) == 0 ||
365 Name.compare(13, 5, "psrai", 5) == 0)
366 SecondParamTy = FTy->getParamType(1);
367
368 // Don't do anything if it has the correct types.
369 if (FTy->getReturnType() == X86_MMXTy &&
370 FTy->getParamType(0) == X86_MMXTy &&
371 FTy->getParamType(1) == SecondParamTy)
372 break;
373
374 // We first need to change the name of the old (bad) intrinsic, because
375 // its type is incorrect, but we cannot overload that name. We
376 // arbitrarily unique it here allowing us to construct a correctly named
377 // and typed function below.
378 F->setName("");
379
380 // Now construct the new intrinsic with the correct name and type. We
381 // leave the old function around in order to query its type, whatever it
382 // may be, and correctly convert up to the new type.
383 NewFn = cast(M->getOrInsertFunction(Name,
384 X86_MMXTy, X86_MMXTy,
385 SecondParamTy, (Type*)0));
386 return true;
387 }
388
389 if (Name.compare(13, 8, "maskmovq", 8) == 0) {
390 // Don't do anything if it has the correct types.
391 if (FTy->getParamType(0) == X86_MMXTy &&
392 FTy->getParamType(1) == X86_MMXTy)
393 break;
394
395 F->setName("");
396 NewFn = cast(M->getOrInsertFunction(Name,
397 FTy->getReturnType(),
398 X86_MMXTy,
399 X86_MMXTy,
400 FTy->getParamType(2),
401 (Type*)0));
402 return true;
403 }
404
405 if (Name.compare(13, 8, "pmovmskb", 8) == 0) {
406 if (FTy->getParamType(0) == X86_MMXTy)
407 break;
408
409 F->setName("");
410 NewFn = cast(M->getOrInsertFunction(Name,
411 FTy->getReturnType(),
412 X86_MMXTy,
413 (Type*)0));
414 return true;
415 }
416
417 if (Name.compare(13, 5, "movnt", 5) == 0) {
418 if (FTy->getParamType(1) == X86_MMXTy)
419 break;
420
421 F->setName("");
422 NewFn = cast(M->getOrInsertFunction(Name,
423 FTy->getReturnType(),
424 FTy->getParamType(0),
425 X86_MMXTy,
426 (Type*)0));
427 return true;
428 }
429
430 if (Name.compare(13, 7, "palignr", 7) == 0) {
431 if (FTy->getReturnType() == X86_MMXTy &&
432 FTy->getParamType(0) == X86_MMXTy &&
433 FTy->getParamType(1) == X86_MMXTy)
434 break;
435
436 F->setName("");
437 NewFn = cast(M->getOrInsertFunction(Name,
438 X86_MMXTy,
439 X86_MMXTy,
440 X86_MMXTy,
441 FTy->getParamType(2),
442 (Type*)0));
443 return true;
444 }
445
446 if (Name.compare(13, 5, "pextr", 5) == 0) {
447 if (FTy->getParamType(0) == X86_MMXTy)
448 break;
449
450 F->setName("");
451 NewFn = cast(M->getOrInsertFunction(Name,
452 FTy->getReturnType(),
453 X86_MMXTy,
454 FTy->getParamType(1),
455 (Type*)0));
456 return true;
457 }
458
459 if (Name.compare(13, 5, "pinsr", 5) == 0) {
460 if (FTy->getReturnType() == X86_MMXTy &&
461 FTy->getParamType(0) == X86_MMXTy)
462 break;
463
464 F->setName("");
465 NewFn = cast(M->getOrInsertFunction(Name,
466 X86_MMXTy,
467 X86_MMXTy,
468 FTy->getParamType(1),
469 FTy->getParamType(2),
470 (Type*)0));
471 return true;
472 }
473
474 if (Name.compare(13, 12, "cvtsi32.si64", 12) == 0) {
475 if (FTy->getReturnType() == X86_MMXTy)
476 break;
477
478 F->setName("");
479 NewFn = cast(M->getOrInsertFunction(Name,
480 X86_MMXTy,
481 FTy->getParamType(0),
482 (Type*)0));
483 return true;
484 }
485
486 if (Name.compare(13, 12, "cvtsi64.si32", 12) == 0) {
487 if (FTy->getParamType(0) == X86_MMXTy)
488 break;
489
490 F->setName("");
491 NewFn = cast(M->getOrInsertFunction(Name,
492 FTy->getReturnType(),
493 X86_MMXTy,
494 (Type*)0));
495 return true;
496 }
497
498 if (Name.compare(13, 8, "vec.init", 8) == 0) {
499 if (FTy->getReturnType() == X86_MMXTy)
500 break;
501
502 F->setName("");
503
504 if (Name.compare(21, 2, ".b", 2) == 0)
505 NewFn = cast(M->getOrInsertFunction(Name,
506 X86_MMXTy,
507 FTy->getParamType(0),
508 FTy->getParamType(1),
509 FTy->getParamType(2),
510 FTy->getParamType(3),
511 FTy->getParamType(4),
512 FTy->getParamType(5),
513 FTy->getParamType(6),
514 FTy->getParamType(7),
515 (Type*)0));
516 else if (Name.compare(21, 2, ".w", 2) == 0)
517 NewFn = cast(M->getOrInsertFunction(Name,
518 X86_MMXTy,
519 FTy->getParamType(0),
520 FTy->getParamType(1),
521 FTy->getParamType(2),
522 FTy->getParamType(3),
523 (Type*)0));
524 else if (Name.compare(21, 2, ".d", 2) == 0)
525 NewFn = cast(M->getOrInsertFunction(Name,
526 X86_MMXTy,
527 FTy->getParamType(0),
528 FTy->getParamType(1),
529 (Type*)0));
530 return true;
531 }
532
533
534 if (Name.compare(13, 9, "vec.ext.d", 9) == 0) {
535 if (FTy->getReturnType() == X86_MMXTy &&
536 FTy->getParamType(0) == X86_MMXTy)
537 break;
538
539 F->setName("");
540 NewFn = cast(M->getOrInsertFunction(Name,
541 X86_MMXTy,
542 X86_MMXTy,
543 FTy->getParamType(1),
544 (Type*)0));
545 return true;
546 }
547
548 if (Name.compare(13, 9, "emms", 4) == 0 ||
549 Name.compare(13, 9, "femms", 5) == 0) {
550 NewFn = 0;
551 break;
552 }
553
554 // We really shouldn't get here ever.
555 assert(0 && "Invalid MMX intrinsic!");
556 break;
557 } else if (Name.compare(5,17,"x86.sse2.loadh.pd",17) == 0 ||
558 Name.compare(5,17,"x86.sse2.loadl.pd",17) == 0 ||
559 Name.compare(5,16,"x86.sse2.movl.dq",16) == 0 ||
560 Name.compare(5,15,"x86.sse2.movs.d",15) == 0 ||
561 Name.compare(5,16,"x86.sse2.shuf.pd",16) == 0 ||
562 Name.compare(5,18,"x86.sse2.unpckh.pd",18) == 0 ||
563 Name.compare(5,18,"x86.sse2.unpckl.pd",18) == 0 ||
564 Name.compare(5,20,"x86.sse2.punpckh.qdq",20) == 0 ||
565 Name.compare(5,20,"x86.sse2.punpckl.qdq",20) == 0) {
566 // Calls to these intrinsics are transformed into ShuffleVector's.
567 NewFn = 0;
568 return true;
569 } else if (Name.compare(5, 16, "x86.sse41.pmulld", 16) == 0) {
570 // Calls to these intrinsics are transformed into vector multiplies.
571 NewFn = 0;
572 return true;
573 } else if (Name.compare(5, 18, "x86.ssse3.palign.r", 18) == 0 ||
574 Name.compare(5, 22, "x86.ssse3.palign.r.128", 22) == 0) {
575 // Calls to these intrinsics are transformed into vector shuffles, shifts,
576 // or 0.
577 NewFn = 0;
578 return true;
579 } else if (Name.compare(5, 16, "x86.sse.loadu.ps", 16) == 0 ||
580 Name.compare(5, 17, "x86.sse2.loadu.dq", 17) == 0 ||
581 Name.compare(5, 17, "x86.sse2.loadu.pd", 17) == 0) {
97 if (Name.compare(5, 16, "x86.sse.loadu.ps", 16) == 0 ||
98 Name.compare(5, 17, "x86.sse2.loadu.dq", 17) == 0 ||
99 Name.compare(5, 17, "x86.sse2.loadu.pd", 17) == 0) {
582100 // Calls to these instructions are transformed into unaligned loads.
583101 NewFn = 0;
584102 return true;
585 } else if (Name.compare(5, 16, "x86.sse.movnt.ps", 16) == 0 ||
586 Name.compare(5, 17, "x86.sse2.movnt.dq", 17) == 0 ||
587 Name.compare(5, 17, "x86.sse2.movnt.pd", 17) == 0 ||
588 Name.compare(5, 17, "x86.sse2.movnt.i", 16) == 0) {
103 }
104
105 if (Name.compare(5, 16, "x86.sse.movnt.ps", 16) == 0 ||
106 Name.compare(5, 17, "x86.sse2.movnt.dq", 17) == 0 ||
107 Name.compare(5, 17, "x86.sse2.movnt.pd", 17) == 0 ||
108 Name.compare(5, 17, "x86.sse2.movnt.i", 16) == 0) {
589109 // Calls to these instructions are transformed into nontemporal stores.
590110 NewFn = 0;
591 return true;
592 } else if (Name.compare(5, 17, "x86.ssse3.pshuf.w", 17) == 0) {
593 // This is an SSE/MMX instruction.
594 const Type *X86_MMXTy = VectorType::getX86_MMXTy(FTy->getContext());
595 NewFn =
596 cast(M->getOrInsertFunction("llvm.x86.sse.pshuf.w",
597 X86_MMXTy,
598 X86_MMXTy,
599 Type::getInt8Ty(F->getContext()),
600 (Type*)0));
601111 return true;
602112 }
603113
624134 }
625135
626136 bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) {
627 StringRef Name(GV->getName());
628
629 // We are only upgrading one symbol here.
630 if (Name == ".llvm.eh.catch.all.value") {
631 GV->setName("llvm.eh.catch.all.value");
632 return true;
633 }
634
137 // Nothing to do yet.
635138 return false;
636 }
637
638 /// ExtendNEONArgs - For NEON "long" and "wide" operations, where the results
639 /// have vector elements twice as big as one or both source operands, do the
640 /// sign- or zero-extension that used to be handled by intrinsics. The
641 /// extended values are returned via V0 and V1.
642 static void ExtendNEONArgs(CallInst *CI, Value *Arg0, Value *Arg1,
643 Value *&V0, Value *&V1) {
644 Function *F = CI->getCalledFunction();
645 const std::string& Name = F->getName();
646 bool isLong = (Name.at(18) == 'l');
647 bool isSigned = (Name.at(19) == 's');
648
649 if (isSigned) {
650 if (isLong)
651 V0 = new SExtInst(Arg0, CI->getType(), "", CI);
652 else
653 V0 = Arg0;
654 V1 = new SExtInst(Arg1, CI->getType(), "", CI);
655 } else {
656 if (isLong)
657 V0 = new ZExtInst(Arg0, CI->getType(), "", CI);
658 else
659 V0 = Arg0;
660 V1 = new ZExtInst(Arg1, CI->getType(), "", CI);
661 }
662 }
663
664 /// CallVABD - As part of expanding a call to one of the old NEON vabdl, vaba,
665 /// or vabal intrinsics, construct a call to a vabd intrinsic. Examine the
666 /// name of the old intrinsic to determine whether to use a signed or unsigned
667 /// vabd intrinsic. Get the type from the old call instruction, adjusted for
668 /// half-size vector elements if the old intrinsic was vabdl or vabal.
669 static Instruction *CallVABD(CallInst *CI, Value *Arg0, Value *Arg1) {
670 Function *F = CI->getCalledFunction();
671 const std::string& Name = F->getName();
672 bool isLong = (Name.at(18) == 'l');
673 bool isSigned = (Name.at(isLong ? 19 : 18) == 's');
674
675 Intrinsic::ID intID;
676 if (isSigned)
677 intID = Intrinsic::arm_neon_vabds;
678 else
679 intID = Intrinsic::arm_neon_vabdu;
680
681 const Type *Ty = CI->getType();
682 if (isLong)
683 Ty = VectorType::getTruncatedElementVectorType(cast(Ty));
684
685 Function *VABD = Intrinsic::getDeclaration(F->getParent(), intID, &Ty, 1);
686 Value *Operands[2];
687 Operands[0] = Arg0;
688 Operands[1] = Arg1;
689 return CallInst::Create(VABD, Operands, Operands+2,
690 "upgraded."+CI->getName(), CI);
691 }
692
693 /// ConstructNewCallInst - Construct a new CallInst with the signature of NewFn.
694 static void ConstructNewCallInst(Function *NewFn, CallInst *OldCI,
695 Value **Operands, unsigned NumOps,
696 bool AssignName = true) {
697 // Construct a new CallInst.
698 CallInst *NewCI =
699 CallInst::Create(NewFn, Operands, Operands + NumOps,
700 AssignName ? "upgraded." + OldCI->getName() : "", OldCI);
701
702 NewCI->setTailCall(OldCI->isTailCall());
703 NewCI->setCallingConv(OldCI->getCallingConv());
704
705 // Handle any uses of the old CallInst. If the type has changed, add a cast.
706 if (!OldCI->use_empty()) {
707 if (OldCI->getType() != NewCI->getType()) {
708 Function *OldFn = OldCI->getCalledFunction();
709 CastInst *RetCast =
710 CastInst::Create(CastInst::getCastOpcode(NewCI, true,
711 OldFn->getReturnType(), true),
712 NewCI, OldFn->getReturnType(), NewCI->getName(),OldCI);
713
714 // Replace all uses of the old call with the new cast which has the
715 // correct type.
716 OldCI->replaceAllUsesWith(RetCast);
717 } else {
718 OldCI->replaceAllUsesWith(NewCI);
719 }
720 }
721
722 // Clean up the old call now that it has been completely upgraded.
723 OldCI->eraseFromParent();
724139 }
725140
726141 // UpgradeIntrinsicCall - Upgrade a call to an old intrinsic to be a call the
734149 assert(F && "CallInst has no function associated with it.");
735150
736151 if (!NewFn) {
737 // Get the Function's name.
738 const std::string& Name = F->getName();
739
740 // Upgrade ARM NEON intrinsics.
741 if (Name.compare(5, 9, "arm.neon.", 9) == 0) {
742 Instruction *NewI;
743 Value *V0, *V1;
744 if (Name.compare(14, 7, "vmovls.", 7) == 0) {
745 NewI = new SExtInst(CI->getArgOperand(0), CI->getType(),
746 "upgraded." + CI->getName(), CI);
747 } else if (Name.compare(14, 7, "vmovlu.", 7) == 0) {
748 NewI = new ZExtInst(CI->getArgOperand(0), CI->getType(),
749 "upgraded." + CI->getName(), CI);
750 } else if (Name.compare(14, 4, "vadd", 4) == 0) {
751 ExtendNEONArgs(CI, CI->getArgOperand(0), CI->getArgOperand(1), V0, V1);
752 NewI = BinaryOperator::CreateAdd(V0, V1, "upgraded."+CI->getName(), CI);
753 } else if (Name.compare(14, 4, "vsub", 4) == 0) {
754 ExtendNEONArgs(CI, CI->getArgOperand(0), CI->getArgOperand(1), V0, V1);
755 NewI = BinaryOperator::CreateSub(V0, V1,"upgraded."+CI->getName(),CI);
756 } else if (Name.compare(14, 4, "vmul", 4) == 0) {
757 ExtendNEONArgs(CI, CI->getArgOperand(0), CI->getArgOperand(1), V0, V1);
758 NewI = BinaryOperator::CreateMul(V0, V1,"upgraded."+CI->getName(),CI);
759 } else if (Name.compare(14, 4, "vmla", 4) == 0) {
760 ExtendNEONArgs(CI, CI->getArgOperand(1), CI->getArgOperand(2), V0, V1);
761 Instruction *MulI = BinaryOperator::CreateMul(V0, V1, "", CI);
762 NewI = BinaryOperator::CreateAdd(CI->getArgOperand(0), MulI,
763 "upgraded."+CI->getName(), CI);
764 } else if (Name.compare(14, 4, "vmls", 4) == 0) {
765 ExtendNEONArgs(CI, CI->getArgOperand(1), CI->getArgOperand(2), V0, V1);
766 Instruction *MulI = BinaryOperator::CreateMul(V0, V1, "", CI);
767 NewI = BinaryOperator::CreateSub(CI->getArgOperand(0), MulI,
768 "upgraded."+CI->getName(), CI);
769 } else if (Name.compare(14, 4, "vabd", 4) == 0) {
770 NewI = CallVABD(CI, CI->getArgOperand(0), CI->getArgOperand(1));
771 NewI = new ZExtInst(NewI, CI->getType(), "upgraded."+CI->getName(), CI);
772 } else if (Name.compare(14, 4, "vaba", 4) == 0) {
773 NewI = CallVABD(CI, CI->getArgOperand(1), CI->getArgOperand(2));
774 if (Name.at(18) == 'l')
775 NewI = new ZExtInst(NewI, CI->getType(), "", CI);
776 NewI = BinaryOperator::CreateAdd(CI->getArgOperand(0), NewI,
777 "upgraded."+CI->getName(), CI);
778 } else if (Name.compare(14, 6, "vmovn.", 6) == 0) {
779 NewI = new TruncInst(CI->getArgOperand(0), CI->getType(),
780 "upgraded." + CI->getName(), CI);
781 } else {
782 llvm_unreachable("Unknown arm.neon function for CallInst upgrade.");
783 }
784 // Replace any uses of the old CallInst.
785 if (!CI->use_empty())
786 CI->replaceAllUsesWith(NewI);
787 CI->eraseFromParent();
788 return;
789 }
790
791 bool isLoadH = false, isLoadL = false, isMovL = false;
792 bool isMovSD = false, isShufPD = false;
793 bool isUnpckhPD = false, isUnpcklPD = false;
794 bool isPunpckhQPD = false, isPunpcklQPD = false;
795 if (F->getName() == "llvm.x86.sse2.loadh.pd")
796 isLoadH = true;
797 else if (F->getName() == "llvm.x86.sse2.loadl.pd")
798 isLoadL = true;
799 else if (F->getName() == "llvm.x86.sse2.movl.dq")
800 isMovL = true;
801 else if (F->getName() == "llvm.x86.sse2.movs.d")
802 isMovSD = true;
803 else if (F->getName() == "llvm.x86.sse2.shuf.pd")
804 isShufPD = true;
805 else if (F->getName() == "llvm.x86.sse2.unpckh.pd")
806 isUnpckhPD = true;
807 else if (F->getName() == "llvm.x86.sse2.unpckl.pd")
808 isUnpcklPD = true;
809 else if (F->getName() == "llvm.x86.sse2.punpckh.qdq")
810 isPunpckhQPD = true;
811 else if (F->getName() == "llvm.x86.sse2.punpckl.qdq")
812 isPunpcklQPD = true;
813
814 if (isLoadH || isLoadL || isMovL || isMovSD || isShufPD ||
815 isUnpckhPD || isUnpcklPD || isPunpckhQPD || isPunpcklQPD) {
816 std::vector Idxs;
817 Value *Op0 = CI->getArgOperand(0);
818 ShuffleVectorInst *SI = NULL;
819 if (isLoadH || isLoadL) {
820 Value *Op1 = UndefValue::get(Op0->getType());
821 Value *Addr = new BitCastInst(CI->getArgOperand(1),
822 Type::getDoublePtrTy(C),
823 "upgraded.", CI);
824 Value *Load = new LoadInst(Addr, "upgraded.", false, 8, CI);
825 Value *Idx = ConstantInt::get(Type::getInt32Ty(C), 0);
826 Op1 = InsertElementInst::Create(Op1, Load, Idx, "upgraded.", CI);
827
828 if (isLoadH) {
829 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 0));
830 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 2));
831 } else {
832 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 2));
833 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 1));
834 }
835 Value *Mask = ConstantVector::get(Idxs);
836 SI = new ShuffleVectorInst(Op0, Op1, Mask, "upgraded.", CI);
837 } else if (isMovL) {
838 Constant *Zero = ConstantInt::get(Type::getInt32Ty(C), 0);
839 Idxs.push_back(Zero);
840 Idxs.push_back(Zero);
841 Idxs.push_back(Zero);
842 Idxs.push_back(Zero);
843 Value *ZeroV = ConstantVector::get(Idxs);
844
845 Idxs.clear();
846 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 4));
847 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 5));
848 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 2));
849 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 3));
850 Value *Mask = ConstantVector::get(Idxs);
851 SI = new ShuffleVectorInst(ZeroV, Op0, Mask, "upgraded.", CI);
852 } else if (isMovSD ||
853 isUnpckhPD || isUnpcklPD || isPunpckhQPD || isPunpcklQPD) {
854 Value *Op1 = CI->getArgOperand(1);
855 if (isMovSD) {
856 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 2));
857 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 1));
858 } else if (isUnpckhPD || isPunpckhQPD) {
859 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 1));
860 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 3));
861 } else {
862 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 0));
863 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 2));
864 }
865 Value *Mask = ConstantVector::get(Idxs);
866 SI = new ShuffleVectorInst(Op0, Op1, Mask, "upgraded.", CI);
867 } else if (isShufPD) {
868 Value *Op1 = CI->getArgOperand(1);
869 unsigned MaskVal =
870 cast(CI->getArgOperand(2))->getZExtValue();
871 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), MaskVal & 1));
872 Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C),
873 ((MaskVal >> 1) & 1)+2));
874 Value *Mask = ConstantVector::get(Idxs);
875 SI = new ShuffleVectorInst(Op0, Op1, Mask, "upgraded.", CI);
876 }
877
878 assert(SI && "Unexpected!");
879
880 // Handle any uses of the old CallInst.
881 if (!CI->use_empty())
882 // Replace all uses of the old call with the new cast which has the
883 // correct type.
884 CI->replaceAllUsesWith(SI);
885
886 // Clean up the old call now that it has been completely upgraded.
887 CI->eraseFromParent();
888 } else if (F->getName() == "llvm.x86.sse41.pmulld") {
889 // Upgrade this set of intrinsics into vector multiplies.
890 Instruction *Mul = BinaryOperator::CreateMul(CI->getArgOperand(0),
891 CI->getArgOperand(1),
892 CI->getName(),
893 CI);
894 // Fix up all the uses with our new multiply.
895 if (!CI->use_empty())
896 CI->replaceAllUsesWith(Mul);
897
898 // Remove upgraded multiply.
899 CI->eraseFromParent();
900 } else if (F->getName() == "llvm.x86.ssse3.palign.r") {
901 Value *Op1 = CI->getArgOperand(0);
902 Value *Op2 = CI->getArgOperand(1);
903 Value *Op3 = CI->getArgOperand(2);
904 unsigned shiftVal = cast(Op3)->getZExtValue();
905 Value *Rep;
906 IRBuilder<> Builder(C);
907 Builder.SetInsertPoint(CI->getParent(), CI);
908
909 // If palignr is shifting the pair of input vectors less than 9 bytes,
910 // emit a shuffle instruction.
911 if (shiftVal <= 8) {
912 const Type *IntTy = Type::getInt32Ty(C);
913 const Type *EltTy = Type::getInt8Ty(C);
914 const Type *VecTy = VectorType::get(EltTy, 8);
915
916 Op2 = Builder.CreateBitCast(Op2, VecTy);
917 Op1 = Builder.CreateBitCast(Op1, VecTy);
918
919 llvm::SmallVector Indices;
920 for (unsigned i = 0; i != 8; ++i)
921 Indices.push_back(ConstantInt::get(IntTy, shiftVal + i));
922
923 Value *SV = ConstantVector::get(Indices);
924 Rep = Builder.CreateShuffleVector(Op2, Op1, SV, "palignr");
925 Rep = Builder.CreateBitCast(Rep, F->getReturnType());
926 }
927
928 // If palignr is shifting the pair of input vectors more than 8 but less
929 // than 16 bytes, emit a logical right shift of the destination.
930 else if (shiftVal < 16) {
931 // MMX has these as 1 x i64 vectors for some odd optimization reasons.
932 const Type *EltTy = Type::getInt64Ty(C);
933 const Type *VecTy = VectorType::get(EltTy, 1);
934
935 Op1 = Builder.CreateBitCast(Op1, VecTy, "cast");
936 Op2 = ConstantInt::get(VecTy, (shiftVal-8) * 8);
937
938 // create i32 constant
939 Function *I =
940 Intrinsic::getDeclaration(F->getParent(), Intrinsic::x86_mmx_psrl_q);
941 Rep = Builder.CreateCall2(I, Op1, Op2, "palignr");
942 }
943
944 // If palignr is shifting the pair of vectors more than 32 bytes, emit zero.
945 else {
946 Rep = Constant::getNullValue(F->getReturnType());
947 }
948
949 // Replace any uses with our new instruction.
950 if (!CI->use_empty())
951 CI->replaceAllUsesWith(Rep);
952
953 // Remove upgraded instruction.
954 CI->eraseFromParent();
955
956 } else if (F->getName() == "llvm.x86.ssse3.palign.r.128") {
957 Value *Op1 = CI->getArgOperand(0);
958 Value *Op2 = CI->getArgOperand(1);
959 Value *Op3 = CI->getArgOperand(2);
960 unsigned shiftVal = cast(Op3)->getZExtValue();
961 Value *Rep;
962 IRBuilder<> Builder(C);
963 Builder.SetInsertPoint(CI->getParent(), CI);
964
965 // If palignr is shifting the pair of input vectors less than 17 bytes,
966 // emit a shuffle instruction.
967 if (shiftVal <= 16) {
968 const Type *IntTy = Type::getInt32Ty(C);
969 const Type *EltTy = Type::getInt8Ty(C);
970 const Type *VecTy = VectorType::get(EltTy, 16);
971
972 Op2 = Builder.CreateBitCast(Op2, VecTy);
973 Op1 = Builder.CreateBitCast(Op1, VecTy);
974
975 llvm::SmallVector Indices;
976 for (unsigned i = 0; i != 16; ++i)
977 Indices.push_back(ConstantInt::get(IntTy, shiftVal + i));
978
979 Value *SV = ConstantVector::get(Indices);
980 Rep = Builder.CreateShuffleVector(Op2, Op1, SV, "palignr");
981 Rep = Builder.CreateBitCast(Rep, F->getReturnType());
982 }
983
984 // If palignr is shifting the pair of input vectors more than 16 but less
985 // than 32 bytes, emit a logical right shift of the destination.
986 else if (shiftVal < 32) {
987 const Type *EltTy = Type::getInt64Ty(C);
988 const Type *VecTy = VectorType::get(EltTy, 2);
989 const Type *IntTy = Type::getInt32Ty(C);
990
991 Op1 = Builder.CreateBitCast(Op1, VecTy, "cast");
992 Op2 = ConstantInt::get(IntTy, (shiftVal-16) * 8);
993
994 // create i32 constant
995 Function *I =
996 Intrinsic::getDeclaration(F->getParent(), Intrinsic::x86_sse2_psrl_dq);
997 Rep = Builder.CreateCall2(I, Op1, Op2, "palignr");
998 }
999
1000 // If palignr is shifting the pair of vectors more than 32 bytes, emit zero.
1001 else {
1002 Rep = Constant::getNullValue(F->getReturnType());
1003 }
1004
1005 // Replace any uses with our new instruction.
1006 if (!CI->use_empty())
1007 CI->replaceAllUsesWith(Rep);
1008
1009 // Remove upgraded instruction.
1010 CI->eraseFromParent();
1011
1012 } else if (F->getName() == "llvm.x86.sse.loadu.ps" ||
1013 F->getName() == "llvm.x86.sse2.loadu.dq" ||
1014 F->getName() == "llvm.x86.sse2.loadu.pd") {
152 if (F->getName() == "llvm.x86.sse.loadu.ps" ||
153 F->getName() == "llvm.x86.sse2.loadu.dq" ||
154 F->getName() == "llvm.x86.sse2.loadu.pd") {
1015155 // Convert to a native, unaligned load.
1016156 const Type *VecTy = CI->getType();
1017157 const Type *IntTy = IntegerType::get(C, 128);
1063203 }
1064204
1065205 switch (NewFn->getIntrinsicID()) {
1066 default: llvm_unreachable("Unknown function for CallInst upgrade.");
1067 case Intrinsic::arm_neon_vld1:
1068 case Intrinsic::arm_neon_vld2:
1069 case Intrinsic::arm_neon_vld3:
1070 case Intrinsic::arm_neon_vld4:
1071 case Intrinsic::arm_neon_vst1:
1072 case Intrinsic::arm_neon_vst2:
1073 case Intrinsic::arm_neon_vst3:
1074 case Intrinsic::arm_neon_vst4:
1075 case Intrinsic::arm_neon_vld2lane:
1076 case Intrinsic::arm_neon_vld3lane:
1077 case Intrinsic::arm_neon_vld4lane:
1078 case Intrinsic::arm_neon_vst2lane:
1079 case Intrinsic::arm_neon_vst3lane:
1080 case Intrinsic::arm_neon_vst4lane: {
1081 // Add a default alignment argument of 1.
1082 SmallVector Operands(CS.arg_begin(), CS.arg_end());
1083 Operands.push_back(ConstantInt::get(Type::getInt32Ty(C), 1));
1084 CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(),
1085 CI->getName(), CI);
1086 NewCI->setTailCall(CI->isTailCall());
1087 NewCI->setCallingConv(CI->getCallingConv());
1088
1089 // Handle any uses of the old CallInst.
1090 if (!CI->use_empty())
1091 // Replace all uses of the old call with the new cast which has the
1092 // correct type.
1093 CI->replaceAllUsesWith(NewCI);
1094
1095 // Clean up the old call now that it has been completely upgraded.
1096 CI->eraseFromParent();
1097 break;
1098 }
1099
1100 case Intrinsic::x86_mmx_padd_b:
1101 case Intrinsic::x86_mmx_padd_w:
1102 case Intrinsic::x86_mmx_padd_d:
1103 case Intrinsic::x86_mmx_padd_q:
1104 case Intrinsic::x86_mmx_padds_b:
1105 case Intrinsic::x86_mmx_padds_w:
1106 case Intrinsic::x86_mmx_paddus_b:
1107 case Intrinsic::x86_mmx_paddus_w:
1108 case Intrinsic::x86_mmx_psub_b:
1109 case Intrinsic::x86_mmx_psub_w:
1110 case Intrinsic::x86_mmx_psub_d:
1111 case Intrinsic::x86_mmx_psub_q:
1112 case Intrinsic::x86_mmx_psubs_b:
1113 case Intrinsic::x86_mmx_psubs_w:
1114 case Intrinsic::x86_mmx_psubus_b:
1115 case Intrinsic::x86_mmx_psubus_w:
1116 case Intrinsic::x86_mmx_pmulh_w:
1117 case Intrinsic::x86_mmx_pmull_w:
1118 case Intrinsic::x86_mmx_pmulhu_w:
1119 case Intrinsic::x86_mmx_pmulu_dq:
1120 case Intrinsic::x86_mmx_pmadd_wd:
1121 case Intrinsic::x86_mmx_pand:
1122 case Intrinsic::x86_mmx_pandn:
1123 case Intrinsic::x86_mmx_por:
1124 case Intrinsic::x86_mmx_pxor:
1125 case Intrinsic::x86_mmx_pavg_b:
1126 case Intrinsic::x86_mmx_pavg_w:
1127 case Intrinsic::x86_mmx_pmaxu_b:
1128 case Intrinsic::x86_mmx_pmaxs_w:
1129 case Intrinsic::x86_mmx_pminu_b:
1130 case Intrinsic::x86_mmx_pmins_w:
1131 case Intrinsic::x86_mmx_psad_bw:
1132 case Intrinsic::x86_mmx_psll_w:
1133 case Intrinsic::x86_mmx_psll_d:
1134 case Intrinsic::x86_mmx_psll_q:
1135 case Intrinsic::x86_mmx_pslli_w:
1136 case Intrinsic::x86_mmx_pslli_d:
1137 case Intrinsic::x86_mmx_pslli_q:
1138 case Intrinsic::x86_mmx_psrl_w:
1139 case Intrinsic::x86_mmx_psrl_d:
1140 case Intrinsic::x86_mmx_psrl_q:
1141 case Intrinsic::x86_mmx_psrli_w:
1142 case Intrinsic::x86_mmx_psrli_d:
1143 case Intrinsic::x86_mmx_psrli_q:
1144 case Intrinsic::x86_mmx_psra_w:
1145 case Intrinsic::x86_mmx_psra_d:
1146 case Intrinsic::x86_mmx_psrai_w:
1147 case Intrinsic::x86_mmx_psrai_d:
1148 case Intrinsic::x86_mmx_packsswb:
1149 case Intrinsic::x86_mmx_packssdw:
1150 case Intrinsic::x86_mmx_packuswb:
1151 case Intrinsic::x86_mmx_punpckhbw:
1152 case Intrinsic::x86_mmx_punpckhwd:
1153 case Intrinsic::x86_mmx_punpckhdq:
1154 case Intrinsic::x86_mmx_punpcklbw:
1155 case Intrinsic::x86_mmx_punpcklwd:
1156 case Intrinsic::x86_mmx_punpckldq:
1157 case Intrinsic::x86_mmx_pcmpeq_b:
1158 case Intrinsic::x86_mmx_pcmpeq_w:
1159 case Intrinsic::x86_mmx_pcmpeq_d:
1160 case Intrinsic::x86_mmx_pcmpgt_b:
1161 case Intrinsic::x86_mmx_pcmpgt_w:
1162 case Intrinsic::x86_mmx_pcmpgt_d: {
1163 Value *Operands[2];
1164
1165 // Cast the operand to the X86 MMX type.
1166 Operands[0] = new BitCastInst(CI->getArgOperand(0),
1167 NewFn->getFunctionType()->getParamType(0),
1168 "upgraded.", CI);
1169
1170 switch (NewFn->getIntrinsicID()) {
1171 default:
1172 // Cast to the X86 MMX type.
1173 Operands[1] = new BitCastInst(CI->getArgOperand(1),
1174 NewFn->getFunctionType()->getParamType(1),
1175 "upgraded.", CI);
1176 break;
1177 case Intrinsic::x86_mmx_pslli_w:
1178 case Intrinsic::x86_mmx_pslli_d:
1179 case Intrinsic::x86_mmx_pslli_q:
1180 case Intrinsic::x86_mmx_psrli_w:
1181 case Intrinsic::x86_mmx_psrli_d:
1182 case Intrinsic::x86_mmx_psrli_q:
1183 case Intrinsic::x86_mmx_psrai_w:
1184 case Intrinsic::x86_mmx_psrai_d:
1185 // These take an i32 as their second parameter.
1186 Operands[1] = CI->getArgOperand(1);
1187 break;
1188 }
1189
1190 ConstructNewCallInst(NewFn, CI, Operands, 2);
1191 break;
1192 }
1193 case Intrinsic::x86_mmx_maskmovq: {
1194 Value *Operands[3];
1195
1196 // Cast the operands to the X86 MMX type.
1197 Operands[0] = new BitCastInst(CI->getArgOperand(0),
1198 NewFn->getFunctionType()->getParamType(0),
1199 "upgraded.", CI);
1200 Operands[1] = new BitCastInst(CI->getArgOperand(1),
1201 NewFn->getFunctionType()->getParamType(1),
1202 "upgraded.", CI);
1203 Operands[2] = CI->getArgOperand(2);
1204
1205 ConstructNewCallInst(NewFn, CI, Operands, 3, false);
1206 break;
1207 }
1208 case Intrinsic::x86_mmx_pmovmskb: {
1209 Value *Operands[1];
1210
1211 // Cast the operand to the X86 MMX type.
1212 Operands[0] = new BitCastInst(CI->getArgOperand(0),
1213 NewFn->getFunctionType()->getParamType(0),
1214 "upgraded.", CI);
1215
1216 ConstructNewCallInst(NewFn, CI, Operands, 1);
1217 break;
1218 }
1219 case Intrinsic::x86_mmx_movnt_dq: {
1220 Value *Operands[2];
1221
1222 Operands[0] = CI->getArgOperand(0);
1223
1224 // Cast the operand to the X86 MMX type.
1225 Operands[1] = new BitCastInst(CI->getArgOperand(1),
1226 NewFn->getFunctionType()->getParamType(1),
1227 "upgraded.", CI);
1228
1229 ConstructNewCallInst(NewFn, CI, Operands, 2, false);
1230 break;
1231 }
1232 case Intrinsic::x86_mmx_palignr_b: {
1233 Value *Operands[3];
1234
1235 // Cast the operands to the X86 MMX type.
1236 Operands[0] = new BitCastInst(CI->getArgOperand(0),
1237 NewFn->getFunctionType()->getParamType(0),
1238 "upgraded.", CI);
1239 Operands[1] = new BitCastInst(CI->getArgOperand(1),
1240 NewFn->getFunctionType()->getParamType(1),
1241 "upgraded.", CI);
1242 Operands[2] = CI->getArgOperand(2);
1243
1244 ConstructNewCallInst(NewFn, CI, Operands, 3);
1245 break;
1246 }
1247 case Intrinsic::x86_mmx_pextr_w: {
1248 Value *Operands[2];
1249
1250 // Cast the operands to the X86 MMX type.
1251 Operands[0] = new BitCastInst(CI->getArgOperand(0),
1252 NewFn->getFunctionType()->getParamType(0),
1253 "upgraded.", CI);
1254 Operands[1] = CI->getArgOperand(1);
1255
1256 ConstructNewCallInst(NewFn, CI, Operands, 2);
1257 break;
1258 }
1259 case Intrinsic::x86_mmx_pinsr_w: {
1260 Value *Operands[3];
1261
1262 // Cast the operands to the X86 MMX type.
1263 Operands[0] = new BitCastInst(CI->getArgOperand(0),
1264 NewFn->getFunctionType()->getParamType(0),
1265 "upgraded.", CI);
1266 Operands[1] = CI->getArgOperand(1);
1267 Operands[2] = CI->getArgOperand(2);
1268
1269 ConstructNewCallInst(NewFn, CI, Operands, 3);
1270 break;
1271 }
1272 case Intrinsic::x86_sse_pshuf_w: {
1273 IRBuilder<> Builder(C);
1274 Builder.SetInsertPoint(CI->getParent(), CI);
1275
1276 // Cast the operand to the X86 MMX type.
1277 Value *Operands[2];
1278 Operands[0] =
1279 Builder.CreateBitCast(CI->getArgOperand(0),
1280 NewFn->getFunctionType()->getParamType(0),
1281 "upgraded.");
1282 Operands[1] =
1283 Builder.CreateTrunc(CI->getArgOperand(1),
1284 Type::getInt8Ty(C),
1285 "upgraded.");
1286
1287 ConstructNewCallInst(NewFn, CI, Operands, 2);
1288 break;
1289 }
1290
1291 case Intrinsic::ctlz:
1292 case Intrinsic::ctpop:
1293 case Intrinsic::cttz: {
1294 // Build a small vector of the original arguments.
1295 SmallVector Operands(CS.arg_begin(), CS.arg_end());
1296
1297 // Construct a new CallInst
1298 CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(),
1299 "upgraded."+CI->getName(), CI);
1300 NewCI->setTailCall(CI->isTailCall());
1301 NewCI->setCallingConv(CI->getCallingConv());
1302
1303 // Handle any uses of the old CallInst.
1304 if (!CI->use_empty()) {
1305 // Check for sign extend parameter attributes on the return values.
1306 bool SrcSExt = NewFn->getAttributes().paramHasAttr(0, Attribute::SExt);
1307 bool DestSExt = F->getAttributes().paramHasAttr(0, Attribute::SExt);
1308
1309 // Construct an appropriate cast from the new return type to the old.
1310 CastInst *RetCast = CastInst::Create(
1311 CastInst::getCastOpcode(NewCI, SrcSExt,
1312 F->getReturnType(),
1313 DestSExt),
1314 NewCI, F->getReturnType(),
1315 NewCI->getName(), CI);
1316 NewCI->moveBefore(RetCast);
1317
1318 // Replace all uses of the old call with the new cast which has the
1319 // correct type.
1320 CI->replaceAllUsesWith(RetCast);
1321 }
1322
1323 // Clean up the old call now that it has been completely upgraded.
1324 CI->eraseFromParent();
1325 }
1326 break;
1327 case Intrinsic::eh_selector:
1328 case Intrinsic::eh_typeid_for: {
1329 // Only the return type changed.
1330 SmallVector Operands(CS.arg_begin(), CS.arg_end());
1331 CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(),
1332 "upgraded." + CI->getName(), CI);
1333 NewCI->setTailCall(CI->isTailCall());
1334 NewCI->setCallingConv(CI->getCallingConv());
1335
1336 // Handle any uses of the old CallInst.
1337 if (!CI->use_empty()) {
1338 // Construct an appropriate cast from the new return type to the old.
1339 CastInst *RetCast =
1340 CastInst::Create(CastInst::getCastOpcode(NewCI, true,
1341 F->getReturnType(), true),
1342 NewCI, F->getReturnType(), NewCI->getName(), CI);
1343 CI->replaceAllUsesWith(RetCast);
1344 }
1345 CI->eraseFromParent();
1346 }
1347 break;
1348 case Intrinsic::memcpy:
1349 case Intrinsic::memmove:
1350 case Intrinsic::memset: {
1351 // Add isVolatile
1352 const llvm::Type *I1Ty = llvm::Type::getInt1Ty(CI->getContext());
1353 Value *Operands[5] = { CI->getArgOperand(0), CI->getArgOperand(1),
1354 CI->getArgOperand(2), CI->getArgOperand(3),
1355 llvm::ConstantInt::get(I1Ty, 0) };
1356 CallInst *NewCI = CallInst::Create(NewFn, Operands, Operands+5,
1357 CI->getName(), CI);
1358 NewCI->setTailCall(CI->isTailCall());
1359 NewCI->setCallingConv(CI->getCallingConv());
1360 // Handle any uses of the old CallInst.
1361 if (!CI->use_empty())
1362 // Replace all uses of the old call with the new cast which has the
1363 // correct type.
1364 CI->replaceAllUsesWith(NewCI);
1365
1366 // Clean up the old call now that it has been completely upgraded.
1367 CI->eraseFromParent();
1368 break;
1369 }
1370206 case Intrinsic::prefetch: {
1371207 IRBuilder<> Builder(C);
1372208 Builder.SetInsertPoint(CI->getParent(), CI);
1400236 assert(F && "Illegal attempt to upgrade a non-existent intrinsic.");
1401237
1402238 // Upgrade the function and check if it is a totaly new function.
1403 Function* NewFn;
239 Function *NewFn;
1404240 if (UpgradeIntrinsicFunction(F, NewFn)) {
1405241 if (NewFn != F) {
1406242 // Replace all uses to the old function with the new one if necessary.
1407243 for (Value::use_iterator UI = F->use_begin(), UE = F->use_end();
1408244 UI != UE; ) {
1409 if (CallInst* CI = dyn_cast(*UI++))
245 if (CallInst *CI = dyn_cast(*UI++))
1410246 UpgradeIntrinsicCall(CI, NewFn);
1411247 }
1412248 // Remove old function, no longer used, from the module.
1419255 /// If an llvm.dbg.declare intrinsic is invalid, then this function simply
1420256 /// strips that use.
1421257 void llvm::CheckDebugInfoIntrinsics(Module *M) {
1422
1423
1424258 if (Function *FuncStart = M->getFunction("llvm.dbg.func.start")) {
1425 while (!FuncStart->use_empty()) {
1426 CallInst *CI = cast(FuncStart->use_back());
1427 CI->eraseFromParent();
1428 }
259 while (!FuncStart->use_empty())
260 cast(FuncStart->use_back())->eraseFromParent();
1429261 FuncStart->eraseFromParent();
1430262 }
1431263
1432264 if (Function *StopPoint = M->getFunction("llvm.dbg.stoppoint")) {
1433 while (!StopPoint->use_empty()) {
1434 CallInst *CI = cast(StopPoint->use_back());
1435 CI->eraseFromParent();
1436 }
265 while (!StopPoint->use_empty())
266 cast(StopPoint->use_back())->eraseFromParent();
1437267 StopPoint->eraseFromParent();
1438268 }
1439269
1440270 if (Function *RegionStart = M->getFunction("llvm.dbg.region.start")) {
1441 while (!RegionStart->use_empty()) {
1442 CallInst *CI = cast(RegionStart->use_back());
1443 CI->eraseFromParent();
1444 }
271 while (!RegionStart->use_empty())
272 cast(RegionStart->use_back())->eraseFromParent();
1445273 RegionStart->eraseFromParent();
1446274 }
1447275
1448276 if (Function *RegionEnd = M->getFunction("llvm.dbg.region.end")) {
1449 while (!RegionEnd->use_empty()) {
1450 CallInst *CI = cast(RegionEnd->use_back());
1451 CI->eraseFromParent();
1452 }
277 while (!RegionEnd->use_empty())
278 cast(RegionEnd->use_back())->eraseFromParent();
1453279 RegionEnd->eraseFromParent();
1454280 }
1455281
1414 ; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false)
1515 ; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false)
1616
17 declare void @llvm.memset.i64(i8*, i8, i64, i32)
17 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
1818
1919 @A = external global i8
2020 @B = external global i8
2121 define void @test1() {
22 call void @llvm.memset.i64(i8* @A, i8 0, i64 1, i32 1)
23 call void @llvm.memset.i64(i8* @B, i8 0, i64 1, i32 1)
22 call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false)
23 call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false)
2424 ret void
2525 }
0 ; RUN: opt < %s -basicaa -gvn -dse -S | FileCheck %s
11 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
22
3 declare void @llvm.memset.i32(i8*, i8, i32, i32)
4 declare void @llvm.memset.i8(i8*, i8, i8, i32)
5 declare void @llvm.memcpy.i8(i8*, i8*, i8, i32)
6 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
73 declare void @llvm.lifetime.end(i64, i8* nocapture)
84
95 declare void @external(i32*)
1410
1511 store i32 0, i32* %A
1612
17 call void @llvm.memset.i32(i8* %P, i8 0, i32 42, i32 1)
13 call void @llvm.memset.p0i8.i32(i8* %P, i8 0, i32 42, i32 1, i1 false)
1814
1915 %B = load i32* %A
2016 ret i32 %B
3026
3127 store i8 2, i8* %B ;; Not written to by memcpy
3228
33 call void @llvm.memcpy.i8(i8* %A, i8* %B, i8 -1, i32 0)
29 call void @llvm.memcpy.p0i8.p0i8.i8(i8* %A, i8* %B, i8 -1, i32 0, i1 false)
3430
3531 %C = load i8* %B
3632 ret i8 %C
4137 ; CHECK: @test2
4238 %P2 = getelementptr i8* %P, i32 127
4339 store i8 1, i8* %P2 ;; Not dead across memset
44 call void @llvm.memset.i8(i8* %P, i8 2, i8 127, i32 0)
40 call void @llvm.memset.p0i8.i8(i8* %P, i8 2, i8 127, i32 0, i1 false)
4541 %A = load i8* %P2
4642 ret i8 %A
4743 ; CHECK: ret i8 1
5450 ;; FIXME: DSE isn't zapping this dead store.
5551 store i8 1, i8* %P2 ;; Dead, clobbered by memset.
5652
57 call void @llvm.memset.i8(i8* %P, i8 2, i8 127, i32 0)
53 call void @llvm.memset.p0i8.i8(i8* %P, i8 2, i8 127, i32 0, i1 false)
5854 %A = load i8* %P2
5955 ret i8 %A
6056 ; CHECK-NOT: load
9490
9591 define i32 @test4(i8* %P) {
9692 %tmp = load i32* @G1
97 call void @llvm.memset.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8 0, i32 4000, i32 1)
93 call void @llvm.memset.p0i8.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8 0, i32 4000, i32 1, i1 false)
9894 %tmp2 = load i32* @G1
9995 %sub = sub i32 %tmp2, %tmp
10096 ret i32 %sub
109105 ; write to G1.
110106 define i32 @test5(i8* %P, i32 %Len) {
111107 %tmp = load i32* @G1
112 call void @llvm.memcpy.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8* bitcast (i32* @G1 to i8*), i32 %Len, i32 1)
108 call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8* bitcast (i32* @G1 to i8*), i32 %Len, i32 1, i1 false)
113109 %tmp2 = load i32* @G1
114110 %sub = sub i32 %tmp2, %tmp
115111 ret i32 %sub
131127 ; CHECK-NOT: load
132128 ; CHECK: ret
133129 }
130
131 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
132 declare void @llvm.memset.p0i8.i8(i8* nocapture, i8, i8, i32, i1) nounwind
133 declare void @llvm.memcpy.p0i8.p0i8.i8(i8* nocapture, i8* nocapture, i8, i32, i1) nounwind
134 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
135
172172 %55 = mul i32 %y.21, %w ; [#uses=1]
173173 %.sum5 = add i32 %55, %.sum3 ; [#uses=1]
174174 %56 = getelementptr i8* %j, i32 %.sum5 ; [#uses=1]
175 tail call void @llvm.memcpy.i32(i8* %56, i8* %54, i32 %w, i32 1)
175 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %56, i8* %54, i32 %w, i32 1, i1 false)
176176 %57 = add i32 %y.21, 1 ; [#uses=2]
177177 br label %bb24
178178
189189 %60 = getelementptr i8* %j, i32 %.sum4 ; [#uses=1]
190190 %61 = mul i32 %x, %w ; [#uses=1]
191191 %62 = sdiv i32 %61, 2 ; [#uses=1]
192 tail call void @llvm.memset.i32(i8* %60, i8 -128, i32 %62, i32 1)
192 tail call void @llvm.memset.p0i8.i32(i8* %60, i8 -128, i32 %62, i32 1, i1 false)
193193 ret void
194194
195195 bb29: ; preds = %bb20, %entry
207207 %67 = getelementptr i8* %r, i32 %66 ; [#uses=1]
208208 %68 = mul i32 %y.310, %w ; [#uses=1]
209209 %69 = getelementptr i8* %j, i32 %68 ; [#uses=1]
210 tail call void @llvm.memcpy.i32(i8* %69, i8* %67, i32 %w, i32 1)
210 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %69, i8* %67, i32 %w, i32 1, i1 false)
211211 %70 = add i32 %y.310, 1 ; [#uses=2]
212212 br label %bb31
213213
223223 %73 = getelementptr i8* %j, i32 %72 ; [#uses=1]
224224 %74 = mul i32 %x, %w ; [#uses=1]
225225 %75 = sdiv i32 %74, 2 ; [#uses=1]
226 tail call void @llvm.memset.i32(i8* %73, i8 -128, i32 %75, i32 1)
226 tail call void @llvm.memset.p0i8.i32(i8* %73, i8 -128, i32 %75, i32 1, i1 false)
227227 ret void
228228
229229 return: ; preds = %bb20
230230 ret void
231231 }
232232
233 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
234
235 declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
233 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
234 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
44 ; dividing by the stride will have a remainder. This could theoretically
55 ; be teaching it how to use a more elaborate trip count computation.
66
7 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
8 target triple = "x86_64-unknown-linux-gnu"
9 %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
10 %struct.SHA_INFO = type { [5 x i32], i32, i32, [16 x i32] }
11 %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
12 @_2E_str = external constant [26 x i8] ; <[26 x i8]*> [#uses=0]
13 @stdin = external global %struct.FILE* ; <%struct.FILE**> [#uses=0]
14 @_2E_str1 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
15 @_2E_str12 = external constant [30 x i8] ; <[30 x i8]*> [#uses=0]
7 %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
8 %struct.SHA_INFO = type { [5 x i32], i32, i32, [16 x i32] }
9 %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
10
11 @_2E_str = external constant [26 x i8]
12 @stdin = external global %struct.FILE*
13 @_2E_str1 = external constant [3 x i8]
14 @_2E_str12 = external constant [30 x i8]
1615
1716 declare void @sha_init(%struct.SHA_INFO* nocapture) nounwind
1817
2423
2524 declare void @sha_final(%struct.SHA_INFO* nocapture) nounwind
2625
27 declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
28
2926 declare void @sha_update(%struct.SHA_INFO* nocapture, i8* nocapture, i32) nounwind
30
31 declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
3227
3328 declare i64 @fread(i8* noalias nocapture, i64, i64, %struct.FILE* noalias nocapture) nounwind
3429
4237
4338 define void @sha_stream_bb3_2E_i(%struct.SHA_INFO* %sha_info, i8* %data1, i32, i8** %buffer_addr.0.i.out, i32* %count_addr.0.i.out) nounwind {
4439 newFuncRoot:
45 br label %bb3.i
40 br label %bb3.i
4641
47 sha_update.exit.exitStub: ; preds = %bb3.i
48 store i8* %buffer_addr.0.i, i8** %buffer_addr.0.i.out
49 store i32 %count_addr.0.i, i32* %count_addr.0.i.out
50 ret void
42 sha_update.exit.exitStub: ; preds = %bb3.i
43 store i8* %buffer_addr.0.i, i8** %buffer_addr.0.i.out
44 store i32 %count_addr.0.i, i32* %count_addr.0.i.out
45 ret void
5146
52 bb2.i: ; preds = %bb3.i
53 %1 = getelementptr %struct.SHA_INFO* %sha_info, i64 0, i32 3 ; <[16 x i32]*> [#uses=1]
54 %2 = bitcast [16 x i32]* %1 to i8* ; [#uses=1]
55 call void @llvm.memcpy.i64(i8* %2, i8* %buffer_addr.0.i, i64 64, i32 1) nounwind
56 %3 = getelementptr %struct.SHA_INFO* %sha_info, i64 0, i32 3, i64 0 ; [#uses=1]
57 %4 = bitcast i32* %3 to i8* ; [#uses=1]
58 br label %codeRepl
47 bb2.i: ; preds = %bb3.i
48 %1 = getelementptr %struct.SHA_INFO* %sha_info, i64 0, i32 3
49 %2 = bitcast [16 x i32]* %1 to i8*
50 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %buffer_addr.0.i, i64 64, i32 1, i1 false)
51 %3 = getelementptr %struct.SHA_INFO* %sha_info, i64 0, i32 3, i64 0
52 %4 = bitcast i32* %3 to i8*
53 br label %codeRepl
5954
60 codeRepl: ; preds = %bb2.i
61 call void @sha_stream_bb3_2E_i_bb1_2E_i_2E_i(i8* %4)
62 br label %byte_reverse.exit.i
55 codeRepl: ; preds = %bb2.i
56 call void @sha_stream_bb3_2E_i_bb1_2E_i_2E_i(i8* %4)
57 br label %byte_reverse.exit.i
6358
64 byte_reverse.exit.i: ; preds = %codeRepl
65 call fastcc void @sha_transform(%struct.SHA_INFO* %sha_info) nounwind
66 %5 = getelementptr i8* %buffer_addr.0.i, i64 64 ; [#uses=1]
67 %6 = add i32 %count_addr.0.i, -64 ; [#uses=1]
68 br label %bb3.i
59 byte_reverse.exit.i: ; preds = %codeRepl
60 call fastcc void @sha_transform(%struct.SHA_INFO* %sha_info) nounwind
61 %5 = getelementptr i8* %buffer_addr.0.i, i64 64
62 %6 = add i32 %count_addr.0.i, -64
63 br label %bb3.i
6964
70 bb3.i: ; preds = %byte_reverse.exit.i, %newFuncRoot
71 %buffer_addr.0.i = phi i8* [ %data1, %newFuncRoot ], [ %5, %byte_reverse.exit.i ] ; [#uses=3]
72 %count_addr.0.i = phi i32 [ %0, %newFuncRoot ], [ %6, %byte_reverse.exit.i ] ; [#uses=3]
73 %7 = icmp sgt i32 %count_addr.0.i, 63 ; [#uses=1]
74 br i1 %7, label %bb2.i, label %sha_update.exit.exitStub
65 bb3.i: ; preds = %byte_reverse.exit.i, %newFuncRoot
66 %buffer_addr.0.i = phi i8* [ %data1, %newFuncRoot ], [ %5, %byte_reverse.exit.i ]
67 %count_addr.0.i = phi i32 [ %0, %newFuncRoot ], [ %6, %byte_reverse.exit.i ]
68 %7 = icmp sgt i32 %count_addr.0.i, 63
69 br i1 %7, label %bb2.i, label %sha_update.exit.exitStub
7570 }
7671
7772 declare void @sha_stream_bb3_2E_i_bb1_2E_i_2E_i(i8*) nounwind
73
74 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
75
76 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
77
0 ; Tests to make sure intrinsics are automatically upgraded.
1 ; RUN: llvm-as < %s | llvm-dis | not grep {i32 @llvm\\.ct}
2 ; RUN: llvm-as < %s | llvm-dis | \
3 ; RUN: not grep {llvm\\.part\\.set\\.i\[0-9\]*\\.i\[0-9\]*\\.i\[0-9\]*}
4 ; RUN: llvm-as < %s | llvm-dis | \
5 ; RUN: not grep {llvm\\.part\\.select\\.i\[0-9\]*\\.i\[0-9\]*}
6 ; RUN: llvm-as < %s | llvm-dis | \
7 ; RUN: not grep {llvm\\.bswap\\.i\[0-9\]*\\.i\[0-9\]*}
8 ; RUN: llvm-as < %s | llvm-dis | \
9 ; RUN: not grep {llvm\\.x86\\.sse2\\.loadu}
10 ; RUN: llvm-as < %s | llvm-dis | \
11 ; RUN: grep {llvm\\.x86\\.mmx\\.ps} | grep {x86_mmx} | count 16
121 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
132
14 declare i32 @llvm.ctpop.i28(i28 %val)
15 declare i32 @llvm.cttz.i29(i29 %val)
16 declare i32 @llvm.ctlz.i30(i30 %val)
17
18 define i32 @test_ct(i32 %A) {
19 %c1 = call i32 @llvm.ctpop.i28(i28 1234)
20 %c2 = call i32 @llvm.cttz.i29(i29 2345)
21 %c3 = call i32 @llvm.ctlz.i30(i30 3456)
22 %r1 = add i32 %c1, %c2
23 %r2 = add i32 %r1, %c3
24 ret i32 %r2
25 }
26
27 declare i32 @llvm.part.set.i32.i32.i32(i32 %x, i32 %rep, i32 %hi, i32 %lo)
28 declare i16 @llvm.part.set.i16.i16.i16(i16 %x, i16 %rep, i32 %hi, i32 %lo)
29 define i32 @test_part_set(i32 %A, i16 %B) {
30 %a = call i32 @llvm.part.set.i32.i32.i32(i32 %A, i32 27, i32 8, i32 0)
31 %b = call i16 @llvm.part.set.i16.i16.i16(i16 %B, i16 27, i32 8, i32 0)
32 %c = zext i16 %b to i32
33 %d = add i32 %a, %c
34 ret i32 %d
35 }
36
37 declare i32 @llvm.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo)
38 declare i16 @llvm.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo)
39 define i32 @test_part_select(i32 %A, i16 %B) {
40 %a = call i32 @llvm.part.select.i32.i32(i32 %A, i32 8, i32 0)
41 %b = call i16 @llvm.part.select.i16.i16(i16 %B, i32 8, i32 0)
42 %c = zext i16 %b to i32
43 %d = add i32 %a, %c
44 ret i32 %d
45 }
46
47 declare i32 @llvm.bswap.i32.i32(i32 %x)
48 declare i16 @llvm.bswap.i16.i16(i16 %x)
49 define i32 @test_bswap(i32 %A, i16 %B) {
50 %a = call i32 @llvm.bswap.i32.i32(i32 %A)
51 %b = call i16 @llvm.bswap.i16.i16(i16 %B)
52 %c = zext i16 %b to i32
53 %d = add i32 %a, %c
54 ret i32 %d
55 }
56
57 declare <4 x i16> @llvm.x86.mmx.psra.w(<4 x i16>, <2 x i32>) nounwind readnone
58 declare <4 x i16> @llvm.x86.mmx.psll.w(<4 x i16>, <2 x i32>) nounwind readnone
59 declare <4 x i16> @llvm.x86.mmx.psrl.w(<4 x i16>, <2 x i32>) nounwind readnone
60 define void @sh16(<4 x i16> %A, <2 x i32> %B) {
61 %r1 = call <4 x i16> @llvm.x86.mmx.psra.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0]
62 %r2 = call <4 x i16> @llvm.x86.mmx.psll.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0]
63 %r3 = call <4 x i16> @llvm.x86.mmx.psrl.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0]
64 ret void
65 }
66
67 declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <2 x i32>) nounwind readnone
68 declare <2 x i32> @llvm.x86.mmx.psll.d(<2 x i32>, <2 x i32>) nounwind readnone
69 declare <2 x i32> @llvm.x86.mmx.psrl.d(<2 x i32>, <2 x i32>) nounwind readnone
70 define void @sh32(<2 x i32> %A, <2 x i32> %B) {
71 %r1 = call <2 x i32> @llvm.x86.mmx.psra.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0]
72 %r2 = call <2 x i32> @llvm.x86.mmx.psll.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0]
73 %r3 = call <2 x i32> @llvm.x86.mmx.psrl.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0]
74 ret void
75 }
76
77 declare <1 x i64> @llvm.x86.mmx.psll.q(<1 x i64>, <2 x i32>) nounwind readnone
78 declare <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64>, <2 x i32>) nounwind readnone
79 define void @sh64(<1 x i64> %A, <2 x i32> %B) {
80 %r1 = call <1 x i64> @llvm.x86.mmx.psll.q( <1 x i64> %A, <2 x i32> %B ) ; <<1 x i64>> [#uses=0]
81 %r2 = call <1 x i64> @llvm.x86.mmx.psrl.q( <1 x i64> %A, <2 x i32> %B ) ; <<1 x i64>> [#uses=0]
82 ret void
83 }
843
854 declare <4 x float> @llvm.x86.sse.loadu.ps(i8*) nounwind readnone
865 declare <16 x i8> @llvm.x86.sse2.loadu.dq(i8*) nounwind readnone
898 %v0 = call <4 x float> @llvm.x86.sse.loadu.ps(i8* %a)
909 %v1 = call <16 x i8> @llvm.x86.sse2.loadu.dq(i8* %a)
9110 %v2 = call <2 x double> @llvm.x86.sse2.loadu.pd(double* %b)
11
12 ; CHECK: load i128* {{.*}}, align 1
13 ; CHECK: load i128* {{.*}}, align 1
14 ; CHECK: load i128* {{.*}}, align 1
9215 ret void
9316 }
9417
+0
-223
test/Assembler/AutoUpgradeMMXIntrinsics.ll less more
None ; Tests to make sure MMX intrinsics are automatically upgraded.
1 ; RUN: llvm-as < %s | llvm-dis -o %t
2 ; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<1 x i64\\\>}
3 ; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<2 x i32\\\>}
4 ; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<4 x i16\\\>}
5 ; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<8 x i8\\\>}
6 ; RUN: grep {llvm\\.x86\\.sse\\.pshuf\\.w} %t | not grep i32
7
8 ; Addition
9 declare <8 x i8> @llvm.x86.mmx.padd.b(<8 x i8>, <8 x i8>) nounwind readnone
10 declare <4 x i16> @llvm.x86.mmx.padd.w(<4 x i16>, <4 x i16>) nounwind readnone
11 declare <2 x i32> @llvm.x86.mmx.padd.d(<2 x i32>, <2 x i32>) nounwind readnone
12 declare <1 x i64> @llvm.x86.mmx.padd.q(<1 x i64>, <1 x i64>) nounwind readnone
13 declare <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8>, <8 x i8>) nounwind readnone
14 declare <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16>, <4 x i16>) nounwind readnone
15 declare <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8>, <8 x i8>) nounwind readnone
16 declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) nounwind readnone
17 define void @add(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D,
18 <2 x i32> %E, <2 x i32> %F, <1 x i64> %G, <1 x i64> %H) {
19 %r1 = call <8 x i8> @llvm.x86.mmx.padd.b(<8 x i8> %A, <8 x i8> %B)
20 %r2 = call <4 x i16> @llvm.x86.mmx.padd.w(<4 x i16> %C, <4 x i16> %D)
21 %r3 = call <2 x i32> @llvm.x86.mmx.padd.d(<2 x i32> %E, <2 x i32> %F)
22 %r4 = call <1 x i64> @llvm.x86.mmx.padd.q(<1 x i64> %G, <1 x i64> %H)
23 %r5 = call <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8> %A, <8 x i8> %B)
24 %r6 = call <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16> %C, <4 x i16> %D)
25 %r7 = call <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8> %A, <8 x i8> %B)
26 %r8 = call <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16> %C, <4 x i16> %D)
27 ret void
28 }
29
30 ; Subtraction
31 declare <8 x i8> @llvm.x86.mmx.psub.b(<8 x i8>, <8 x i8>) nounwind readnone
32 declare <4 x i16> @llvm.x86.mmx.psub.w(<4 x i16>, <4 x i16>) nounwind readnone
33 declare <2 x i32> @llvm.x86.mmx.psub.d(<2 x i32>, <2 x i32>) nounwind readnone
34 declare <1 x i64> @llvm.x86.mmx.psub.q(<1 x i64>, <1 x i64>) nounwind readnone
35 declare <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8>, <8 x i8>) nounwind readnone
36 declare <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16>, <4 x i16>) nounwind readnone
37 declare <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8>, <8 x i8>) nounwind readnone
38 declare <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16>, <4 x i16>) nounwind readnone
39 define void @sub(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D,
40 <2 x i32> %E, <2 x i32> %F, <1 x i64> %G, <1 x i64> %H) {
41 %r1 = call <8 x i8> @llvm.x86.mmx.psub.b(<8 x i8> %A, <8 x i8> %B)
42 %r2 = call <4 x i16> @llvm.x86.mmx.psub.w(<4 x i16> %C, <4 x i16> %D)
43 %r3 = call <2 x i32> @llvm.x86.mmx.psub.d(<2 x i32> %E, <2 x i32> %F)
44 %r4 = call <1 x i64> @llvm.x86.mmx.psub.q(<1 x i64> %G, <1 x i64> %H)
45 %r5 = call <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8> %A, <8 x i8> %B)
46 %r6 = call <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16> %C, <4 x i16> %D)
47 %r7 = call <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8> %A, <8 x i8> %B)
48 %r8 = call <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16> %C, <4 x i16> %D)
49 ret void
50 }
51
52 ; Multiplication
53 declare <4 x i16> @llvm.x86.mmx.pmulh.w(<4 x i16>, <4 x i16>) nounwind readnone
54 declare <4 x i16> @llvm.x86.mmx.pmull.w(<4 x i16>, <4 x i16>) nounwind readnone
55 declare <4 x i16> @llvm.x86.mmx.pmulhu.w(<4 x i16>, <4 x i16>) nounwind readnone
56 declare <4 x i16> @llvm.x86.mmx.pmulu.dq(<4 x i16>, <4 x i16>) nounwind readnone
57 declare <2 x i32> @llvm.x86.mmx.pmadd.wd(<4 x i16>, <4 x i16>) nounwind readnone
58 define void @mul(<4 x i16> %A, <4 x i16> %B) {
59 %r1 = call <4 x i16> @llvm.x86.mmx.pmulh.w(<4 x i16> %A, <4 x i16> %B)
60 %r2 = call <4 x i16> @llvm.x86.mmx.pmull.w(<4 x i16> %A, <4 x i16> %B)
61 %r3 = call <4 x i16> @llvm.x86.mmx.pmulhu.w(<4 x i16> %A, <4 x i16> %B)
62 %r4 = call <4 x i16> @llvm.x86.mmx.pmulu.dq(<4 x i16> %A, <4 x i16> %B)
63 %r5 = call <2 x i32> @llvm.x86.mmx.pmadd.wd(<4 x i16> %A, <4 x i16> %B)
64 ret void
65 }
66
67 ; Bitwise operations
68 declare <1 x i64> @llvm.x86.mmx.pand(<1 x i64>, <1 x i64>) nounwind readnone
69 declare <1 x i64> @llvm.x86.mmx.pandn(<1 x i64>, <1 x i64>) nounwind readnone
70 declare <1 x i64> @llvm.x86.mmx.por(<1 x i64>, <1 x i64>) nounwind readnone
71 declare <1 x i64> @llvm.x86.mmx.pxor(<1 x i64>, <1 x i64>) nounwind readnone
72 define void @bit(<1 x i64> %A, <1 x i64> %B) {
73 %r1 = call <1 x i64> @llvm.x86.mmx.pand(<1 x i64> %A, <1 x i64> %B)
74 %r2 = call <1 x i64> @llvm.x86.mmx.pandn(<1 x i64> %A, <1 x i64> %B)
75 %r3 = call <1 x i64> @llvm.x86.mmx.por(<1 x i64> %A, <1 x i64> %B)
76 %r4 = call <1 x i64> @llvm.x86.mmx.pxor(<1 x i64> %A, <1 x i64> %B)
77 ret void
78 }
79
80 ; Averages
81 declare <8 x i8> @llvm.x86.mmx.pavg.b(<8 x i8>, <8 x i8>) nounwind readnone
82 declare <4 x i16> @llvm.x86.mmx.pavg.w(<4 x i16>, <4 x i16>) nounwind readnone
83 define void @avg(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D) {
84 %r1 = call <8 x i8> @llvm.x86.mmx.pavg.b(<8 x i8> %A, <8 x i8> %B)
85 %r2 = call <4 x i16> @llvm.x86.mmx.pavg.w(<4 x i16> %C, <4 x i16> %D)
86 ret void
87 }
88
89 ; Maximum
90 declare <8 x i8> @llvm.x86.mmx.pmaxu.b(<8 x i8>, <8 x i8>) nounwind readnone
91 declare <4 x i16> @llvm.x86.mmx.pmaxs.w(<4 x i16>, <4 x i16>) nounwind readnone
92 define void @max(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D) {
93 %r1 = call <8 x i8> @llvm.x86.mmx.pmaxu.b(<8 x i8> %A, <8 x i8> %B)
94 %r2 = call <4 x i16> @llvm.x86.mmx.pmaxs.w(<4 x i16> %C, <4 x i16> %D)
95 ret void
96 }
97
98 ; Minimum
99 declare <8 x i8> @llvm.x86.mmx.pminu.b(<8 x i8>, <8 x i8>) nounwind readnone
100 declare <4 x i16> @llvm.x86.mmx.pmins.w(<4 x i16>, <4 x i16>) nounwind readnone
101 define void @min(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D) {
102 %r1 = call <8 x i8> @llvm.x86.mmx.pminu.b(<8 x i8> %A, <8 x i8> %B)
103 %r2 = call <4 x i16> @llvm.x86.mmx.pmins.w(<4 x i16> %C, <4 x i16> %D)
104 ret void
105 }
106
107 ; Packed sum of absolute differences
108 declare <4 x i16> @llvm.x86.mmx.psad.bw(<8 x i8>, <8 x i8>) nounwind readnone
109 define void @psad(<8 x i8> %A, <8 x i8> %B) {
110 %r1 = call <4 x i16> @llvm.x86.mmx.psad.bw(<8 x i8> %A, <8 x i8> %B)
111 ret void
112 }
113
114 ; Shift left
115 declare <4 x i16> @llvm.x86.mmx.psll.w(<4 x i16>, <1 x i64>) nounwind readnone
116 declare <2 x i32> @llvm.x86.mmx.psll.d(<2 x i32>, <1 x i64>) nounwind readnone
117 declare <1 x i64> @llvm.x86.mmx.psll.q(<1 x i64>, <1 x i64>) nounwind readnone
118 declare <4 x i16> @llvm.x86.mmx.pslli.w(<4 x i16>, i32) nounwind readnone
119 declare <2 x i32> @llvm.x86.mmx.pslli.d(<2 x i32>, i32) nounwind readnone
120 declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32) nounwind readnone
121 define void @shl(<4 x i16> %A, <2 x i32> %B, <1 x i64> %C, i32 %D) {
122 %r1 = call <4 x i16> @llvm.x86.mmx.psll.w(<4 x i16> %A, <1 x i64> %C)
123 %r2 = call <2 x i32> @llvm.x86.mmx.psll.d(<2 x i32> %B, <1 x i64> %C)
124 %r3 = call <1 x i64> @llvm.x86.mmx.psll.q(<1 x i64> %C, <1 x i64> %C)
125 %r4 = call <4 x i16> @llvm.x86.mmx.pslli.w(<4 x i16> %A, i32 %D)
126 %r5 = call <2 x i32> @llvm.x86.mmx.pslli.d(<2 x i32> %B, i32 %D)
127 %r6 = call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %C, i32 %D)
128 ret void
129 }
130
131 ; Shift right logical
132 declare <4 x i16> @llvm.x86.mmx.psrl.w(<4 x i16>, <1 x i64>) nounwind readnone
133 declare <2 x i32> @llvm.x86.mmx.psrl.d(<2 x i32>, <1 x i64>) nounwind readnone
134 declare <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64>, <1 x i64>) nounwind readnone
135 declare <4 x i16> @llvm.x86.mmx.psrli.w(<4 x i16>, i32) nounwind readnone
136 declare <2 x i32> @llvm.x86.mmx.psrli.d(<2 x i32>, i32) nounwind readnone
137 declare <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64>, i32) nounwind readnone
138 define void @shr(<4 x i16> %A, <2 x i32> %B, <1 x i64> %C, i32 %D) {
139 %r1 = call <4 x i16> @llvm.x86.mmx.psrl.w(<4 x i16> %A, <1 x i64> %C)
140 %r2 = call <2 x i32> @llvm.x86.mmx.psrl.d(<2 x i32> %B, <1 x i64> %C)
141 %r3 = call <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64> %C, <1 x i64> %C)
142 %r4 = call <4 x i16> @llvm.x86.mmx.psrli.w(<4 x i16> %A, i32 %D)
143 %r5 = call <2 x i32> @llvm.x86.mmx.psrli.d(<2 x i32> %B, i32 %D)
144 %r6 = call <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> %C, i32 %D)
145 ret void
146 }
147
148 ; Shift right arithmetic
149 declare <4 x i16> @llvm.x86.mmx.psra.w(<4 x i16>, <1 x i64>) nounwind readnone
150 declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <1 x i64>) nounwind readnone
151 declare <4 x i16> @llvm.x86.mmx.psrai.w(<4 x i16>, i32) nounwind readnone
152 declare <2 x i32> @llvm.x86.mmx.psrai.d(<2 x i32>, i32) nounwind readnone
153 define void @sra(<4 x i16> %A, <2 x i32> %B, <1 x i64> %C, i32 %D) {
154 %r1 = call <4 x i16> @llvm.x86.mmx.psra.w(<4 x i16> %A, <1 x i64> %C)
155 %r2 = call <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32> %B, <1 x i64> %C)
156 %r3 = call <4 x i16> @llvm.x86.mmx.psrai.w(<4 x i16> %A, i32 %D)
157 %r4 = call <2 x i32> @llvm.x86.mmx.psrai.d(<2 x i32> %B, i32 %D)
158 ret void
159 }
160
161 ; Pack/Unpack ops
162 declare <8 x i8> @llvm.x86.mmx.packsswb(<4 x i16>, <4 x i16>) nounwind readnone
163 declare <4 x i16> @llvm.x86.mmx.packssdw(<2 x i32>, <2 x i32>) nounwind readnone
164 declare <8 x i8> @llvm.x86.mmx.packuswb(<4 x i16>, <4 x i16>) nounwind readnone
165 declare <8 x i8> @llvm.x86.mmx.punpckhbw(<8 x i8>, <8 x i8>) nounwind readnone
166 declare <4 x i16> @llvm.x86.mmx.punpckhwd(<4 x i16>, <4 x i16>) nounwind readnone
167 declare <2 x i32> @llvm.x86.mmx.punpckhdq(<2 x i32>, <2 x i32>) nounwind readnone
168 declare <8 x i8> @llvm.x86.mmx.punpcklbw(<8 x i8>, <8 x i8>) nounwind readnone
169 declare <4 x i16> @llvm.x86.mmx.punpcklwd(<4 x i16>, <4 x i16>) nounwind readnone
170 declare <2 x i32> @llvm.x86.mmx.punpckldq(<2 x i32>, <2 x i32>) nounwind readnone
171 define void @pack_unpack(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D,
172 <2 x i32> %E, <2 x i32> %F) {
173 %r1 = call <8 x i8> @llvm.x86.mmx.packsswb(<4 x i16> %C, <4 x i16> %D)
174 %r2 = call <4 x i16> @llvm.x86.mmx.packssdw(<2 x i32> %E, <2 x i32> %F)
175 %r3 = call <8 x i8> @llvm.x86.mmx.packuswb(<4 x i16> %C, <4 x i16> %D)
176 %r4 = call <8 x i8> @llvm.x86.mmx.punpckhbw(<8 x i8> %A, <8 x i8> %B)
177 %r5 = call <4 x i16> @llvm.x86.mmx.punpckhwd(<4 x i16> %C, <4 x i16> %D)
178 %r6 = call <2 x i32> @llvm.x86.mmx.punpckhdq(<2 x i32> %E, <2 x i32> %F)
179 %r7 = call <8 x i8> @llvm.x86.mmx.punpcklbw(<8 x i8> %A, <8 x i8> %B)
180 %r8 = call <4 x i16> @llvm.x86.mmx.punpcklwd(<4 x i16> %C, <4 x i16> %D)
181 %r9 = call <2 x i32> @llvm.x86.mmx.punpckldq(<2 x i32> %E, <2 x i32> %F)
182 ret void
183 }
184
185 ; Integer comparison ops
186 declare <8 x i8> @llvm.x86.mmx.pcmpeq.b(<8 x i8>, <8 x i8>) nounwind readnone
187 declare <4 x i16> @llvm.x86.mmx.pcmpeq.w(<4 x i16>, <4 x i16>) nounwind readnone
188 declare <2 x i32> @llvm.x86.mmx.pcmpeq.d(<2 x i32>, <2 x i32>) nounwind readnone
189 declare <8 x i8> @llvm.x86.mmx.pcmpgt.b(<8 x i8>, <8 x i8>) nounwind readnone
190 declare <4 x i16> @llvm.x86.mmx.pcmpgt.w(<4 x i16>, <4 x i16>) nounwind readnone
191 declare <2 x i32> @llvm.x86.mmx.pcmpgt.d(<2 x i32>, <2 x i32>) nounwind readnone
192 define void @cmp(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D,
193 <2 x i32> %E, <2 x i32> %F) {
194 %r1 = call <8 x i8> @llvm.x86.mmx.pcmpeq.b(<8 x i8> %A, <8 x i8> %B)
195 %r2 = call <4 x i16> @llvm.x86.mmx.pcmpeq.w(<4 x i16> %C, <4 x i16> %D)
196 %r3 = call <2 x i32> @llvm.x86.mmx.pcmpeq.d(<2 x i32> %E, <2 x i32> %F)
197 %r4 = call <8 x i8> @llvm.x86.mmx.pcmpgt.b(<8 x i8> %A, <8 x i8> %B)
198 %r5 = call <4 x i16> @llvm.x86.mmx.pcmpgt.w(<4 x i16> %C, <4 x i16> %D)
199 %r6 = call <2 x i32> @llvm.x86.mmx.pcmpgt.d(<2 x i32> %E, <2 x i32> %F)
200 ret void
201 }
202
203 ; Miscellaneous
204 declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i32*) nounwind readnone
205 declare i32 @llvm.x86.mmx.pmovmskb(<8 x i8>) nounwind readnone
206 declare void @llvm.x86.mmx.movnt.dq(i32*, <1 x i64>) nounwind readnone
207 declare <1 x i64> @llvm.x86.mmx.palignr.b(<1 x i64>, <1 x i64>, i8) nounwind readnone
208 declare i32 @llvm.x86.mmx.pextr.w(<1 x i64>, i32) nounwind readnone
209 declare <1 x i64> @llvm.x86.mmx.pinsr.w(<1 x i64>, i32, i32) nounwind readnone
210 declare <4 x i16> @llvm.x86.ssse3.pshuf.w(<4 x i16>, i32) nounwind readnone
211 define void @misc(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D,
212 <2 x i32> %E, <2 x i32> %F, <1 x i64> %G, <1 x i64> %H,
213 i32* %I, i8 %J, i16 %K, i32 %L) {
214 call void @llvm.x86.mmx.maskmovq(<8 x i8> %A, <8 x i8> %B, i32* %I)
215 %r1 = call i32 @llvm.x86.mmx.pmovmskb(<8 x i8> %A)
216 call void @llvm.x86.mmx.movnt.dq(i32* %I, <1 x i64> %G)
217 %r2 = call <1 x i64> @llvm.x86.mmx.palignr.b(<1 x i64> %G, <1 x i64> %H, i8 %J)
218 %r3 = call i32 @llvm.x86.mmx.pextr.w(<1 x i64> %G, i32 37)
219 %r4 = call <1 x i64> @llvm.x86.mmx.pinsr.w(<1 x i64> %G, i32 37, i32 927)
220 %r5 = call <4 x i16> @llvm.x86.ssse3.pshuf.w(<4 x i16> %C, i32 37)
221 ret void
222 }
+0
-23
test/Bitcode/memcpy.ll less more
None ; RUN: llvm-as %s -o /dev/null
1
2 define void @test(i32* %P, i32* %Q) {
3 entry:
4 %tmp.1 = bitcast i32* %P to i8* ; [#uses=3]
5 %tmp.3 = bitcast i32* %Q to i8* ; [#uses=4]
6 tail call void @llvm.memcpy.i32( i8* %tmp.1, i8* %tmp.3, i32 100000, i32 1 )
7 tail call void @llvm.memcpy.i64( i8* %tmp.1, i8* %tmp.3, i64 100000, i32 1 )
8 tail call void @llvm.memset.i32( i8* %tmp.3, i8 14, i32 10000, i32 0 )
9 tail call void @llvm.memmove.i32( i8* %tmp.1, i8* %tmp.3, i32 123124, i32 1 )
10 tail call void @llvm.memmove.i64( i8* %tmp.1, i8* %tmp.3, i64 123124, i32 1 )
11 ret void
12 }
13
14 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
15
16 declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
17
18 declare void @llvm.memset.i32(i8*, i8, i32, i32)
19
20 declare void @llvm.memmove.i32(i8*, i8*, i32, i32)
21
22 declare void @llvm.memmove.i64(i8*, i8*, i64, i32)
+0
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test/CodeGen/ARM/2007-05-07-jumptoentry.ll less more
None ; RUN: llc < %s | not grep 1_0
1 ; This used to create an extra branch to 'entry', LBB1_0.
2
3 ; ModuleID = 'bug.bc'
4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
5 target triple = "arm-apple-darwin8"
6 %struct.HexxagonMove = type { i8, i8, i32 }
7 %struct.HexxagonMoveList = type { i32, %struct.HexxagonMove* }
8
9 define void @_ZN16HexxagonMoveList8sortListEv(%struct.HexxagonMoveList* %this) {
10 entry:
11 %tmp51 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 0 ; [#uses=1]
12 %tmp2 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 1 ; <%struct.HexxagonMove**> [#uses=2]
13 br label %bb49
14
15 bb1: ; preds = %bb49
16 %tmp3 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=5]
17 %tmp6 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 2 ; [#uses=1]
18 %tmp7 = load i32* %tmp6 ; [#uses=2]
19 %tmp12 = add i32 %i.1, 1 ; [#uses=7]
20 %tmp14 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 2 ; [#uses=1]
21 %tmp15 = load i32* %tmp14 ; [#uses=1]
22 %tmp16 = icmp slt i32 %tmp7, %tmp15 ; [#uses=1]
23 br i1 %tmp16, label %cond_true, label %bb49
24
25 cond_true: ; preds = %bb1
26 %tmp23.0 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 0 ; [#uses=2]
27 %tmp67 = load i8* %tmp23.0 ; [#uses=1]
28 %tmp23.1 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 1 ; [#uses=1]
29 %tmp68 = load i8* %tmp23.1 ; [#uses=1]
30 %tmp3638 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 0 ; [#uses=1]
31 tail call void @llvm.memcpy.i32( i8* %tmp23.0, i8* %tmp3638, i32 8, i32 4 )
32 %tmp41 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=3]
33 %tmp44.0 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 0 ; [#uses=1]
34 store i8 %tmp67, i8* %tmp44.0
35 %tmp44.1 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 1 ; [#uses=1]
36 store i8 %tmp68, i8* %tmp44.1
37 %tmp44.2 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 2 ; [#uses=1]
38 store i32 %tmp7, i32* %tmp44.2
39 br label %bb49
40
41 bb49: ; preds = %bb59, %cond_true, %bb1, %entry
42 %i.1 = phi i32 [ 0, %entry ], [ %tmp12, %bb1 ], [ %tmp12, %cond_true ], [ 0, %bb59 ] ; [#uses=5]
43 %move.2 = phi i32 [ 0, %entry ], [ 1, %cond_true ], [ %move.2, %bb1 ], [ 0, %bb59 ] ; [#uses=2]
44 %tmp52 = load i32* %tmp51 ; [#uses=1]
45 %tmp53 = add i32 %tmp52, -1 ; [#uses=1]
46 %tmp55 = icmp sgt i32 %tmp53, %i.1 ; [#uses=1]
47 br i1 %tmp55, label %bb1, label %bb59
48
49 bb59: ; preds = %bb49
50 %tmp61 = icmp eq i32 %move.2, 0 ; [#uses=1]
51 br i1 %tmp61, label %return, label %bb49
52
53 return: ; preds = %bb59
54 ret void
55 }
56
57 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+0
-237
test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll less more
None ; RUN: llc < %s
1 ; PR1424
2
3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
4 target triple = "arm-unknown-linux-gnueabi"
5 %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
6 %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* }
7 %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 }
8 %struct.AVEvalExpr = type opaque
9 %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
10 %struct.AVOption = type opaque
11 %struct.AVPaletteControl = type { i32, [256 x i32] }
12 %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
13 %struct.AVRational = type { i32, i32 }
14 %struct.BlockNode = type { i16, i16, i8, [3 x i8], i8, i8 }
15 %struct.DSPContext = type { void (i16*, i8*, i32)*, void (i16*, i8*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, i32 (i16*)*, void (i8*, i8*, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, void (i16*)*, i32 (i8*, i32)*, i32 (i8*, i32)*, [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], i32 (i8*, i16*, i32)*, [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [2 x void (i8*, i8*, i8*, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [8 x void (i8*, i8*, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [10 x void (i8*, i32, i32, i32, i32)*], [10 x void (i8*, i8*, i32, i32, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i16*, i32)*, [2 x [4 x i32 (i8*, i8*, i8*, i32, i32)*]], void (i8*, i8*, i32)*, void (i8*, i8*, i8*, i32)*, void (i8*, i8*, i8*, i32, i32*, i32*)*, void (i32*, i32*, i32)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32)*, void (i8*, i32, i32, i32)*, void ([4 x [4 x i16]]*, i8*, [40 x i8]*, [40 x [2 x i16]]*, i32, i32, i32, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32)*, void (float*, float*, i32)*, void (float*, float*, i32)*, void (float*, float*, float*, i32)*, void (float*, float*, float*, float*, i32, i32, i32)*, void (i16*, float*, i32)*, void (i16*)*, void (i16*)*, void (i16*)*, void (i8*, i32, i16*)*, void (i8*, i32, i16*)*, [64 x i8], i32, i32 (i16*, i16*, i16*, i32)*, void (i16*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void ([4 x i16]*)*, void (i32*, i32*, i32*, i32*, i32*, i32*, i32)*, void (i32*, i32)*, void (i8*, i32, i8**, i32, i32, i32, i32, i32, %struct.slice_buffer*, i32, i8*)*, void (i8*, i32, i32)*, [4 x void (i8*, i32, i8*, i32, i32, i32)*], void (i16*)*, void (i16*, i32)*, void (i16*, i32)*, void (i16*, i32)*, void (i8*, i32)*, void (i8*, i32)*, [16 x void (i8*, i8*, i32, i32)*] }
16 %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
17 %struct.GetBitContext = type { i8*, i8*, i32*, i32, i32, i32, i32 }
18 %struct.MJpegContext = type opaque
19 %struct.MotionEstContext = type { %struct.AVCodecContext*, i32, [4 x [2 x i32]], [4 x [2 x i32]], i8*, i8*, [2 x i8*], i8*, i32, i32*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x [4 x i8*]], [4 x [4 x i8*]], i32, i32, i32, i32, i32, [4 x void (i8*, i8*, i32, i32)*]*, [4 x void (i8*, i8*, i32, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [4097 x i8]*, i8*, i32 (%struct.MpegEncContext*, i32*, i32*, i32, i32, i32, i32, i32)* }
20 %struct.MpegEncContext = type { %struct.AVCodecContext*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Picture*, %struct.Picture**, %struct.Picture**, i32, i32, [8 x %struct.MpegEncContext*], %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture*, %struct.Picture*, %struct.Picture*, [3 x i8*], [3 x i32], i16*, [3 x i16*], [20 x i16], i32, i32, i8*, i8*, i8*, i8*, i8*, [16 x i16]*, [3 x [16 x i16]*], i32, i8*, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, [5 x i32], i32, i32, i32, i32, %struct.DSPContext, i32, i32, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i8*], [2 x [2 x i8*]], i32, i32, i32, [2 x [4 x [2 x i32]]], [2 x [2 x i32]], [2 x [2 x [2 x i32]]], i8*, [2 x [64 x i16]], %struct.MotionEstContext, i32, i32, i32, i32, i32, i32, i16*, [6 x i32], [6 x i32], [3 x i8*], i32*, [64 x i16], [64 x i16], [64 x i16], [64 x i16], i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [8 x i32], [64 x i32]*, [64 x i32]*, [2 x [64 x i16]]*, [2 x [64 x i16]]*, [12 x i32], %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, [64 x i32]*, [2 x i32], [64 x i16]*, i8*, i64, i64, i32, i32, %struct.RateControlContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, %struct.GetBitContext, i32, i32, i32, %struct.ParseContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [2 x i32]], [2 x [2 x i32]], [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, [3 x i32], %struct.MJpegContext*, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [65 x [65 x [2 x i32]]]]*, i32, i32, %struct.GetBitContext, i32, i32, i32, i8*, i32, [2 x [2 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i8*, i32, [12 x i16*], [64 x i16]*, [8 x [64 x i16]]*, i32 (%struct.MpegEncContext*, [64 x i16]*)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, void (%struct.MpegEncContext*, i16*)* }
21 %struct.ParseContext = type { i8*, i32, i32, i32, i32, i32, i32, i32 }
22 %struct.Picture = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*], [3 x i8*], [2 x [2 x i16]*], i32*, [2 x i32], i32, i32, i32, i32, [2 x [16 x i32]], [2 x i32], i32, i32, i16*, i16*, i8*, i32*, i32 }
23 %struct.Plane = type { i32, i32, [8 x [4 x %struct.SubBand]] }
24 %struct.Predictor = type { double, double, double }
25 %struct.PutBitContext = type { i32, i32, i8*, i8*, i8* }
26 %struct.RangeCoder = type { i32, i32, i32, i32, [256 x i8], [256 x i8], i8*, i8*, i8* }
27 %struct.RateControlContext = type { %struct.FILE*, i32, %struct.RateControlEntry*, double, [5 x %struct.Predictor], double, double, double, double, double, [5 x double], i32, i32, [5 x i64], [5 x i64], [5 x i64], [5 x i64], [5 x i32], i32, i8*, float, i32, %struct.AVEvalExpr* }
28 %struct.RateControlEntry = type { i32, float, i32, i32, i32, i32, i32, i64, i32, float, i32, i32, i32, i32, i32, i32 }
29 %struct.RcOverride = type { i32, i32, i32, float }
30 %struct.ScanTable = type { i8*, [64 x i8], [64 x i8] }
31 %struct.SnowContext = type { %struct.AVCodecContext*, %struct.RangeCoder, %struct.DSPContext, %struct.AVFrame, %struct.AVFrame, %struct.AVFrame, [8 x %struct.AVFrame], %struct.AVFrame, [32 x i8], [4224 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [8 x [2 x i16]*], [8 x i32*], i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.Plane], %struct.BlockNode*, [1024 x i32], i32, %struct.slice_buffer, %struct.MpegEncContext }
32 %struct.SubBand = type { i32, i32, i32, i32, i32, i32*, i32, i32, i32, %struct.x_and_coeff*, %struct.SubBand*, [519 x [32 x i8]] }
33 %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
34 %struct.slice_buffer = type { i32**, i32**, i32, i32, i32, i32, i32* }
35 %struct.x_and_coeff = type { i16, i16 }
36
37 define fastcc void @iterative_me(%struct.SnowContext* %s) {
38 entry:
39 %state = alloca [4224 x i8], align 8 ; <[4224 x i8]*> [#uses=0]
40 %best_rd4233 = alloca i32, align 4 ; [#uses=0]
41 %tmp21 = getelementptr %struct.SnowContext* %s, i32 0, i32 36 ; [#uses=2]
42 br label %bb4198
43
44 bb79: ; preds = %bb4189.preheader
45 br i1 false, label %cond_next239, label %cond_true
46
47 cond_true: ; preds = %bb79
48 ret void
49
50 cond_next239: ; preds = %bb79
51 %tmp286 = alloca i8, i32 0 ; [#uses=0]
52 ret void
53
54 bb4198: ; preds = %bb4189.preheader, %entry
55 br i1 false, label %bb4189.preheader, label %bb4204
56
57 bb4189.preheader: ; preds = %bb4198
58 br i1 false, label %bb79, label %bb4198
59
60 bb4204: ; preds = %bb4198
61 br i1 false, label %bb4221, label %cond_next4213
62
63 cond_next4213: ; preds = %bb4204
64 ret void
65
66 bb4221: ; preds = %bb4204
67 br i1 false, label %bb5242.preheader, label %UnifiedReturnBlock
68
69 bb5242.preheader: ; preds = %bb4221
70 br label %bb5242
71
72 bb4231: ; preds = %bb5233
73 %tmp4254.sum = add i32 0, 1 ; [#uses=2]
74 br i1 false, label %bb4559, label %cond_next4622
75
76 bb4559: ; preds = %bb4231
77 ret void
78
79 cond_next4622: ; preds = %bb4231
80 %tmp4637 = load i16* null ; [#uses=1]
81 %tmp46374638 = sext i16 %tmp4637 to i32 ; [#uses=1]
82 %tmp4642 = load i16* null ; [#uses=1]
83 %tmp46424643 = sext i16 %tmp4642 to i32 ; [#uses=1]
84 %tmp4648 = load i16* null ; [#uses=1]
85 %tmp46484649 = sext i16 %tmp4648 to i32 ; [#uses=1]
86 %tmp4653 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 0 ; [#uses=1]
87 %tmp4654 = load i16* %tmp4653 ; [#uses=1]
88 %tmp46544655 = sext i16 %tmp4654 to i32 ; [#uses=1]
89 %tmp4644 = add i32 %tmp46374638, 2 ; [#uses=1]
90 %tmp4650 = add i32 %tmp4644, %tmp46424643 ; [#uses=1]
91 %tmp4656 = add i32 %tmp4650, %tmp46484649 ; [#uses=1]
92 %tmp4657 = add i32 %tmp4656, %tmp46544655 ; [#uses=2]
93 %tmp4658 = ashr i32 %tmp4657, 2 ; [#uses=1]
94 %tmp4662 = load i16* null ; [#uses=1]
95 %tmp46624663 = sext i16 %tmp4662 to i32 ; [#uses=1]
96 %tmp4672 = getelementptr %struct.BlockNode* null, i32 0, i32 1 ; [#uses=1]
97 %tmp4673 = load i16* %tmp4672 ; [#uses=1]
98 %tmp46734674 = sext i16 %tmp4673 to i32 ; [#uses=1]
99 %tmp4678 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 1 ; [#uses=1]
100 %tmp4679 = load i16* %tmp4678 ; [#uses=1]
101 %tmp46794680 = sext i16 %tmp4679 to i32 ; [#uses=1]
102 %tmp4669 = add i32 %tmp46624663, 2 ; [#uses=1]
103 %tmp4675 = add i32 %tmp4669, 0 ; [#uses=1]
104 %tmp4681 = add i32 %tmp4675, %tmp46734674 ; [#uses=1]
105 %tmp4682 = add i32 %tmp4681, %tmp46794680 ; [#uses=2]
106 %tmp4683 = ashr i32 %tmp4682, 2 ; [#uses=1]
107 %tmp4703 = load i32* %tmp21 ; [#uses=1]
108 %tmp4707 = shl i32 %tmp4703, 0 ; [#uses=4]
109 %tmp4710 = load %struct.BlockNode** null ; <%struct.BlockNode*> [#uses=6]
110 %tmp4713 = mul i32 %tmp4707, %mb_y.4 ; [#uses=1]
111 %tmp4715 = add i32 %tmp4713, %mb_x.7 ; [#uses=7]
112 store i8 0, i8* null
113 store i8 0, i8* null
114 %tmp47594761 = bitcast %struct.BlockNode* null to i8* ; [#uses=2]
115 call void @llvm.memcpy.i32( i8* null, i8* %tmp47594761, i32 10, i32 0 )
116 %tmp4716.sum5775 = add i32 %tmp4715, 1 ; [#uses=1]
117 %tmp4764 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5775 ; <%struct.BlockNode*> [#uses=1]
118 %tmp47644766 = bitcast %struct.BlockNode* %tmp4764 to i8* ; [#uses=1]
119 %tmp4716.sum5774 = add i32 %tmp4715, %tmp4707 ; [#uses=0]
120 %tmp47704772 = bitcast %struct.BlockNode* null to i8* ; [#uses=1]
121 %tmp4774 = add i32 %tmp4707, 1 ; [#uses=1]
122 %tmp4716.sum5773 = add i32 %tmp4774, %tmp4715 ; [#uses=1]
123 %tmp4777 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5773 ; <%struct.BlockNode*> [#uses=1]
124 %tmp47774779 = bitcast %struct.BlockNode* %tmp4777 to i8* ; [#uses=1]
125 %tmp4781 = icmp slt i32 %mb_x.7, 0 ; [#uses=1]
126 %tmp4788 = or i1 %tmp4781, %tmp4784 ; [#uses=2]
127 br i1 %tmp4788, label %cond_true4791, label %cond_next4794
128
129 cond_true4791: ; preds = %cond_next4622
130 unreachable
131
132 cond_next4794: ; preds = %cond_next4622
133 %tmp4797 = icmp slt i32 %mb_x.7, %tmp4707 ; [#uses=1]
134 br i1 %tmp4797, label %cond_next4803, label %cond_true4800
135
136 cond_true4800: ; preds = %cond_next4794
137 unreachable
138
139 cond_next4803: ; preds = %cond_next4794
140 %tmp4825 = ashr i32 %tmp4657, 12 ; [#uses=1]
141 shl i32 %tmp4682, 4 ; :0 [#uses=1]
142 %tmp4828 = and i32 %0, -64 ; [#uses=1]
143 %tmp4831 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 2 ; [#uses=0]
144 %tmp4826 = add i32 %tmp4828, %tmp4825 ; [#uses=1]
145 %tmp4829 = add i32 %tmp4826, 0 ; [#uses=1]
146 %tmp4835 = add i32 %tmp4829, 0 ; [#uses=1]
147 store i32 %tmp4835, i32* null
148 %tmp48534854 = trunc i32 %tmp4658 to i16 ; [#uses=1]
149 %tmp4856 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 0 ; [#uses=1]
150 store i16 %tmp48534854, i16* %tmp4856
151 %tmp48574858 = trunc i32 %tmp4683 to i16 ; [#uses=1]
152 %tmp4860 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 1 ; [#uses=1]
153 store i16 %tmp48574858, i16* %tmp4860
154 %tmp4866 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 4 ; [#uses=0]
155 br i1 false, label %bb4933, label %cond_false4906
156
157 cond_false4906: ; preds = %cond_next4803
158 call void @llvm.memcpy.i32( i8* %tmp47594761, i8* null, i32 10, i32 0 )
159 call void @llvm.memcpy.i32( i8* %tmp47644766, i8* null, i32 10, i32 0 )
160 call void @llvm.memcpy.i32( i8* %tmp47704772, i8* null, i32 10, i32 0 )
161 call void @llvm.memcpy.i32( i8* %tmp47774779, i8* null, i32 10, i32 0 )
162 br label %bb5215
163
164 bb4933: ; preds = %bb5215, %cond_next4803
165 br i1 false, label %cond_true4944, label %bb5215
166
167 cond_true4944: ; preds = %bb4933
168 %tmp4982 = load i32* %tmp21 ; [#uses=1]
169 %tmp4986 = shl i32 %tmp4982, 0 ; [#uses=2]
170 %tmp4992 = mul i32 %tmp4986, %mb_y.4 ; [#uses=1]
171 %tmp4994 = add i32 %tmp4992, %mb_x.7 ; [#uses=5]
172 %tmp4995.sum5765 = add i32 %tmp4994, 1 ; [#uses=1]
173 %tmp5043 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5765 ; <%struct.BlockNode*> [#uses=1]
174 %tmp50435045 = bitcast %struct.BlockNode* %tmp5043 to i8* ; [#uses=2]
175 call void @llvm.memcpy.i32( i8* null, i8* %tmp50435045, i32 10, i32 0 )
176 %tmp4995.sum5764 = add i32 %tmp4994, %tmp4986 ; [#uses=1]
177 %tmp5049 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5764 ; <%struct.BlockNode*> [#uses=1]
178 %tmp50495051 = bitcast %struct.BlockNode* %tmp5049 to i8* ; [#uses=2]
179 call void @llvm.memcpy.i32( i8* null, i8* %tmp50495051, i32 10, i32 0 )
180 %tmp4995.sum5763 = add i32 0, %tmp4994 ; [#uses=1]
181 %tmp5056 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5763 ; <%struct.BlockNode*> [#uses=1]
182 %tmp50565058 = bitcast %struct.BlockNode* %tmp5056 to i8* ; [#uses=1]
183 br i1 %tmp4788, label %cond_true5070, label %cond_next5073
184
185 cond_true5070: ; preds = %cond_true4944
186 unreachable
187
188 cond_next5073: ; preds = %cond_true4944
189 %tmp5139 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 1 ; [#uses=0]
190 %tmp5145 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 4 ; [#uses=0]
191 call void @llvm.memcpy.i32( i8* %tmp50435045, i8* null, i32 10, i32 0 )
192 call void @llvm.memcpy.i32( i8* %tmp50495051, i8* null, i32 10, i32 0 )
193 call void @llvm.memcpy.i32( i8* %tmp50565058, i8* null, i32 10, i32 0 )
194 br label %bb5215
195
196 bb5215: ; preds = %cond_next5073, %bb4933, %cond_false4906
197 %i4232.3 = phi i32 [ 0, %cond_false4906 ], [ 0, %cond_next5073 ], [ 0, %bb4933 ] ; [#uses=1]
198 %tmp5217 = icmp slt i32 %i4232.3, 4 ; [#uses=1]
199 br i1 %tmp5217, label %bb4933, label %bb5220
200
201 bb5220: ; preds = %bb5215
202 br i1 false, label %bb5230, label %cond_true5226
203
204 cond_true5226: ; preds = %bb5220
205 ret void
206
207 bb5230: ; preds = %bb5220
208 %indvar.next = add i32 %indvar, 1 ; [#uses=1]
209 br label %bb5233
210
211 bb5233: ; preds = %bb5233.preheader, %bb5230
212 %indvar = phi i32 [ 0, %bb5233.preheader ], [ %indvar.next, %bb5230 ] ; [#uses=2]
213 %mb_x.7 = shl i32 %indvar, 1 ; [#uses=4]
214 br i1 false, label %bb4231, label %bb5239
215
216 bb5239: ; preds = %bb5233
217 %indvar.next37882 = add i32 %indvar37881, 1 ; [#uses=1]
218 br label %bb5242
219
220 bb5242: ; preds = %bb5239, %bb5242.preheader
221 %indvar37881 = phi i32 [ 0, %bb5242.preheader ], [ %indvar.next37882, %bb5239 ] ; [#uses=2]
222 %mb_y.4 = shl i32 %indvar37881, 1 ; [#uses=3]
223 br i1 false, label %bb5233.preheader, label %bb5248
224
225 bb5233.preheader: ; preds = %bb5242
226 %tmp4784 = icmp slt i32 %mb_y.4, 0 ; [#uses=1]
227 br label %bb5233
228
229 bb5248: ; preds = %bb5242
230 ret void
231
232 UnifiedReturnBlock: ; preds = %bb4221
233 ret void
234 }
235
236 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin9 -mattr=+vfp2
11 ; rdar://6653182
22
3 %struct.ggBRDF = type { i32 (...)** }
4 %struct.ggPoint2 = type { [2 x double] }
5 %struct.ggPoint3 = type { [3 x double] }
6 %struct.ggSpectrum = type { [8 x float] }
7 %struct.ggSphere = type { %struct.ggPoint3, double }
8 %struct.mrDiffuseAreaSphereLuminaire = type { %struct.mrSphere, %struct.ggSpectrum }
9 %struct.mrDiffuseCosineSphereLuminaire = type { %struct.mrDiffuseAreaSphereLuminaire }
10 %struct.mrSphere = type { %struct.ggBRDF, %struct.ggSphere }
113
12 declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
4 %struct.ggBRDF = type { i32 (...)** }
5 %struct.ggPoint2 = type { [2 x double] }
6 %struct.ggPoint3 = type { [3 x double] }
7 %struct.ggSpectrum = type { [8 x float] }
8 %struct.ggSphere = type { %struct.ggPoint3, double }
9 %struct.mrDiffuseAreaSphereLuminaire = type { %struct.mrSphere, %struct.ggSpectrum }
10 %struct.mrDiffuseCosineSphereLuminaire = type { %struct.mrDiffuseAreaSphereLuminaire }
11 %struct.mrSphere = type { %struct.ggBRDF, %struct.ggSphere }
1312
1413 declare double @llvm.sqrt.f64(double) nounwind readonly
1514
1918
2019 define i32 @_ZNK34mrDiffuseSolidAngleSphereLuminaire18selectVisiblePointERK8ggPoint3RK9ggVector3RK8ggPoint2dRS0_Rd(%struct.mrDiffuseCosineSphereLuminaire* nocapture %this, %struct.ggPoint3* nocapture %x, %struct.ggPoint3* nocapture %unnamed_arg, %struct.ggPoint2* nocapture %uv, double %unnamed_arg2, %struct.ggPoint3* nocapture %on_light, double* nocapture %invProb) nounwind {
2120 entry:
22 %0 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind ; [#uses=4]
23 %1 = fcmp ult double 0.000000e+00, %0 ; [#uses=1]
24 br i1 %1, label %bb3, label %bb7
21 %0 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind
22 %1 = fcmp ult double 0.000000e+00, %0
23 br i1 %1, label %bb3, label %bb7
2524
26 bb3: ; preds = %entry
27 %2 = fdiv double 1.000000e+00, 0.000000e+00 ; [#uses=1]
28 %3 = fmul double 0.000000e+00, %2 ; [#uses=2]
29 %4 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind ; [#uses=1]
30 %5 = fdiv double 1.000000e+00, %4 ; [#uses=2]
31 %6 = fmul double %3, %5 ; [#uses=2]
32 %7 = fmul double 0.000000e+00, %5 ; [#uses=2]
33 %8 = fmul double %3, %7 ; [#uses=1]
34 %9 = fsub double %8, 0.000000e+00 ; [#uses=1]
35 %10 = fmul double 0.000000e+00, %6 ; [#uses=1]
36 %11 = fsub double 0.000000e+00, %10 ; [#uses=1]
37 %12 = fsub double -0.000000e+00, %11 ; [#uses=1]
38 %13 = fmul double %0, %0 ; [#uses=2]
39 %14 = fsub double %13, 0.000000e+00 ; [#uses=1]
40 %15 = call double @llvm.sqrt.f64(double %14) ; [#uses=1]
41 %16 = fmul double 0.000000e+00, %15 ; [#uses=1]
42 %17 = fdiv double %16, %0 ; [#uses=1]
43 %18 = fadd double 0.000000e+00, %17 ; [#uses=1]
44 %19 = call double @acos(double %18) nounwind readonly ; [#uses=1]
45 %20 = load double* null, align 4 ; [#uses=1]
46 %21 = fmul double %20, 0x401921FB54442D18 ; [#uses=1]
47 %22 = call double @sin(double %19) nounwind readonly ; [#uses=2]
48 %23 = fmul double %22, 0.000000e+00 ; [#uses=2]
49 %24 = fmul double %6, %23 ; [#uses=1]
50 %25 = fmul double %7, %23 ; [#uses=1]
51 %26 = call double @sin(double %21) nounwind readonly ; [#uses=1]
52 %27 = fmul double %22, %26 ; [#uses=2]
53 %28 = fmul double %9, %27 ; [#uses=1]
54 %29 = fmul double %27, %12 ; [#uses=1]
55 %30 = fadd double %24, %28 ; [#uses=1]
56 %31 = fadd double 0.000000e+00, %29 ; [#uses=1]
57 %32 = fadd double %25, 0.000000e+00 ; [#uses=1]
58 %33 = fadd double %30, 0.000000e+00 ; [#uses=1]
59 %34 = fadd double %31, 0.000000e+00 ; [#uses=1]
60 %35 = fadd double %32, 0.000000e+00 ; [#uses=1]
61 %36 = bitcast %struct.ggPoint3* %x to i8* ; [#uses=1]
62 call void @llvm.memcpy.i32(i8* null, i8* %36, i32 24, i32 4) nounwind
63 store double %33, double* null, align 8
64 br i1 false, label %_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit, label %bb5.i.i.i
25 bb3: ; preds = %entry
26 %2 = fdiv double 1.000000e+00, 0.000000e+00
27 %3 = fmul double 0.000000e+00, %2
28 %4 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind
29 %5 = fdiv double 1.000000e+00, %4
30 %6 = fmul double %3, %5
31 %7 = fmul double 0.000000e+00, %5
32 %8 = fmul double %3, %7
33 %9 = fsub double %8, 0.000000e+00
34 %10 = fmul double 0.000000e+00, %6
35 %11 = fsub double 0.000000e+00, %10
36 %12 = fsub double -0.000000e+00, %11
37 %13 = fmul double %0, %0
38 %14 = fsub double %13, 0.000000e+00
39 %15 = call double @llvm.sqrt.f64(double %14)
40 %16 = fmul double 0.000000e+00, %15
41 %17 = fdiv double %16, %0
42 %18 = fadd double 0.000000e+00, %17
43 %19 = call double @acos(double %18) nounwind readonly
44 %20 = load double* null, align 4
45 %21 = fmul double %20, 0x401921FB54442D18
46 %22 = call double @sin(double %19) nounwind readonly
47 %23 = fmul double %22, 0.000000e+00
48 %24 = fmul double %6, %23
49 %25 = fmul double %7, %23
50 %26 = call double @sin(double %21) nounwind readonly
51 %27 = fmul double %22, %26
52 %28 = fmul double %9, %27
53 %29 = fmul double %27, %12
54 %30 = fadd double %24, %28
55 %31 = fadd double 0.000000e+00, %29
56 %32 = fadd double %25, 0.000000e+00
57 %33 = fadd double %30, 0.000000e+00
58 %34 = fadd double %31, 0.000000e+00
59 %35 = fadd double %32, 0.000000e+00
60 %36 = bitcast %struct.ggPoint3* %x to i8*
61 call void @llvm.memcpy.p0i8.p0i8.i32(i8* null, i8* %36, i32 24, i32 4, i1 false)
62 store double %33, double* null, align 8
63 br i1 false, label %_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit, label %bb5.i.i.i
6564
66 bb5.i.i.i: ; preds = %bb3
67 unreachable
65 bb5.i.i.i: ; preds = %bb3
66 unreachable
6867
69 _Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit: ; preds = %bb3
70 %37 = fsub double %13, 0.000000e+00 ; [#uses=0]
71 %38 = fsub double -0.000000e+00, %34 ; [#uses=0]
72 %39 = fsub double -0.000000e+00, %35 ; [#uses=0]
73 ret i32 1
68 _Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit: ; preds = %bb3
69 %37 = fsub double %13, 0.000000e+00
70 %38 = fsub double -0.000000e+00, %34
71 %39 = fsub double -0.000000e+00, %35
72 ret i32 1
7473
75 bb7: ; preds = %entry
76 ret i32 0
74 bb7: ; preds = %entry
75 ret i32 0
7776 }
77
78 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
+0
-77
test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll less more
None ; RUN: llc < %s -mtriple=armv6-apple-darwin
1
2 type { i32, i32, %struct.D_Sym**, [3 x %struct.D_Sym*] } ; type %0
3 type { i32, %struct.D_Reduction** } ; type %1
4 type { i32, %struct.D_RightEpsilonHint* } ; type %2
5 type { i32, %struct.D_ErrorRecoveryHint* } ; type %3
6 type { i32, i32, %struct.D_Reduction**, [3 x %struct.D_Reduction*] } ; type %4
7 %struct.D_ErrorRecoveryHint = type { i16, i16, i8* }
8 %struct.D_ParseNode = type { i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, i8*, i8* }
9 %struct.D_Parser = type { i8*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, %struct.D_Scope*, void (%struct.D_Parser*)*, %struct.D_ParseNode* (%struct.D_Parser*, i32, %struct.D_ParseNode**)*, void (%struct.D_ParseNode*)*, %struct.d_loc_t, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
10 %struct.D_ParserTables = type { i32, %struct.D_State*, i16*, i32, i32, %struct.D_Symbol*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, i32, %struct.D_Pass*, i32 }
11 %struct.D_Pass = type { i8*, i32, i32, i32 }
12 %struct.D_Reduction = type { i16, i16, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)*, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)*, i16, i16, i32, i32, i32, i32, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)** }
13 %struct.D_RightEpsilonHint = type { i16, i16, %struct.D_Reduction* }
14 %struct.D_Scope = type { i8, %struct.D_Sym*, %struct.D_SymHash*, %struct.D_Sym*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope* }
15 %struct.D_Shift = type { i16, i8, i8, i32, i32, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)* }
16 %struct.D_State = type { i8*, i32, %1, %2, %3, %struct.D_Shift**, i32 (i8**, i32*, i32*, i16*, i32*, i8*, i32*)*, i8*, i8, i8, i8, i8*, %struct.D_Shift***, i32 }
17 %struct.D_Sym = type { i8*, i32, i32, %struct.D_Sym*, %struct.D_Sym*, i32 }
18 %struct.D_SymHash = type { i32, i32, %0 }
19 %struct.D_Symbol = type { i32, i8*, i32 }
20 %struct.PNode = type { i32, i32, i32, i32, %struct.D_Reduction*, %struct.D_Shift*, i32, %struct.VecPNode, i32, i8, i8, %struct.PNode*, %struct.PNode*, %struct.PNode*, %struct.PNode*, i8*, i8*, %struct.D_Scope*, i8*, %struct.D_ParseNode }
21 %struct.PNodeHash = type { %struct.PNode**, i32, i32, i32, %struct.PNode* }
22 %struct.Parser = type { %struct.D_Parser, i8*, i8*, %struct.D_ParserTables*, i32, i32, i32, i32, i32, i32, i32, %struct.PNodeHash, %struct.SNodeHash, %struct.Reduction*, %struct.Shift*, %struct.D_Scope*, %struct.SNode*, i32, %struct.Reduction*, %struct.Shift*, i32, %struct.PNode*, %struct.SNode*, %struct.ZNode*, %4, %struct.ShiftResult*, %struct.D_Shift, %struct.Parser*, i8* }
23 %struct.Reduction = type { %struct.ZNode*, %struct.SNode*, %struct.D_Reduction*, %struct.SNode*, i32, %struct.Reduction* }
24 %struct.SNode = type { %struct.D_State*, %struct.D_Scope*, i8*, %struct.d_loc_t, i32, %struct.PNode*, %struct.VecZNode, i32, %struct.SNode*, %struct.SNode* }
25 %struct.SNodeHash = type { %struct.SNode**, i32, i32, i32, %struct.SNode*, %struct.SNode* }
26 %struct.Shift = type { %struct.SNode*, %struct.Shift* }
27 %struct.ShiftResult = type { %struct.D_Shift*, %struct.d_loc_t }
28 %struct.VecPNode = type { i32, i32, %struct.PNode**, [3 x %struct.PNode*] }
29 %struct.VecSNode = type { i32, i32, %struct.SNode**, [3 x %struct.SNode*] }
30 %struct.VecZNode = type { i32, i32, %struct.ZNode**, [3 x %struct.ZNode*] }
31 %struct.ZNode = type { %struct.PNode*, %struct.VecSNode }
32 %struct.d_loc_t = type { i8*, i8*, i32, i32, i32 }
33
34 declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
35
36 define fastcc i32 @exhaustive_parse(%struct.Parser* %p, i32 %state) nounwind {
37 entry:
38 store i8* undef, i8** undef, align 4
39 %0 = getelementptr %struct.Parser* %p, i32 0, i32 0, i32 6 ; <%struct.d_loc_t*> [#uses=1]
40 %1 = bitcast %struct.d_loc_t* %0 to i8* ; [#uses=1]
41 call void @llvm.memcpy.i32(i8* undef, i8* %1, i32 20, i32 4)
42 br label %bb10
43
44 bb10: ; preds = %bb30, %bb29, %bb26, %entry
45 br i1 undef, label %bb18, label %bb20
46
47 bb18: ; preds = %bb10
48 br i1 undef, label %bb20, label %bb19
49
50 bb19: ; preds = %bb18
51 br label %bb20
52
53 bb20: ; preds = %bb19, %bb18, %bb10
54 br i1 undef, label %bb21, label %bb22
55
56 bb21: ; preds = %bb20
57 unreachable
58
59 bb22: ; preds = %bb20
60 br i1 undef, label %bb24, label %bb26
61
62 bb24: ; preds = %bb22
63 unreachable
64
65 bb26: ; preds = %bb22
66 br i1 undef, label %bb10, label %bb29
67
68 bb29: ; preds = %bb26
69 br i1 undef, label %bb10, label %bb30
70
71 bb30: ; preds = %bb29
72 br i1 undef, label %bb31, label %bb10
73
74 bb31: ; preds = %bb30
75 unreachable
76 }
0 ; RUN: llc < %s -mtriple=arm-apple-darwin9 -march=arm | FileCheck %s
1
2 ; CHECK: L_LSDA_0:
3
14
25 %struct.A = type { i32* }
36
47 define void @"\01-[MyFunction Name:]"() {
58 entry:
6 %save_filt.1 = alloca i32 ; [#uses=2]
7 %save_eptr.0 = alloca i8* ; [#uses=2]
8 %a = alloca %struct.A ; <%struct.A*> [#uses=3]
9 %eh_exception = alloca i8* ; [#uses=5]
10 %eh_selector = alloca i32 ; [#uses=3]
11 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
12 call void @_ZN1AC1Ev(%struct.A* %a)
13 invoke void @_Z3barv()
9 %save_filt.1 = alloca i32
10 %save_eptr.0 = alloca i8*
11 %a = alloca %struct.A
12 %eh_exception = alloca i8*
13 %eh_selector = alloca i32
14 %"alloca point" = bitcast i32 0 to i32
15 call void @_ZN1AC1Ev(%struct.A* %a)
16 invoke void @_Z3barv()
1417 to label %invcont unwind label %lpad
1518
1619 invcont: ; preds = %entry
17 call void @_ZN1AD1Ev(%struct.A* %a) nounwind
20 call void @_ZN1AD1Ev(%struct.A* %a) nounwind
1821 br label %return
1922
2023 bb: ; preds = %ppad
21 %eh_select = load i32* %eh_selector ; [#uses=1]
24 %eh_select = load i32* %eh_selector
2225 store i32 %eh_select, i32* %save_filt.1, align 4
23 %eh_value = load i8** %eh_exception ; [#uses=1]
26 %eh_value = load i8** %eh_exception
2427 store i8* %eh_value, i8** %save_eptr.0, align 4
25 call void @_ZN1AD1Ev(%struct.A* %a) nounwind
26 %0 = load i8** %save_eptr.0, align 4 ; [#uses=1]
28 call void @_ZN1AD1Ev(%struct.A* %a) nounwind
29 %0 = load i8** %save_eptr.0, align 4
2730 store i8* %0, i8** %eh_exception, align 4
28 %1 = load i32* %save_filt.1, align 4 ; [#uses=1]
31 %1 = load i32* %save_filt.1, align 4
2932 store i32 %1, i32* %eh_selector, align 4
3033 br label %Unwind
3134
3336 ret void
3437
3538 lpad: ; preds = %entry
36 %eh_ptr = call i8* @llvm.eh.exception() ; [#uses=1]
39 %eh_ptr = call i8* @llvm.eh.exception()
3740 store i8* %eh_ptr, i8** %eh_exception
38 %eh_ptr1 = load i8** %eh_exception ; [#uses=1]
39 %eh_select2 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr1, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i32 0) ; [#uses=1]
41 %eh_ptr1 = load i8** %eh_exception
42 %eh_select2 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr1, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i32 0)
4043 store i32 %eh_select2, i32* %eh_selector
4144 br label %ppad
4245
4447 br label %bb
4548
4649 Unwind: ; preds = %bb
47 %eh_ptr3 = load i8** %eh_exception ; [#uses=1]
48 call void @_Unwind_SjLj_Resume(i8* %eh_ptr3)
50 %eh_ptr3 = load i8** %eh_exception
51 call void @_Unwind_SjLj_Resume(i8* %eh_ptr3)
4952 unreachable
5053 }
5154
5255 define linkonce_odr void @_ZN1AC1Ev(%struct.A* %this) {
5356 entry:
54 %this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2]
55 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
57 %this_addr = alloca %struct.A*
58 %"alloca point" = bitcast i32 0 to i32
5659 store %struct.A* %this, %struct.A** %this_addr
57 %0 = call i8* @_Znwm(i32 4) ; [#uses=1]
58 %1 = bitcast i8* %0 to i32* ; [#uses=1]
59 %2 = load %struct.A** %this_addr, align 4 ; <%struct.A*> [#uses=1]
60 %3 = getelementptr inbounds %struct.A* %2, i32 0, i32 0 ; [#uses=1]
60 %0 = call i8* @_Znwm(i32 4)
61 %1 = bitcast i8* %0 to i32*
62 %2 = load %struct.A** %this_addr, align 4
63 %3 = getelementptr inbounds %struct.A* %2, i32 0, i32 0
6164 store i32* %1, i32** %3, align 4
6265 br label %return
6366
6972
7073 define linkonce_odr void @_ZN1AD1Ev(%struct.A* %this) nounwind {
7174 entry:
72 %this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2]
73 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
75 %this_addr = alloca %struct.A*
76 %"alloca point" = bitcast i32 0 to i32
7477 store %struct.A* %this, %struct.A** %this_addr
75 %0 = load %struct.A** %this_addr, align 4 ; <%struct.A*> [#uses=1]
76 %1 = getelementptr inbounds %struct.A* %0, i32 0, i32 0 ; [#uses=1]
77 %2 = load i32** %1, align 4 ; [#uses=1]
78 %3 = bitcast i32* %2 to i8* ; [#uses=1]
79 call void @_ZdlPv(i8* %3) nounwind
78 %0 = load %struct.A** %this_addr, align 4
79 %1 = getelementptr inbounds %struct.A* %0, i32 0, i32 0
80 %2 = load i32** %1, align 4
81 %3 = bitcast i32* %2 to i8*
82 call void @_ZdlPv(i8* %3) nounwind
8083 br label %bb
8184
8285 bb: ; preds = %entry
8588 return: ; preds = %bb
8689 ret void
8790 }
88 ;CHECK: L_LSDA_0:
8991
9092 declare void @_ZdlPv(i8*) nounwind
9193
9294 declare void @_Z3barv()
9395
94 declare i8* @llvm.eh.exception() nounwind
96 declare i8* @llvm.eh.exception() nounwind readonly
9597
96 declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind
98 declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind
9799
98 declare i32 @llvm.eh.typeid.for.i32(i8*) nounwind
100 declare i32 @llvm.eh.typeid.for(i8*) nounwind
99101
100102 declare i32 @__gxx_personality_sj0(...)
101103
0 ; RUN: llc < %s -march=arm
11
2 %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
3 %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
2 %struct.comment = type { i8**, i32*, i32, i8* }
3 %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
4 %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
5
6 @str215 = external global [2 x i8]
47
58 define void @t1(%struct.state* %v) {
6 %tmp6 = load i32* null
7 %tmp8 = alloca float, i32 %tmp6
8 store i32 1, i32* null
9 br i1 false, label %bb123.preheader, label %return
9 %tmp6 = load i32* null
10 %tmp8 = alloca float, i32 %tmp6
11 store i32 1, i32* null
12 br i1 false, label %bb123.preheader, label %return
1013
11 bb123.preheader:
12 br i1 false, label %bb43, label %return
14 bb123.preheader: ; preds = %0
15 br i1 false, label %bb43, label %return
1316
14 bb43:
15 call fastcc void @f1( float* %tmp8, float* null, i32 0 )
16 %tmp70 = load i32* null
17 %tmp85 = getelementptr float* %tmp8, i32 0
18 call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 )
19 ret void
17 bb43: ; preds = %bb123.preheader
18 call fastcc void @f1(float* %tmp8, float* null, i32 0)
19 %tmp70 = load i32* null
20 %tmp85 = getelementptr float* %tmp8, i32 0
21 call fastcc void @f2(float* null, float* null, float* %tmp85, i32 %tmp70)
22 ret void
2023
21 return:
22 ret void
24 return: ; preds = %bb123.preheader, %0
25 ret void
2326 }
2427
2528 declare fastcc void @f1(float*, float*, i32)
2629
2730 declare fastcc void @f2(float*, float*, float*, i32)
2831
29 %struct.comment = type { i8**, i32*, i32, i8* }
30 @str215 = external global [2 x i8]
31
3232 define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
33 %tmp1 = call i32 @strlen( i8* %tag )
34 %tmp3 = call i32 @strlen( i8* %contents )
35 %tmp4 = add i32 %tmp1, 2
36 %tmp5 = add i32 %tmp4, %tmp3
37 %tmp6 = alloca i8, i32 %tmp5
38 %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag )
39 %tmp6.len = call i32 @strlen( i8* %tmp6 )
40 %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
41 call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 )
42 %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents )
43 call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 )
44 ret void
33 %tmp1 = call i32 @strlen(i8* %tag)
34 %tmp3 = call i32 @strlen(i8* %contents)
35 %tmp4 = add i32 %tmp1, 2
36 %tmp5 = add i32 %tmp4, %tmp3
37 %tmp6 = alloca i8, i32 %tmp5
38 %tmp9 = call i8* @strcpy(i8* %tmp6, i8* %tag)
39 %tmp6.len = call i32 @strlen(i8* %tmp6)
40 %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
41 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp6.indexed, i8* getelementptr inbounds ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1, i1 false)
42 %tmp15 = call i8* @strcat(i8* %tmp6, i8* %contents)
43 call fastcc void @comment_add(%struct.comment* %vc, i8* %tmp6)
44 ret void
4545 }
4646
4747 declare i32 @strlen(i8*)
5050
5151 declare fastcc void @comment_add(%struct.comment*, i8*)
5252
53 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
53 declare i8* @strcpy(i8*, i8*)
5454
55 declare i8* @strcpy(i8*, i8*)
55 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
55 ; CHECK: ldrb
66
77 %struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
8
89 @src = external global %struct.x
910 @dst = external global %struct.x
1011
1112 define i32 @t() {
1213 entry:
13 call void @llvm.memcpy.i32( i8* getelementptr (%struct.x* @dst, i32 0, i32 0), i8* getelementptr (%struct.x* @src, i32 0, i32 0), i32 11, i32 8 )
14 ret i32 0
14 call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.x* @dst, i32 0, i32 0), i8* getelementptr inbounds (%struct.x* @src, i32 0, i32 0), i32 11, i32 8, i1 false)
15 ret i32 0
1516 }
1617
17 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
18 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
88
99 ; CHECK: memmove
1010 ; EABI: __aeabi_memmove
11 call void @llvm.memmove.i32( i8* bitcast ([500 x i32]* @from to i8*), i8* bitcast ([500 x i32]* @to to i8*), i32 500, i32 0 )
11 call void @llvm.memmove.p0i8.p0i8.i32(i8* bitcast ([500 x i32]* @from to i8*), i8* bitcast ([500 x i32]* @to to i8*), i32 500, i32 0, i1 false)
1212
1313 ; CHECK: memcpy
1414 ; EABI: __aeabi_memcpy
15 call void @llvm.memcpy.i32( i8* bitcast ([500 x i32]* @from to i8*), i8* bitcast ([500 x i32]* @to to i8*), i32 500, i32 0 )
15 call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([500 x i32]* @from to i8*), i8* bitcast ([500 x i32]* @to to i8*), i32 500, i32 0, i1 false)
1616
1717 ; EABI memset swaps arguments
1818 ; CHECK: mov r1, #0
1919 ; CHECK: memset
2020 ; EABI: mov r2, #0
2121 ; EABI: __aeabi_memset
22 call void @llvm.memset.i32( i8* bitcast ([500 x i32]* @from to i8*), i8 0, i32 500, i32 0 )
22 call void @llvm.memset.p0i8.i32(i8* bitcast ([500 x i32]* @from to i8*), i8 0, i32 500, i32 0, i1 false)
2323 unreachable
2424 }
2525
26 declare void @llvm.memmove.i32(i8*, i8*, i32, i32)
27
28 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
29
30 declare void @llvm.memset.i32(i8*, i8, i32, i32)
31
26 declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
27 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
28 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
+0
-11
test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll less more
None ; RUN: llc < %s
1 ; Test that llvm.memcpy works with a i64 length operand on all targets.
2
3 declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
4
5 define void @l12_l94_bc_divide_endif_2E_3_2E_ce() {
6 newFuncRoot:
7 tail call void @llvm.memcpy.i64( i8* null, i8* null, i64 0, i32 1 )
8 unreachable
9 }
10
+0
-157
test/CodeGen/Generic/2007-11-21-UndeadIllegalNode.ll less more
None ; RUN: llc < %s -o -
1
2 %struct.RETURN = type { i32, i32 }
3 %struct.ada__finalization__controlled = type { %struct.system__finalization_root__root_controlled }
4 %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* }
5 %struct.ada__strings__unbounded__string_access = type { i8*, %struct.RETURN* }
6 %struct.ada__strings__unbounded__unbounded_string = type { %struct.ada__finalization__controlled, %struct.ada__strings__unbounded__string_access, i32 }
7 %struct.ada__tags__dispatch_table = type { [1 x i32] }
8 %struct.exception = type { i8, i8, i32, i8*, i8*, i32, i8* }
9 %struct.system__finalization_root__root_controlled = type { %struct.ada__streams__root_stream_type, %struct.system__finalization_root__root_controlled*, %struct.system__finalization_root__root_controlled* }
10 %struct.system__standard_library__exception_data = type { i8, i8, i32, i32, %struct.system__standard_library__exception_data*, i32, void ()* }
11 @C.495.7639 = internal constant %struct.RETURN { i32 1, i32 16 } ; <%struct.RETURN*> [#uses=1]
12 @ada__strings__index_error = external global %struct.exception ; <%struct.exception*> [#uses=1]
13 @.str5 = internal constant [16 x i8] c"a-strunb.adb:690" ; <[16 x i8]*> [#uses=1]
14
15 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
16
17 declare void @ada__strings__unbounded__realloc_for_chunk(%struct.ada__strings__unbounded__unbounded_string*, i32)
18
19 declare void @__gnat_raise_exception(%struct.system__standard_library__exception_data*, i64)
20
21 define void @ada__strings__unbounded__insert__2(%struct.ada__strings__unbounded__unbounded_string* %source, i32 %before, i64 %new_item.0.0) {
22 entry:
23 %tmp24636 = lshr i64 %new_item.0.0, 32 ; [#uses=1]
24 %tmp24637 = trunc i64 %tmp24636 to i32 ; [#uses=1]
25 %tmp24638 = inttoptr i32 %tmp24637 to %struct.RETURN* ; <%struct.RETURN*> [#uses=2]
26 %tmp25 = getelementptr %struct.RETURN* %tmp24638, i32 0, i32 0 ; [#uses=1]
27 %tmp26 = load i32* %tmp25, align 4 ; [#uses=1]
28 %tmp29 = getelementptr %struct.RETURN* %tmp24638, i32 0, i32 1 ; [#uses=1]
29 %tmp30 = load i32* %tmp29, align 4 ; [#uses=1]
30 %tmp63 = getelementptr %struct.ada__strings__unbounded__unbounded_string* %source, i32 0, i32 1, i32 1 ; <%struct.RETURN**> [#uses=5]
31 %tmp64 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
32 %tmp65 = getelementptr %struct.RETURN* %tmp64, i32 0, i32 0 ; [#uses=1]
33 %tmp66 = load i32* %tmp65, align 4 ; [#uses=1]
34 %tmp67 = icmp sgt i32 %tmp66, %before ; [#uses=1]
35 br i1 %tmp67, label %bb77, label %bb
36
37 bb: ; preds = %entry
38 %tmp71 = getelementptr %struct.ada__strings__unbounded__unbounded_string* %source, i32 0, i32 2 ; [#uses=4]
39 %tmp72 = load i32* %tmp71, align 4 ; [#uses=1]
40 %tmp73 = add i32 %tmp72, 1 ; [#uses=1]
41 %tmp74 = icmp slt i32 %tmp73, %before ; [#uses=1]
42 br i1 %tmp74, label %bb77, label %bb84
43
44 bb77: ; preds = %bb, %entry
45 tail call void @__gnat_raise_exception( %struct.system__standard_library__exception_data* bitcast (%struct.exception* @ada__strings__index_error to %struct.system__standard_library__exception_data*), i64 or (i64 zext (i32 ptrtoint ([16 x i8]* @.str5 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.RETURN* @C.495.7639 to i32) to i64), i64 32)) )
46 unreachable
47
48 bb84: ; preds = %bb
49 %tmp93 = sub i32 %tmp30, %tmp26 ; [#uses=2]
50 %tmp9394 = sext i32 %tmp93 to i36 ; [#uses=1]
51 %tmp95 = shl i36 %tmp9394, 3 ; [#uses=1]
52 %tmp96 = add i36 %tmp95, 8 ; [#uses=2]
53 %tmp97 = icmp sgt i36 %tmp96, -1 ; [#uses=1]
54 %tmp100 = select i1 %tmp97, i36 %tmp96, i36 0 ; [#uses=2]
55 %tmp101 = icmp slt i36 %tmp100, 17179869177 ; [#uses=1]
56 %tmp100.cast = trunc i36 %tmp100 to i32 ; [#uses=1]
57 %min102 = select i1 %tmp101, i32 %tmp100.cast, i32 -8 ; [#uses=1]
58 tail call void @ada__strings__unbounded__realloc_for_chunk( %struct.ada__strings__unbounded__unbounded_string* %source, i32 %min102 )
59 %tmp148 = load i32* %tmp71, align 4 ; [#uses=4]
60 %tmp152 = add i32 %tmp93, 1 ; [#uses=2]
61 %tmp153 = icmp sgt i32 %tmp152, -1 ; [#uses=1]
62 %max154 = select i1 %tmp153, i32 %tmp152, i32 0 ; [#uses=5]
63 %tmp155 = add i32 %tmp148, %max154 ; [#uses=5]
64 %tmp315 = getelementptr %struct.ada__strings__unbounded__unbounded_string* %source, i32 0, i32 1, i32 0 ; [#uses=4]
65 %tmp328 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
66 %tmp329 = getelementptr %struct.RETURN* %tmp328, i32 0, i32 0 ; [#uses=1]
67 %tmp330 = load i32* %tmp329, align 4 ; [#uses=4]
68 %tmp324 = add i32 %max154, %before ; [#uses=3]
69 %tmp331 = sub i32 %tmp324, %tmp330 ; [#uses=1]
70 %tmp349 = sub i32 %before, %tmp330 ; [#uses=1]
71 %tmp356 = icmp sgt i32 %tmp331, %tmp349 ; [#uses=1]
72 %tmp431 = icmp sgt i32 %tmp324, %tmp155 ; [#uses=2]
73 br i1 %tmp356, label %bb420, label %bb359
74
75 bb359: ; preds = %bb84
76 br i1 %tmp431, label %bb481, label %bb382
77
78 bb382: ; preds = %bb382, %bb359
79 %indvar = phi i32 [ 0, %bb359 ], [ %indvar.next, %bb382 ] ; [#uses=2]
80 %max379.pn = phi i32 [ %max154, %bb359 ], [ %L492b.0, %bb382 ] ; [#uses=1]
81 %before.pn = phi i32 [ %before, %bb359 ], [ 1, %bb382 ] ; [#uses=1]
82 %L492b.0 = add i32 %before.pn, %max379.pn ; [#uses=3]
83 %tmp386 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
84 %tmp387 = getelementptr %struct.RETURN* %tmp386, i32 0, i32 0 ; [#uses=1]
85 %tmp388 = load i32* %tmp387, align 4 ; [#uses=2]
86 %tmp392 = load i8** %tmp315, align 4 ; [#uses=2]
87 %R493b.0 = add i32 %indvar, %before ; [#uses=1]
88 %tmp405 = sub i32 %R493b.0, %tmp388 ; [#uses=1]
89 %tmp406 = getelementptr i8* %tmp392, i32 %tmp405 ; [#uses=1]
90 %tmp407 = load i8* %tmp406, align 1 ; [#uses=1]
91 %tmp408 = sub i32 %L492b.0, %tmp388 ; [#uses=1]
92 %tmp409 = getelementptr i8* %tmp392, i32 %tmp408 ; [#uses=1]
93 store i8 %tmp407, i8* %tmp409, align 1
94 %tmp414 = icmp eq i32 %L492b.0, %tmp155 ; [#uses=1]
95 %indvar.next = add i32 %indvar, 1 ; [#uses=1]
96 br i1 %tmp414, label %bb481, label %bb382
97
98 bb420: ; preds = %bb84
99 br i1 %tmp431, label %bb481, label %bb436.preheader
100
101 bb436.preheader: ; preds = %bb420
102 %tmp4468 = load i8** %tmp315, align 4 ; [#uses=2]
103 %tmp4599 = sub i32 %tmp148, %tmp330 ; [#uses=1]
104 %tmp46010 = getelementptr i8* %tmp4468, i32 %tmp4599 ; [#uses=1]
105 %tmp46111 = load i8* %tmp46010, align 1 ; [#uses=1]
106 %tmp46212 = sub i32 %tmp155, %tmp330 ; [#uses=1]
107 %tmp46313 = getelementptr i8* %tmp4468, i32 %tmp46212 ; [#uses=1]
108 store i8 %tmp46111, i8* %tmp46313, align 1
109 %exitcond14 = icmp eq i32 %tmp155, %tmp324 ; [#uses=1]
110 br i1 %exitcond14, label %bb481, label %bb.nph
111
112 bb.nph: ; preds = %bb436.preheader
113 %tmp5 = sub i32 %tmp148, %before ; [#uses=1]
114 br label %bb478
115
116 bb478: ; preds = %bb478, %bb.nph
117 %indvar6422 = phi i32 [ 0, %bb.nph ], [ %indvar.next643, %bb478 ] ; [#uses=1]
118 %indvar.next643 = add i32 %indvar6422, 1 ; [#uses=4]
119 %L490b.0 = sub i32 %tmp155, %indvar.next643 ; [#uses=1]
120 %R491b.0 = sub i32 %tmp148, %indvar.next643 ; [#uses=1]
121 %tmp440 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
122 %tmp441 = getelementptr %struct.RETURN* %tmp440, i32 0, i32 0 ; [#uses=1]
123 %tmp442 = load i32* %tmp441, align 4 ; [#uses=2]
124 %tmp446 = load i8** %tmp315, align 4 ; [#uses=2]
125 %tmp459 = sub i32 %R491b.0, %tmp442 ; [#uses=1]
126 %tmp460 = getelementptr i8* %tmp446, i32 %tmp459 ; [#uses=1]
127 %tmp461 = load i8* %tmp460, align 1 ; [#uses=1]
128 %tmp462 = sub i32 %L490b.0, %tmp442 ; [#uses=1]
129 %tmp463 = getelementptr i8* %tmp446, i32 %tmp462 ; [#uses=1]
130 store i8 %tmp461, i8* %tmp463, align 1
131 %exitcond = icmp eq i32 %indvar.next643, %tmp5 ; [#uses=1]
132 br i1 %exitcond, label %bb481, label %bb478
133
134 bb481: ; preds = %bb478, %bb436.preheader, %bb420, %bb382, %bb359
135 %tmp577 = add i32 %before, -1 ; [#uses=3]
136 %tmp578 = add i32 %max154, %tmp577 ; [#uses=2]
137 %tmp581 = icmp sge i32 %tmp578, %tmp577 ; [#uses=1]
138 %max582 = select i1 %tmp581, i32 %tmp578, i32 %tmp577 ; [#uses=1]
139 %tmp584 = sub i32 %max582, %before ; [#uses=1]
140 %tmp585 = add i32 %tmp584, 1 ; [#uses=2]
141 %tmp586 = icmp sgt i32 %tmp585, -1 ; [#uses=1]
142 %max587 = select i1 %tmp586, i32 %tmp585, i32 0 ; [#uses=1]
143 %tmp591 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
144 %tmp592 = getelementptr %struct.RETURN* %tmp591, i32 0, i32 0 ; [#uses=1]
145 %tmp593 = load i32* %tmp592, align 4 ; [#uses=1]
146 %tmp597 = load i8** %tmp315, align 4 ; [#uses=1]
147 %tmp600621 = trunc i64 %new_item.0.0 to i32 ; [#uses=1]
148 %tmp600622 = inttoptr i32 %tmp600621 to i8* ; [#uses=1]
149 %tmp601 = sub i32 %before, %tmp593 ; [#uses=1]
150 %tmp602 = getelementptr i8* %tmp597, i32 %tmp601 ; [#uses=1]
151 tail call void @llvm.memcpy.i32( i8* %tmp602, i8* %tmp600622, i32 %max587, i32 1 )
152 %tmp606 = load i32* %tmp71, align 4 ; [#uses=1]
153 %tmp613 = add i32 %tmp606, %max154 ; [#uses=1]
154 store i32 %tmp613, i32* %tmp71, align 4
155 ret void
156 }
33 ; greater than the alignment guaranteed for Qux or C.0.1173), but it
44 ; should compile, not crash the code generator.
55
6 @C.0.1173 = external constant [33 x i8] ; <[33 x i8]*> [#uses=1]
6 @C.0.1173 = external constant [33 x i8]
77
88 define void @Bork() {
99 entry:
10 %Qux = alloca [33 x i8] ; <[33 x i8]*> [#uses=1]
11 %Qux1 = bitcast [33 x i8]* %Qux to i8* ; [#uses=1]
12 call void @llvm.memcpy.i64( i8* %Qux1, i8* getelementptr ([33 x i8]* @C.0.1173, i32 0, i32 0), i64 33, i32 8 )
13 ret void
10 %Qux = alloca [33 x i8]
11 %Qux1 = bitcast [33 x i8]* %Qux to i8*
12 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %Qux1, i8* getelementptr inbounds ([33 x i8]* @C.0.1173, i32 0, i32 0), i64 33, i32 8, i1 false)
13 ret void
1414 }
1515
16 declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
17
18
16 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
+0
-14
test/CodeGen/PowerPC/2008-10-30-IllegalShift.ll less more
None ; RUN: llc < %s -march=ppc32
1 ; PR2986
2 @argc = external global i32 ; [#uses=1]
3 @buffer = external global [32 x i8], align 4 ; <[32 x i8]*> [#uses=1]
4
5 define void @test1() nounwind noinline {
6 entry:
7 %0 = load i32* @argc, align 4 ; [#uses=1]
8 %1 = trunc i32 %0 to i8 ; [#uses=1]
9 tail call void @llvm.memset.i32(i8* getelementptr ([32 x i8]* @buffer, i32 0, i32 0), i8 %1, i32 17, i32 4)
10 unreachable
11 }
12
13 declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
+0
-155
test/CodeGen/PowerPC/2009-11-15-ReMatBug.ll less more
None ; RUN: llc < %s -mtriple=powerpc-apple-darwin8
1
2 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
3 %struct.__gcov_var = type { %struct.FILE*, i32, i32, i32, i32, i32, i32, [1025 x i32] }
4 %struct.__sFILEX = type opaque
5 %struct.__sbuf = type { i8*, i32 }
6 %struct.gcov_ctr_info = type { i32, i64*, void (i64*, i32)* }
7 %struct.gcov_ctr_summary = type { i32, i32, i64, i64, i64 }
8 %struct.gcov_fn_info = type { i32, i32, [0 x i32] }
9 %struct.gcov_info = type { i32, %struct.gcov_info*, i32, i8*, i32, %struct.gcov_fn_info*, i32, [0 x %struct.gcov_ctr_info] }
10 %struct.gcov_summary = type { i32, [1 x %struct.gcov_ctr_summary] }
11
12 @__gcov_var = external global %struct.__gcov_var ; <%struct.__gcov_var*> [#uses=1]
13 @__sF = external global [0 x %struct.FILE] ; <[0 x %struct.FILE]*> [#uses=1]
14 @.str = external constant [56 x i8], align 4 ; <[56 x i8]*> [#uses=1]
15 @gcov_list = external global %struct.gcov_info* ; <%struct.gcov_info**> [#uses=1]
16 @.str7 = external constant [35 x i8], align 4 ; <[35 x i8]*> [#uses=1]
17 @.str8 = external constant [9 x i8], align 4 ; <[9 x i8]*> [#uses=1]
18 @.str9 = external constant [10 x i8], align 4 ; <[10 x i8]*> [#uses=1]
19 @.str10 = external constant [36 x i8], align 4 ; <[36 x i8]*> [#uses=1]
20
21 declare i32 @"\01_fprintf$LDBL128"(%struct.FILE*, i8*, ...) nounwind
22
23 define void @gcov_exit() nounwind {
24 entry:
25 %gi_ptr.0357 = load %struct.gcov_info** @gcov_list, align 4 ; <%struct.gcov_info*> [#uses=1]
26 %0 = alloca i8, i32 undef, align 1 ; [#uses=3]
27 br i1 undef, label %return, label %bb.nph341
28
29 bb.nph341: ; preds = %entry
30 %object27 = bitcast %struct.gcov_summary* undef to i8* ; [#uses=1]
31 br label %bb25
32
33 bb25: ; preds = %read_fatal, %bb.nph341
34 %gi_ptr.1329 = phi %struct.gcov_info* [ %gi_ptr.0357, %bb.nph341 ], [ undef, %read_fatal ] ; <%struct.gcov_info*> [#uses=1]
35 call void @llvm.memset.i32(i8* %object27, i8 0, i32 36, i32 8)
36 br i1 undef, label %bb49.1, label %bb48
37
38 bb48: ; preds = %bb25
39 br label %bb49.1
40
41 bb51: ; preds = %bb48.4, %bb49.3
42 switch i32 undef, label %bb58 [
43 i32 0, label %rewrite
44 i32 1734567009, label %bb59
45 ]
46
47 bb58: ; preds = %bb51
48 %1 = call i32 (%struct.FILE*, i8*, ...)* @"\01_fprintf$LDBL128"(%struct.FILE* getelementptr inbounds ([0 x %struct.FILE]* @__sF, i32 0, i32 2), i8* getelementptr inbounds ([35 x i8]* @.str7, i32 0, i32 0), i8* %0) nounwind ; [#uses=0]
49 br label %read_fatal
50
51 bb59: ; preds = %bb51
52 br i1 undef, label %bb60, label %bb3.i156
53
54 bb3.i156: ; preds = %bb59
55 store i8 52, i8* undef, align 1
56 store i8 42, i8* undef, align 1
57 %2 = call i32 (%struct.FILE*, i8*, ...)* @"\01_fprintf$LDBL128"(%struct.FILE* getelementptr inbounds ([0 x %struct.FILE]* @__sF, i32 0, i32 2), i8* getelementptr inbounds ([56 x i8]* @.str, i32 0, i32 0), i8* %0, i8* undef, i8* undef) nounwind ; [#uses=0]
58 br label %read_fatal
59
60 bb60: ; preds = %bb59
61 br i1 undef, label %bb78.preheader, label %rewrite
62
63 bb78.preheader: ; preds = %bb60
64 br i1 undef, label %bb62, label %bb80
65
66 bb62: ; preds = %bb78.preheader
67 br i1 undef, label %bb64, label %read_mismatch
68
69 bb64: ; preds = %bb62
70 br i1 undef, label %bb65, label %read_mismatch
71
72 bb65: ; preds = %bb64
73 br i1 undef, label %bb75, label %read_mismatch
74
75 read_mismatch: ; preds = %bb98, %bb119.preheader, %bb72, %bb71, %bb65, %bb64, %bb62
76 %3 = icmp eq i32 undef, -1 ; [#uses=1]
77 %iftmp.11.0 = select i1 %3, i8* getelementptr inbounds ([10 x i8]* @.str9, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8]* @.str8, i32 0, i32 0) ; [#uses=1]
78 %4 = call i32 (%struct.FILE*, i8*, ...)* @"\01_fprintf$LDBL128"(%struct.FILE* getelementptr inbounds ([0 x %struct.FILE]* @__sF, i32 0, i32 2), i8* getelementptr inbounds ([36 x i8]* @.str10, i32 0, i32 0), i8* %0, i8* %iftmp.11.0) nounwind ; [#uses=0]
79 br label %read_fatal
80
81 bb71: ; preds = %bb75
82 %5 = load i32* undef, align 4 ; [#uses=1]
83 %6 = getelementptr inbounds %struct.gcov_info* %gi_ptr.1329, i32 0, i32 7, i32 undef, i32 2 ; [#uses=1]
84 %7 = load void (i64*, i32)** %6, align 4 ; [#uses=1]
85 %8 = call i32 @__gcov_read_unsigned() nounwind ; [#uses=1]
86 %9 = call i32 @__gcov_read_unsigned() nounwind ; [#uses=1]
87 %10 = icmp eq i32 %tmp386, %8 ; [#uses=1]
88 br i1 %10, label %bb72, label %read_mismatch
89
90 bb72: ; preds = %bb71
91 %11 = icmp eq i32 undef, %9 ; [#uses=1]
92 br i1 %11, label %bb73, label %read_mismatch
93
94 bb73: ; preds = %bb72
95 call void %7(i64* null, i32 %5) nounwind
96 unreachable
97
98 bb74: ; preds = %bb75
99 %12 = add i32 %13, 1 ; [#uses=1]
100 br label %bb75
101
102 bb75: ; preds = %bb74, %bb65
103 %13 = phi i32 [ %12, %bb74 ], [ 0, %bb65 ] ; [#uses=2]
104 %tmp386 = add i32 0, 27328512 ; [#uses=1]
105 %14 = shl i32 1, %13 ; [#uses=1]
106 %15 = load i32* undef, align 4 ; [#uses=1]
107 %16 = and i32 %15, %14 ; [#uses=1]
108 %17 = icmp eq i32 %16, 0 ; [#uses=1]
109 br i1 %17, label %bb74, label %bb71
110
111 bb80: ; preds = %bb78.preheader
112 unreachable
113
114 read_fatal: ; preds = %read_mismatch, %bb3.i156, %bb58
115 br i1 undef, label %return, label %bb25
116
117 rewrite: ; preds = %bb60, %bb51
118 store i32 -1, i32* getelementptr inbounds (%struct.__gcov_var* @__gcov_var, i32 0, i32 6), align 4
119 br i1 undef, label %bb94, label %bb119.preheader
120
121 bb94: ; preds = %rewrite
122 unreachable
123
124 bb119.preheader: ; preds = %rewrite
125 br i1 undef, label %read_mismatch, label %bb98
126
127 bb98: ; preds = %bb119.preheader
128 br label %read_mismatch
129
130 return: ; preds = %read_fatal, %entry
131 ret void
132
133 bb49.1: ; preds = %bb48, %bb25
134 br i1 undef, label %bb49.2, label %bb48.2
135
136 bb49.2: ; preds = %bb48.2, %bb49.1
137 br i1 undef, label %bb49.3, label %bb48.3
138
139 bb48.2: ; preds = %bb49.1
140 br label %bb49.2
141
142 bb49.3: ; preds = %bb48.3, %bb49.2
143 br i1 undef, label %bb51, label %bb48.4
144
145 bb48.3: ; preds = %bb49.2
146 br label %bb49.3
147
148 bb48.4: ; preds = %bb49.3
149 br label %bb51
150 }
151
152 declare i32 @__gcov_read_unsigned() nounwind
153
154 declare void @llvm.memset.i32(i8* nocapture, i8, i32, i32) nounwind
0 ; RUN: llc < %s -march=ppc32 | grep lwarx | count 3
11 ; RUN: llc < %s -march=ppc32 | grep stwcx. | count 4
22
3 define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind {
4 %tmp = call i32 @llvm.atomic.load.add.i32( i32* %mem, i32 %val )
5 ret i32 %tmp
3 define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind {
4 %tmp = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %mem, i32 %val)
5 ret i32 %tmp
66 }
77
8 define i32 @exchange_and_cmp(i32* %mem) nounwind {
9 %tmp = call i32 @llvm.atomic.cmp.swap.i32( i32* %mem, i32 0, i32 1 )
10 ret i32 %tmp
8 define i32 @exchange_and_cmp(i32* %mem) nounwind {
9 %tmp = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %mem, i32 0, i32 1)
10 ret i32 %tmp
1111 }
1212
13 define i32 @exchange(i32* %mem, i32 %val) nounwind {
14 %tmp = call i32 @llvm.atomic.swap.i32( i32* %mem, i32 1 )
15 ret i32 %tmp
13 define i32 @exchange(i32* %mem, i32 %val) nounwind {
14 %tmp = call i32 @llvm.atomic.swap.i32.p0i32(i32* %mem, i32 1)
15 ret i32 %tmp
1616 }
1717
18 declare i32 @llvm.atomic.load.add.i32(i32*, i32) nounwind
19 declare i32 @llvm.atomic.cmp.swap.i32(i32*, i32, i32) nounwind
20 declare i32 @llvm.atomic.swap.i32(i32*, i32) nounwind
18 declare i32 @llvm.atomic.load.add.i32.p0i32(i32* nocapture, i32) nounwind
19
20 declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* nocapture, i32, i32) nounwind
21
22 declare i32 @llvm.atomic.swap.i32.p0i32(i32* nocapture, i32) nounwind
0 ; RUN: llc < %s -march=ppc64 | grep ldarx | count 3
11 ; RUN: llc < %s -march=ppc64 | grep stdcx. | count 4
22
3 define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
4 %tmp = call i64 @llvm.atomic.load.add.i64( i64* %mem, i64 %val )
5 ret i64 %tmp
3 define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
4 %tmp = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %mem, i64 %val)
5 ret i64 %tmp
66 }
77
8 define i64 @exchange_and_cmp(i64* %mem) nounwind {
9 %tmp = call i64 @llvm.atomic.cmp.swap.i64( i64* %mem, i64 0, i64 1 )
10 ret i64 %tmp
8 define i64 @exchange_and_cmp(i64* %mem) nounwind {
9 %tmp = call i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* %mem, i64 0, i64 1)
10 ret i64 %tmp
1111 }
1212
13 define i64 @exchange(i64* %mem, i64 %val) nounwind {
14 %tmp = call i64 @llvm.atomic.swap.i64( i64* %mem, i64 1 )
15 ret i64 %tmp
13 define i64 @exchange(i64* %mem, i64 %val) nounwind {
14 %tmp = call i64 @llvm.atomic.swap.i64.p0i64(i64* %mem, i64 1)
15 ret i64 %tmp
1616 }
1717
18 declare i64 @llvm.atomic.load.add.i64(i64*, i64) nounwind
19 declare i64 @llvm.atomic.cmp.swap.i64(i64*, i64, i64) nounwind
20 declare i64 @llvm.atomic.swap.i64(i64*, i64) nounwind
18 declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind
19
20 declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* nocapture, i64, i64) nounwind
21
22 declare i64 @llvm.atomic.swap.i64.p0i64(i64* nocapture, i64) nounwind
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test/CodeGen/PowerPC/invalid-memcpy.ll less more
None ; RUN: llc < %s -march=ppc32
1 ; RUN: llc < %s -march=ppc64
2
3 ; This testcase is invalid (the alignment specified for memcpy is
4 ; greater than the alignment guaranteed for Qux or C.0.1173, but it
5 ; should compile, not crash the code generator.
6
7 @C.0.1173 = external constant [33 x i8] ; <[33 x i8]*> [#uses=1]
8
9 define void @Bork() {
10 entry:
11 %Qux = alloca [33 x i8] ; <[33 x i8]*> [#uses=1]
12 %Qux1 = bitcast [33 x i8]* %Qux to i8* ; [#uses=1]
13 call void @llvm.memcpy.i64( i8* %Qux1, i8* getelementptr ([33 x i8]* @C.0.1173, i32 0, i32 0), i64 33, i32 8 )
14 ret void
15 }
16
17 declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
18
19
5959 %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag )
6060 %tmp6.len = call i32 @strlen( i8* %tmp6 )
6161 %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
62 call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 )
62 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp6.indexed, i8* getelementptr inbounds ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1, i1 false)
6363 %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents )
6464 call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 )
6565 ret void
7171
7272 declare fastcc void @comment_add(%struct.comment*, i8*)
7373
74 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
74 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
7575
7676 declare i8* @strcpy(i8*, i8*)
None ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8
1 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | not grep fcpys
21 ; rdar://7117307
32
1211 br i1 undef, label %bb, label %bb6.preheader
1312
1413 bb6.preheader: ; preds = %entry
15 call void @llvm.memcpy.i32(i8* undef, i8* undef, i32 12, i32 4)
14 call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* undef, i32 12, i32 4, i1 false)
1615 br i1 undef, label %bb15, label %bb13
1716
1817 bb: ; preds = %entry
3029 ret void
3130 }
3231
33 declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
32 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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test/CodeGen/X86/2004-02-12-Memcpy.ll less more
None ; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep movs | count 1
1
2 @A = global [32 x i32] zeroinitializer
3 @B = global [32 x i32] zeroinitializer
4
5 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
6
7 define void @main() nounwind {
8 ; dword copy
9 call void @llvm.memcpy.i32(i8* bitcast ([32 x i32]* @A to i8*),
10 i8* bitcast ([32 x i32]* @B to i8*),
11 i32 128, i32 4 )
12
13 ; word copy
14 call void @llvm.memcpy.i32( i8* bitcast ([32 x i32]* @A to i8*),
15 i8* bitcast ([32 x i32]* @B to i8*),
16 i32 128, i32 2 )
17
18 ; byte copy
19 call void @llvm.memcpy.i32( i8* bitcast ([32 x i32]* @A to i8*),
20 i8* bitcast ([32 x i32]* @B to i8*),
21 i32 128, i32 1 )
22
23 ret void
24 }
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test/CodeGen/X86/2006-11-28-Memcpy.ll less more
None ; PR1022, PR1023
1 ; RUN: llc < %s -march=x86 | grep -- -573785174 | count 2
2 ; RUN: llc < %s -march=x86 | grep -E {movl _?bytes2} | count 1
3
4 @fmt = constant [4 x i8] c"%x\0A\00" ; <[4 x i8]*> [#uses=2]
5 @bytes = constant [4 x i8] c"\AA\BB\CC\DD" ; <[4 x i8]*> [#uses=1]
6 @bytes2 = global [4 x i8] c"\AA\BB\CC\DD" ; <[4 x i8]*> [#uses=1]
7
8 define i32 @test1() nounwind {
9 %y = alloca i32 ; [#uses=2]
10 %c = bitcast i32* %y to i8* ; [#uses=1]
11 %z = getelementptr [4 x i8]* @bytes, i32 0, i32 0 ; [#uses=1]
12 call void @llvm.memcpy.i32( i8* %c, i8* %z, i32 4, i32 1 )
13 %r = load i32* %y ; [#uses=1]
14 %t = bitcast [4 x i8]* @fmt to i8* ; [#uses=1]
15 %tmp = call i32 (i8*, ...)* @printf( i8* %t, i32 %r ) ; [#uses=0]
16 ret i32 0
17 }
18
19 define void @test2() nounwind {
20 %y = alloca i32 ; [#uses=2]
21 %c = bitcast i32* %y to i8* ; [#uses=1]
22 %z = getelementptr [4 x i8]* @bytes2, i32 0, i32 0 ; [#uses=1]
23 call void @llvm.memcpy.i32( i8* %c, i8* %z, i32 4, i32 1 )
24 %r = load i32* %y ; [#uses=1]
25 %t = bitcast [4 x i8]* @fmt to i8* ; [#uses=1]
26 %tmp = call i32 (i8*, ...)* @printf( i8* %t, i32 %r ) ; [#uses=0]
27 ret void
28 }
29
30 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
31
32 declare i32 @printf(i8*, ...)
33
22 ; CHECK: .cfi_personality 0, __gnat_eh_personality
33 ; CHECK: .cfi_lsda 0, .Lexception0
44
5 @error = external global i8 ; [#uses=2]
5 @error = external global i8
66
77 define void @_ada_x() {
88 entry:
9 invoke void @raise( )
10 to label %eh_then unwind label %unwind
9 invoke void @raise()
10 to label %eh_then unwind label %unwind
1111
12 unwind: ; preds = %entry
13 %eh_ptr = tail call i8* @llvm.eh.exception( ) ; [#uses=2]
14 %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i8* @error ) ; [#uses=1]
15 %eh_typeid = tail call i32 @llvm.eh.typeid.for.i32( i8* @error ) ; [#uses=1]
16 %tmp2 = icmp eq i32 %eh_select, %eh_typeid ; [#uses=1]
17 br i1 %tmp2, label %eh_then, label %Unwind
12 unwind: ; preds = %entry
13 %eh_ptr = tail call i8* @llvm.eh.exception()
14 %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i8* @error)
15 %eh_typeid = tail call i32 @llvm.eh.typeid.for(i8* @error)
16 %tmp2 = icmp eq i32 %eh_select, %eh_typeid
17 br i1 %tmp2, label %eh_then, label %Unwind
1818
19 eh_then: ; preds = %unwind, %entry
20 ret void
19 eh_then: ; preds = %unwind, %entry
20 ret void
2121
22 Unwind: ; preds = %unwind
23 tail call i32 (...)* @_Unwind_Resume( i8* %eh_ptr ) ; :0 [#uses=0]
24 unreachable
22 Unwind: ; preds = %unwind
23 %0 = tail call i32 (...)* @_Unwind_Resume(i8* %eh_ptr)
24 unreachable
2525 }
2626
2727 declare void @raise()
2828
29 declare i8* @llvm.eh.exception()
29 declare i8* @llvm.eh.exception() nounwind readonly
3030
31 declare i32 @llvm.eh.selector.i32(i8*, i8*, ...)
31 declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind
3232
33 declare i32 @llvm.eh.typeid.for.i32(i8*)
33 declare i32 @llvm.eh.typeid.for(i8*) nounwind
3434
3535 declare i32 @__gnat_eh_personality(...)
3636
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-129
test/CodeGen/X86/2007-06-05-LSR-Dominator.ll less more
None ; PR1495
1 ; RUN: llc < %s -march=x86
2
3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
4 target triple = "i686-pc-linux-gnu"
5 %struct.AVRational = type { i32, i32 }
6 %struct.FFTComplex = type { float, float }
7 %struct.FFTContext = type { i32, i32, i16*, %struct.FFTComplex*, %struct.FFTComplex*, void (%struct.FFTContext*, %struct.FFTComplex*)*, void (%struct.MDCTContext*, float*, float*, float*)* }
8 %struct.MDCTContext = type { i32, i32, float*, float*, %struct.FFTContext }
9 %struct.Minima = type { i32, i32, i32, i32 }
10 %struct.codebook_t = type { i32, i8*, i32*, i32, float, float, i32, i32, i32*, float*, float* }
11 %struct.floor_class_t = type { i32, i32, i32, i32* }
12 %struct.floor_t = type { i32, i32*, i32, %struct.floor_class_t*, i32, i32, i32, %struct.Minima* }
13 %struct.mapping_t = type { i32, i32*, i32*, i32*, i32, i32*, i32* }
14 %struct.residue_t = type { i32, i32, i32, i32, i32, i32, [8 x i8]*, [2 x float]* }
15 %struct.venc_context_t = type { i32, i32, [2 x i32], [2 x %struct.MDCTContext], [2 x float*], i32, float*, float*, float*, float*, float, i32, %struct.codebook_t*, i32, %struct.floor_t*, i32, %struct.residue_t*, i32, %struct.mapping_t*, i32, %struct.AVRational* }
16
17 define fastcc i32 @put_main_header(%struct.venc_context_t* %venc, i8** %out) {
18 entry:
19 br i1 false, label %bb1820, label %bb288.bb148_crit_edge
20
21 bb288.bb148_crit_edge: ; preds = %entry
22 ret i32 0
23
24 cond_next1712: ; preds = %bb1820.bb1680_crit_edge
25 ret i32 0
26
27 bb1817: ; preds = %bb1820.bb1680_crit_edge
28 br label %bb1820
29
30 bb1820: ; preds = %bb1817, %entry
31 %pb.1.50 = phi i32 [ %tmp1693, %bb1817 ], [ 8, %entry ] ; [#uses=3]
32 br i1 false, label %bb2093, label %bb1820.bb1680_crit_edge
33
34 bb1820.bb1680_crit_edge: ; preds = %bb1820
35 %tmp1693 = add i32 %pb.1.50, 8 ; [#uses=2]
36 %tmp1702 = icmp slt i32 %tmp1693, 0 ; [#uses=1]
37 br i1 %tmp1702, label %cond_next1712, label %bb1817
38
39 bb2093: ; preds = %bb1820
40 %tmp2102 = add i32 %pb.1.50, 65 ; [#uses=0]
41 %tmp2236 = add i32 %pb.1.50, 72 ; [#uses=1]
42 %tmp2237 = sdiv i32 %tmp2236, 8 ; [#uses=2]
43 br i1 false, label %bb2543, label %bb2536.bb2396_crit_edge
44
45 bb2536.bb2396_crit_edge: ; preds = %bb2093
46 ret i32 0
47
48 bb2543: ; preds = %bb2093
49 br i1 false, label %cond_next2576, label %bb2690
50
51 cond_next2576: ; preds = %bb2543
52 ret i32 0
53
54 bb2682: ; preds = %bb2690
55 ret i32 0
56
57 bb2690: ; preds = %bb2543
58 br i1 false, label %bb2682, label %bb2698
59
60 bb2698: ; preds = %bb2690
61 br i1 false, label %cond_next2726, label %bb2831
62
63 cond_next2726: ; preds = %bb2698
64 ret i32 0
65
66 bb2831: ; preds = %bb2698
67 br i1 false, label %cond_next2859, label %bb2964
68
69 cond_next2859: ; preds = %bb2831
70 br i1 false, label %bb2943, label %cond_true2866
71
72 cond_true2866: ; preds = %cond_next2859
73 br i1 false, label %cond_true2874, label %cond_false2897
74
75 cond_true2874: ; preds = %cond_true2866
76 ret i32 0
77
78 cond_false2897: ; preds = %cond_true2866
79 ret i32 0
80
81 bb2943: ; preds = %cond_next2859
82 ret i32 0
83
84 bb2964: ; preds = %bb2831
85 br i1 false, label %cond_next2997, label %bb4589
86
87 cond_next2997: ; preds = %bb2964
88 ret i32 0
89
90 bb3103: ; preds = %bb4589
91 ret i32 0
92
93 bb4589: ; preds = %bb2964
94 br i1 false, label %bb3103, label %bb4597
95
96 bb4597: ; preds = %bb4589
97 br i1 false, label %cond_next4630, label %bb4744
98
99 cond_next4630: ; preds = %bb4597
100 br i1 false, label %bb4744, label %cond_true4724
101
102 cond_true4724: ; preds = %cond_next4630
103 br i1 false, label %bb4736, label %bb7531
104
105 bb4736: ; preds = %cond_true4724
106 ret i32 0
107
108 bb4744: ; preds = %cond_next4630, %bb4597
109 ret i32 0
110
111 bb7531: ; preds = %cond_true4724
112 %v_addr.023.0.i6 = add i32 %tmp2237, -255 ; [#uses=1]
113 br label %bb.i14
114
115 bb.i14: ; preds = %bb.i14, %bb7531
116 %n.021.0.i8 = phi i32 [ 0, %bb7531 ], [ %indvar.next, %bb.i14 ] ; [#uses=2]
117 %tmp..i9 = mul i32 %n.021.0.i8, -255 ; [#uses=1]
118 %tmp5.i11 = add i32 %v_addr.023.0.i6, %tmp..i9 ; [#uses=1]
119 %tmp10.i12 = icmp ugt i32 %tmp5.i11, 254 ; [#uses=1]
120 %indvar.next = add i32 %n.021.0.i8, 1 ; [#uses=1]
121 br i1 %tmp10.i12, label %bb.i14, label %bb12.loopexit.i18
122
123 bb12.loopexit.i18: ; preds = %bb.i14
124 call void @llvm.memcpy.i32( i8* null, i8* null, i32 %tmp2237, i32 1 )
125 ret i32 0
126 }
127
128 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+0
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test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll less more
None ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep subl | grep 24
1
2 %struct.argument_t = type { i8*, %struct.argument_t*, i32, %struct.ipc_type_t*, i32, void (...)*, void (...)*, void (...)*, void (...)*, void (...)*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, %struct.routine*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, i32, i32, i32, i32, i32, i32 }
3 %struct.ipc_type_t = type { i8*, %struct.ipc_type_t*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, %struct.ipc_type_t*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8* }
4 %struct.routine = type opaque
5 @"\01LC" = external constant [11 x i8] ; <[11 x i8]*> [#uses=1]
6
7 define i8* @InArgMsgField(%struct.argument_t* %arg, i8* %str) nounwind {
8 entry:
9 %who = alloca [20 x i8] ; <[20 x i8]*> [#uses=1]
10 %who1 = getelementptr [20 x i8]* %who, i32 0, i32 0 ; [#uses=2]
11 call void @llvm.memset.i32( i8* %who1, i8 0, i32 20, i32 1 )
12 call void @llvm.memcpy.i32( i8* %who1, i8* getelementptr ([11 x i8]* @"\01LC", i32 0, i32 0), i32 11, i32 1 )
13 unreachable
14 }
15
16 declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
17
18 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
1010
1111 define void @foo(i32 %t) nounwind {
1212 %tmp1210 = alloca i8, i32 32, align 4
13 call void @llvm.memset.i64(i8* %tmp1210, i8 0, i64 32, i32 4)
14
13 call void @llvm.memset.p0i8.i64(i8* %tmp1210, i8 0, i64 32, i32 4, i1 false)
1514 %x = alloca i8, i32 %t