llvm.org GIT mirror llvm / b84f890
If a function needs a frame pointer, but r11 (aka fp) has not been used, remove it from the list of unspilled registers. Otherwise the following attempt to keep the stack aligned by picking an extra GPR register to spill will not work as it picks up r11. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208129 91177308-0d34-0410-b5e6-96231b3b80d8 Joerg Sonnenberger 6 years ago
6 changed file(s) with 42 addition(s) and 36 deletion(s). Raw diff Collapse all Expand all
15281528
15291529 if (hasFP(MF)) {
15301530 MRI.setPhysRegUsed(FramePtr);
1531 auto FPPos = std::find(UnspilledCS1GPRs.begin(), UnspilledCS1GPRs.end(),
1532 FramePtr);
1533 if (FPPos != UnspilledCS1GPRs.end())
1534 UnspilledCS1GPRs.erase(FPPos);
15311535 NumGPRSpills++;
15321536 }
15331537
7474 ; CHECK-FP-ELIM: .cfi_startproc
7575 ; CHECK-FP-ELIM: sub sp, sp, #16
7676 ; CHECK-FP-ELIM: .cfi_def_cfa_offset 16
77 ; CHECK-FP-ELIM: push {r4, r11, lr}
78 ; CHECK-FP-ELIM: .cfi_def_cfa_offset 28
77 ; CHECK-FP-ELIM: push {r4, r10, r11, lr}
78 ; CHECK-FP-ELIM: .cfi_def_cfa_offset 32
7979 ; CHECK-FP-ELIM: .cfi_offset lr, -20
8080 ; CHECK-FP-ELIM: .cfi_offset r11, -24
81 ; CHECK-FP-ELIM: .cfi_offset r4, -28
82 ; CHECK-FP-ELIM: add r11, sp, #4
81 ; CHECK-FP-ELIM: .cfi_offset r10, -28
82 ; CHECK-FP-ELIM: .cfi_offset r4, -32
83 ; CHECK-FP-ELIM: add r11, sp, #8
8384 ; CHECK-FP-ELIM: .cfi_def_cfa r11, 24
8485
8586 ; CHECK-THUMB-FP-LABEL: sum
200200
201201 ; CHECK-V7-FP-LABEL: _Z4testiiiiiddddd:
202202 ; CHECK-V7-FP: .cfi_startproc
203 ; CHECK-V7-FP: push {r4, r11, lr}
204 ; CHECK-V7-FP: .cfi_def_cfa_offset 12
203 ; CHECK-V7-FP: push {r4, r10, r11, lr}
204 ; CHECK-V7-FP: .cfi_def_cfa_offset 16
205205 ; CHECK-V7-FP: .cfi_offset lr, -4
206206 ; CHECK-V7-FP: .cfi_offset r11, -8
207 ; CHECK-V7-FP: .cfi_offset r4, -12
208 ; CHECK-V7-FP: add r11, sp, #4
207 ; CHECK-V7-FP: .cfi_offset r10, -12
208 ; CHECK-V7-FP: .cfi_offset r4, -16
209 ; CHECK-V7-FP: add r11, sp, #8
209210 ; CHECK-V7-FP: .cfi_def_cfa r11, 8
210211 ; CHECK-V7-FP: vpush {d8, d9, d10, d11, d12}
211212 ; CHECK-V7-FP: .cfi_offset d12, -24
213214 ; CHECK-V7-FP: .cfi_offset d10, -40
214215 ; CHECK-V7-FP: .cfi_offset d9, -48
215216 ; CHECK-V7-FP: .cfi_offset d8, -56
216 ; CHECK-V7-FP: sub sp, sp, #28
217 ; CHECK-V7-FP: sub sp, sp, #24
217218 ; CHECK-V7-FP: .cfi_endproc
218219
219220 ; CHECK-V7-FP-ELIM-LABEL: _Z4testiiiiiddddd:
147147
148148 ; CHECK-V7-FP-LABEL: _Z4testiiiiiddddd:
149149 ; CHECK-V7-FP: .fnstart
150 ; CHECK-V7-FP: .save {r4, r11, lr}
151 ; CHECK-V7-FP: push {r4, r11, lr}
152 ; CHECK-V7-FP: .setfp r11, sp, #4
153 ; CHECK-V7-FP: add r11, sp, #4
150 ; CHECK-V7-FP: .save {r4, r10, r11, lr}
151 ; CHECK-V7-FP: push {r4, r10, r11, lr}
152 ; CHECK-V7-FP: .setfp r11, sp, #8
153 ; CHECK-V7-FP: add r11, sp, #8
154154 ; CHECK-V7-FP: .vsave {d8, d9, d10, d11, d12}
155155 ; CHECK-V7-FP: vpush {d8, d9, d10, d11, d12}
156 ; CHECK-V7-FP: .pad #28
157 ; CHECK-V7-FP: sub sp, sp, #28
156 ; CHECK-V7-FP: .pad #24
157 ; CHECK-V7-FP: sub sp, sp, #24
158158 ; CHECK-V7-FP: .personality __gxx_personality_v0
159159 ; CHECK-V7-FP: .handlerdata
160160 ; CHECK-V7-FP: .fnend
1111
1212 ; Also need special function return setting pc and CPSR simultaneously.
1313 ; CHECK-A-LABEL: irq_fn:
14 ; CHECK-A: push {r0, r1, r2, r3, r11, r12, lr}
15 ; CHECK-A: add r11, sp, #16
16 ; CHECK-A: sub sp, sp, #{{[0-9]+}}
14 ; CHECK-A: push {r0, r1, r2, r3, r10, r11, r12, lr}
15 ; CHECK-A: add r11, sp, #20
16 ; CHECK-A-NOT: sub sp, sp, #{{[0-9]+}}
1717 ; CHECK-A: bic sp, sp, #7
1818 ; CHECK-A: bl bar
19 ; CHECK-A: sub sp, r11, #16
20 ; CHECK-A: pop {r0, r1, r2, r3, r11, r12, lr}
19 ; CHECK-A: sub sp, r11, #20
20 ; CHECK-A: pop {r0, r1, r2, r3, r10, r11, r12, lr}
2121 ; CHECK-A: subs pc, lr, #4
2222
2323 ; CHECK-A-THUMB-LABEL: irq_fn:
3434 ; Normal AAPCS function (r0-r3 pushed onto stack by hardware, lr set to
3535 ; appropriate sentinel so no special return needed).
3636 ; CHECK-M-LABEL: irq_fn:
37 ; CHECK-M: push {r4, r7, lr}
38 ; CHECK-M: add r7, sp, #4
37 ; CHECK-M: push {r4, r6, r7, lr}
38 ; CHECK-M: add r7, sp, #8
3939 ; CHECK-M: mov r4, sp
4040 ; CHECK-M: bic r4, r4, #7
4141 ; CHECK-M: mov sp, r4
4242 ; CHECK-M: blx _bar
43 ; CHECK-M: subs r4, r7, #4
43 ; CHECK-M: sub.w r4, r7, #8
4444 ; CHECK-M: mov sp, r4
45 ; CHECK-M: pop {r4, r7, pc}
45 ; CHECK-M: pop {r4, r6, r7, pc}
4646
4747 call arm_aapcscc void @bar()
4848 ret void
8787
8888 define arm_aapcscc void @undef_fn() alignstack(8) "interrupt"="UNDEF" {
8989 ; CHECK-A-LABEL: undef_fn:
90 ; CHECK-A: push {r0, r1, r2, r3, r11, r12, lr}
91 ; CHECK-A: add r11, sp, #16
92 ; CHECK-A: sub sp, sp, #{{[0-9]+}}
90 ; CHECK-A: push {r0, r1, r2, r3, r10, r11, r12, lr}
91 ; CHECK-A: add r11, sp, #20
92 ; CHECK-A-NOT: sub sp, sp, #{{[0-9]+}}
9393 ; CHECK-A: bic sp, sp, #7
9494 ; [...]
95 ; CHECK-A: sub sp, r11, #16
96 ; CHECK-A: pop {r0, r1, r2, r3, r11, r12, lr}
95 ; CHECK-A: sub sp, r11, #20
96 ; CHECK-A: pop {r0, r1, r2, r3, r10, r11, r12, lr}
9797 ; CHECK-A: subs pc, lr, #0
9898
9999 call void @bar()
102102
103103 define arm_aapcscc void @abort_fn() alignstack(8) "interrupt"="ABORT" {
104104 ; CHECK-A-LABEL: abort_fn:
105 ; CHECK-A: push {r0, r1, r2, r3, r11, r12, lr}
106 ; CHECK-A: add r11, sp, #16
107 ; CHECK-A: sub sp, sp, #{{[0-9]+}}
105 ; CHECK-A: push {r0, r1, r2, r3, r10, r11, r12, lr}
106 ; CHECK-A: add r11, sp, #20
107 ; CHECK-A-NOT: sub sp, sp, #{{[0-9]+}}
108108 ; CHECK-A: bic sp, sp, #7
109109 ; [...]
110 ; CHECK-A: sub sp, r11, #16
111 ; CHECK-A: pop {r0, r1, r2, r3, r11, r12, lr}
110 ; CHECK-A: sub sp, r11, #20
111 ; CHECK-A: pop {r0, r1, r2, r3, r10, r11, r12, lr}
112112 ; CHECK-A: subs pc, lr, #4
113113
114114 call void @bar()
2828 ; ARM-linux-NEXT: cmp r4, r5
2929 ; ARM-linux-NEXT: blo .LBB0_2
3030
31 ; ARM-linux: mov r4, #24
31 ; ARM-linux: mov r4, #16
3232 ; ARM-linux-NEXT: mov r5, #0
3333 ; ARM-linux-NEXT: stmdb sp!, {lr}
3434 ; ARM-linux-NEXT: bl __morestack
4848 ; ARM-android-NEXT: cmp r4, r5
4949 ; ARM-android-NEXT: blo .LBB0_2
5050
51 ; ARM-android: mov r4, #24
51 ; ARM-android: mov r4, #16
5252 ; ARM-android-NEXT: mov r5, #0
5353 ; ARM-android-NEXT: stmdb sp!, {lr}
5454 ; ARM-android-NEXT: bl __morestack