llvm.org GIT mirror llvm / b80ada9
Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144179 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 8 years ago
3 changed file(s) with 58 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
33663366 { X86::VMOVUPSYmr, X86::VMOVUPDYmr, X86::VMOVDQUYmr },
33673367 { X86::VMOVUPSYrm, X86::VMOVUPDYrm, X86::VMOVDQUYrm },
33683368 { X86::VMOVNTPSYmr, X86::VMOVNTPDYmr, X86::VMOVNTDQYmr },
3369 { X86::VANDNPSYrm, X86::VANDNPDYrm, X86::VPANDNYrm },
3370 { X86::VANDNPSYrr, X86::VANDNPDYrr, X86::VPANDNYrr },
3371 { X86::VANDPSYrm, X86::VANDPDYrm, X86::VPANDYrm },
3372 { X86::VANDPSYrr, X86::VANDPDYrr, X86::VPANDYrr },
3373 { X86::VORPSYrm, X86::VORPDYrm, X86::VPORYrm },
3374 { X86::VORPSYrr, X86::VORPDYrr, X86::VPORYrr },
3375 { X86::VXORPSYrm, X86::VXORPDYrm, X86::VPXORYrm },
3376 { X86::VXORPSYrr, X86::VXORPDYrr, X86::VPXORYrr },
33693377 };
33703378
33713379 // FIXME: Some shuffle and unpack instructions have equivalents in different
134134 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
135135 CodeGenOpt::Level OptLevel) {
136136 bool ShouldPrint = false;
137 if (OptLevel != CodeGenOpt::None &&
138 (Subtarget.hasSSE2() || Subtarget.hasAVX())) {
139 PM.add(createExecutionDependencyFixPass(&X86::VR128RegClass));
140 ShouldPrint = true;
137 if (OptLevel != CodeGenOpt::None) {
138 if (Subtarget.hasXMMInt()) {
139 PM.add(createExecutionDependencyFixPass(&X86::VR128RegClass));
140 ShouldPrint = true;
141 }
142 if (Subtarget.hasAVX2()) {
143 // FIXME this should be turned on for just AVX, but the pass doesn't check
144 // that instructions are valid before replacing them and there are AVX2
145 // integer instructions in the table.
146 PM.add(createExecutionDependencyFixPass(&X86::VR256RegClass));
147 ShouldPrint = true;
148 }
141149 }
142150
143151 if (Subtarget.hasAVX() && UseVZeroUpper) {
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
1
2 ; CHECK: vpandn %ymm
3 define <4 x i64> @vpandn(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
4 entry:
5 ; Force the execution domain with an add.
6 %a2 = add <4 x i64> %a,
7 %y = xor <4 x i64> %a2,
8 %x = and <4 x i64> %a, %y
9 ret <4 x i64> %x
10 }
11
12 ; CHECK: vpand %ymm
13 define <4 x i64> @vpand(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
14 entry:
15 ; Force the execution domain with an add.
16 %a2 = add <4 x i64> %a,
17 %x = and <4 x i64> %a2, %b
18 ret <4 x i64> %x
19 }
20
21 ; CHECK: vpor %ymm
22 define <4 x i64> @vpor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
23 entry:
24 ; Force the execution domain with an add.
25 %a2 = add <4 x i64> %a,
26 %x = or <4 x i64> %a2, %b
27 ret <4 x i64> %x
28 }
29
30 ; CHECK: vpxor %ymm
31 define <4 x i64> @vpxor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
32 entry:
33 ; Force the execution domain with an add.
34 %a2 = add <4 x i64> %a,
35 %x = xor <4 x i64> %a2, %b
36 ret <4 x i64> %x
37 }