llvm.org GIT mirror llvm / b7c01bf
[PowerPC] Mark all instructions as non-cheap for MachineLICM MachineLICM uses a callback named hasLowDefLatency to determine if an instruction def operand has a 'low' latency. If all relevant operands have a 'low' latency, the instruction is considered too cheap to hoist out of loops even in low-register-pressure situations. On PowerPC cores, both the embedded cores and the others, there is no reason to believe that this is a good choice: all instructions have a cost inside a loop, and hoisting them when not limited by register pressure is a reasonable default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225471 91177308-0d34-0410-b5e6-96231b3b80d8 Hal Finkel 5 years ago
2 changed file(s) with 64 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
105105 UseNode, UseIdx);
106106 }
107107
108 bool hasLowDefLatency(const InstrItineraryData *ItinData,
109 const MachineInstr *DefMI,
110 unsigned DefIdx) const override {
111 // Machine LICM should hoist all instructions in low-register-pressure
112 // situations; none are sufficiently free to justify leaving in a loop
113 // body.
114 return false;
115 }
116
108117 bool isCoalescableExtInstr(const MachineInstr &MI,
109118 unsigned &SrcReg, unsigned &DstReg,
110119 unsigned &SubIdx) const override;
0 ; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
1 target datalayout = "E-m:e-i64:64-n32:64"
2 target triple = "powerpc64-unknown-linux-gnu"
3
4 ; Function Attrs: nounwind
5 define double @foo() #1 {
6 entry:
7 %x = alloca [2048 x float], align 4
8 %y = alloca [2048 x float], align 4
9 %0 = bitcast [2048 x float]* %x to i8*
10 call void @llvm.lifetime.start(i64 8192, i8* %0) #2
11 %1 = bitcast [2048 x float]* %y to i8*
12 call void @llvm.lifetime.start(i64 8192, i8* %1) #2
13 br label %for.body.i
14
15 ; CHECK-LABEL: @foo
16 ; CHECK: addi [[REG1:[0-9]+]], 1,
17 ; CHECK: addi [[REG2:[0-9]+]], 1,
18 ; CHECK: %for.body.i
19 ; CHECK-DAG: lfsx {{[0-9]+}}, [[REG1]],
20 ; CHECK-DAG: lfsx {{[0-9]+}}, [[REG2]],
21 ; CHECK: blr
22
23 for.body.i: ; preds = %for.body.i.preheader, %for.body.i
24 %accumulator.09.i = phi double [ %add.i, %for.body.i ], [ 0.000000e+00, %entry ]
25 %i.08.i = phi i64 [ %inc.i, %for.body.i ], [ 0, %entry ]
26 %arrayidx.i = getelementptr inbounds [2048 x float]* %x, i64 0, i64 %i.08.i
27 %v14 = load float* %arrayidx.i, align 4
28 %conv.i = fpext float %v14 to double
29 %arrayidx1.i = getelementptr inbounds [2048 x float]* %y, i64 0, i64 %i.08.i
30 %v15 = load float* %arrayidx1.i, align 4
31 %conv2.i = fpext float %v15 to double
32 %mul.i = fmul double %conv.i, %conv2.i
33 %add.i = fadd double %accumulator.09.i, %mul.i
34 %inc.i = add nuw nsw i64 %i.08.i, 1
35 %exitcond.i = icmp eq i64 %i.08.i, 2047
36 br i1 %exitcond.i, label %loop.exit, label %for.body.i
37
38 loop.exit: ; preds = %for.body.i
39 ret double %accumulator.09.i
40 }
41
42 ; Function Attrs: nounwind
43 declare void @llvm.lifetime.start(i64, i8* nocapture) #2
44
45 declare void @bar(float*, float*)
46
47 ; Function Attrs: nounwind
48 declare void @llvm.lifetime.end(i64, i8* nocapture) #2
49
50 attributes #0 = { nounwind readonly }
51 attributes #1 = { nounwind }
52 attributes #2 = { nounwind }
53
54