llvm.org GIT mirror llvm / b7994fe
Prevent potential NOREX bug. A GR8_NOREX virtual register is created when extrating a sub_8bit_hi sub-register: %vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1 TEST8ri_NOREX %vreg2, 1, %EFLAGS<imp-def>; GR8_NOREX:%vreg2 If such a live range is ever split, its register class must not be inflated to GR8. The sub-register copy can only target GR8_NOREX. I dont have a test case for this theoretical bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141500 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 8 years ago
1 changed file(s) with 11 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
245245
246246 const TargetRegisterClass*
247247 X86RegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC) const{
248 // Don't allow super-classes of GR8_NOREX. This class is only used after
249 // extrating sub_8bit_hi sub-registers. The H sub-registers cannot be copied
250 // to the full GR8 register class in 64-bit mode, so we cannot allow the
251 // reigster class inflation.
252 //
253 // The GR8_NOREX class is always used in a way that won't be constrained to a
254 // sub-class, so sub-classes like GR8_ABCD_L are allowed to expand to the
255 // full GR8 class.
256 if (RC == X86::GR8_NOREXRegisterClass)
257 return RC;
258
248259 const TargetRegisterClass *Super = RC;
249260 TargetRegisterClass::sc_iterator I = RC->getSuperClasses();
250261 do {