llvm.org GIT mirror llvm / b6c68f9
Use CHECK-NEXT to make sure we're only getting one copy of each shuffle instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79702 91177308-0d34-0410-b5e6-96231b3b80d8 Bob Wilson 10 years ago
3 changed file(s) with 20 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
1212 define <8 x i8> @vtrni8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
1313 ;CHECK: vtrni8:
1414 ;CHECK: vtrn.8
15 ;CHECK-NEXT: vadd.i8
1516 %tmp1 = load <8 x i8>* %A
1617 %tmp2 = load <8 x i8>* %B
1718 %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32>
2324 define <4 x i16> @vtrni16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
2425 ;CHECK: vtrni16:
2526 ;CHECK: vtrn.16
27 ;CHECK-NEXT: vadd.i16
2628 %tmp1 = load <4 x i16>* %A
2729 %tmp2 = load <4 x i16>* %B
2830 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32>
3436 define <2 x i32> @vtrni32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
3537 ;CHECK: vtrni32:
3638 ;CHECK: vtrn.32
39 ;CHECK-NEXT: vadd.i32
3740 %tmp1 = load <2 x i32>* %A
3841 %tmp2 = load <2 x i32>* %B
3942 %tmp3 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32>
4548 define <2 x float> @vtrnf(<2 x float>* %A, <2 x float>* %B) nounwind {
4649 ;CHECK: vtrnf:
4750 ;CHECK: vtrn.32
51 ;CHECK-NEXT: vadd.f32
4852 %tmp1 = load <2 x float>* %A
4953 %tmp2 = load <2 x float>* %B
5054 %tmp3 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <2 x i32>
5660 define <16 x i8> @vtrnQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
5761 ;CHECK: vtrnQi8:
5862 ;CHECK: vtrn.8
63 ;CHECK-NEXT: vadd.i8
5964 %tmp1 = load <16 x i8>* %A
6065 %tmp2 = load <16 x i8>* %B
6166 %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32>
6772 define <8 x i16> @vtrnQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
6873 ;CHECK: vtrnQi16:
6974 ;CHECK: vtrn.16
75 ;CHECK-NEXT: vadd.i16
7076 %tmp1 = load <8 x i16>* %A
7177 %tmp2 = load <8 x i16>* %B
7278 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32>
7884 define <4 x i32> @vtrnQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
7985 ;CHECK: vtrnQi32:
8086 ;CHECK: vtrn.32
87 ;CHECK-NEXT: vadd.i32
8188 %tmp1 = load <4 x i32>* %A
8289 %tmp2 = load <4 x i32>* %B
8390 %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32>
8996 define <4 x float> @vtrnQf(<4 x float>* %A, <4 x float>* %B) nounwind {
9097 ;CHECK: vtrnQf:
9198 ;CHECK: vtrn.32
99 ;CHECK-NEXT: vadd.f32
92100 %tmp1 = load <4 x float>* %A
93101 %tmp2 = load <4 x float>* %B
94102 %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32>
1212 define <8 x i8> @vuzpi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
1313 ;CHECK: vuzpi8:
1414 ;CHECK: vuzp.8
15 ;CHECK-NEXT: vadd.i8
1516 %tmp1 = load <8 x i8>* %A
1617 %tmp2 = load <8 x i8>* %B
1718 %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32>
2324 define <4 x i16> @vuzpi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
2425 ;CHECK: vuzpi16:
2526 ;CHECK: vuzp.16
27 ;CHECK-NEXT: vadd.i16
2628 %tmp1 = load <4 x i16>* %A
2729 %tmp2 = load <4 x i16>* %B
2830 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32>
3638 define <16 x i8> @vuzpQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
3739 ;CHECK: vuzpQi8:
3840 ;CHECK: vuzp.8
41 ;CHECK-NEXT: vadd.i8
3942 %tmp1 = load <16 x i8>* %A
4043 %tmp2 = load <16 x i8>* %B
4144 %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32>
4750 define <8 x i16> @vuzpQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
4851 ;CHECK: vuzpQi16:
4952 ;CHECK: vuzp.16
53 ;CHECK-NEXT: vadd.i16
5054 %tmp1 = load <8 x i16>* %A
5155 %tmp2 = load <8 x i16>* %B
5256 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32>
5862 define <4 x i32> @vuzpQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
5963 ;CHECK: vuzpQi32:
6064 ;CHECK: vuzp.32
65 ;CHECK-NEXT: vadd.i32
6166 %tmp1 = load <4 x i32>* %A
6267 %tmp2 = load <4 x i32>* %B
6368 %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32>
6974 define <4 x float> @vuzpQf(<4 x float>* %A, <4 x float>* %B) nounwind {
7075 ;CHECK: vuzpQf:
7176 ;CHECK: vuzp.32
77 ;CHECK-NEXT: vadd.f32
7278 %tmp1 = load <4 x float>* %A
7379 %tmp2 = load <4 x float>* %B
7480 %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32>
1212 define <8 x i8> @vzipi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
1313 ;CHECK: vzipi8:
1414 ;CHECK: vzip.8
15 ;CHECK-NEXT: vadd.i8
1516 %tmp1 = load <8 x i8>* %A
1617 %tmp2 = load <8 x i8>* %B
1718 %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32>
2324 define <4 x i16> @vzipi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
2425 ;CHECK: vzipi16:
2526 ;CHECK: vzip.16
27 ;CHECK-NEXT: vadd.i16
2628 %tmp1 = load <4 x i16>* %A
2729 %tmp2 = load <4 x i16>* %B
2830 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32>
3638 define <16 x i8> @vzipQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
3739 ;CHECK: vzipQi8:
3840 ;CHECK: vzip.8
41 ;CHECK-NEXT: vadd.i8
3942 %tmp1 = load <16 x i8>* %A
4043 %tmp2 = load <16 x i8>* %B
4144 %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32>
4750 define <8 x i16> @vzipQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
4851 ;CHECK: vzipQi16:
4952 ;CHECK: vzip.16
53 ;CHECK-NEXT: vadd.i16
5054 %tmp1 = load <8 x i16>* %A
5155 %tmp2 = load <8 x i16>* %B
5256 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32>
5862 define <4 x i32> @vzipQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
5963 ;CHECK: vzipQi32:
6064 ;CHECK: vzip.32
65 ;CHECK-NEXT: vadd.i32
6166 %tmp1 = load <4 x i32>* %A
6267 %tmp2 = load <4 x i32>* %B
6368 %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32>
6974 define <4 x float> @vzipQf(<4 x float>* %A, <4 x float>* %B) nounwind {
7075 ;CHECK: vzipQf:
7176 ;CHECK: vzip.32
77 ;CHECK-NEXT: vadd.f32
7278 %tmp1 = load <4 x float>* %A
7379 %tmp2 = load <4 x float>* %B
7480 %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32>