llvm.org GIT mirror llvm / b637729
[AVR] Set trackLivenessAfterRegAlloc This sets trackLivenessAfterRegAlloc on AVRRegisterInfo. Most existing targets set this flag. Without it, specific IR inputs cause LLVM to fail with: Assertion failed: (getParent()->getProperties().hasProperty( MachineFunctionProperties::Property::TracksLiveness) && "Liveness information is accurate"), function livein_begin file MachineBasicBlock.cpp, line 1354. With this commit, this no longer happens. Patch by Peter Nimmervoll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334409 91177308-0d34-0410-b5e6-96231b3b80d8 Dylan McKay 2 years ago
2 changed file(s) with 341 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
5050 /// Splits a 16-bit `DREGS` register into the lo/hi register pair.
5151 /// \param Reg A 16-bit register to split.
5252 void splitReg(unsigned Reg, unsigned &LoReg, unsigned &HiReg) const;
53
54 bool trackLivenessAfterRegAlloc(const MachineFunction &) const override {
55 return true;
56 }
57
5358 };
5459
5560 } // end namespace llvm
0 ; RUN: llc < %s -march=avr -mcpu=avr5 | FileCheck %s
1
2 ; The original reason for this failure is that the BranchFolderPass disables liveness
3 ; tracking unless you override the trackLivenessAfterRegAlloc function and return true.
4 ; This probably should be the default because all main targets do this (maybe some gpu targets don't).
5
6 ; More info can be found at https://github.com/avr-rust/rust/issues/99.
7
8 %struct.quux = type { [0 x i8], i64, [0 x i8], i64, [0 x i8], i64, [0 x i8], i64, [0 x i8] }
9 %struct.foo = type { [0 x i8], %struct.blam, [0 x i8], i32, [0 x i8], i32, [0 x i8], i8, [0 x i8], %struct.blam.0, [0 x i8], %struct.blam.0, [0 x i8] }
10 %struct.blam = type {}
11 %struct.blam.0 = type { [0 x i8], i8, [2 x i8] }
12 %struct.quux.1 = type { [0 x i8], %struct.wombat, [0 x i8], i64, [0 x i8], i64, [0 x i8], i16, [0 x i8], %struct.quux, [0 x i8], i64, [0 x i8], i16, [0 x i8] }
13 %struct.wombat = type {}
14
15 declare zeroext i1 @zot(%struct.quux*, %struct.foo*)
16
17 declare void @wibble(i16, i16)
18
19 ; CHECK-LABEL: main
20 define zeroext i1 @main(%struct.quux.1* %arg, %struct.foo* %arg62) {
21 bb:
22 %tmp63 = alloca [128 x i8], align 1
23 %tmp = getelementptr inbounds %struct.quux.1, %struct.quux.1* %arg, i16 0, i32 5
24 %tmp64 = getelementptr inbounds %struct.quux.1, %struct.quux.1* %arg, i16 0, i32 13
25 %tmp65 = bitcast %struct.foo* %arg62 to i32*
26 %tmp66 = icmp eq i32 undef, 0
27 br i1 undef, label %bb92, label %bb67
28
29 bb67:
30 br i1 %tmp66, label %bb83, label %bb68
31
32 bb68:
33 %tmp69 = load i64, i64* null, align 1
34 br label %bb70
35
36 bb70:
37 %tmp71 = phi i16 [ 128, %bb68 ], [ %tmp79, %bb70 ]
38 %tmp72 = phi i64 [ %tmp69, %bb68 ], [ %tmp74, %bb70 ]
39 %tmp73 = getelementptr inbounds i8, i8* null, i16 -1
40 %tmp74 = lshr i64 %tmp72, 4
41 %tmp75 = trunc i64 %tmp72 to i8
42 %tmp76 = and i8 %tmp75, 15
43 %tmp77 = add nuw nsw i8 %tmp76, 87
44 %tmp78 = select i1 undef, i8 undef, i8 %tmp77
45 store i8 %tmp78, i8* %tmp73, align 1
46 %tmp79 = add nsw i16 %tmp71, -1
47 %tmp80 = icmp eq i8* %tmp73, null
48 %tmp81 = or i1 undef, %tmp80
49 br i1 %tmp81, label %bb82, label %bb70
50
51 bb82:
52 call void @wibble(i16 %tmp79, i16 128)
53 unreachable
54
55 bb83:
56 %tmp84 = icmp eq i32 undef, 0
57 %tmp85 = load i64, i64* null, align 1
58 br i1 %tmp84, label %bb87, label %bb86
59
60 bb86:
61 unreachable
62
63 bb87:
64 br label %bb88
65
66 bb88:
67 %tmp89 = phi i64 [ %tmp90, %bb88 ], [ %tmp85, %bb87 ]
68 %tmp90 = udiv i64 %tmp89, 10000
69 %tmp91 = icmp ugt i64 %tmp89, 99999999
70 br label %bb88
71
72 bb92:
73 br label %bb93
74
75 bb93:
76 br i1 undef, label %bb95, label %bb94
77
78 bb94:
79 unreachable
80
81 bb95:
82 br label %bb96
83
84 bb96:
85 %tmp97 = phi i64 [ %tmp98, %bb96 ], [ undef, %bb95 ]
86 %tmp98 = udiv i64 %tmp97, 10000
87 %tmp99 = icmp ugt i64 %tmp97, 99999999
88 br i1 %tmp99, label %bb96, label %bb100
89
90 bb100:
91 br label %bb101
92
93 bb101:
94 %tmp102 = and i32 undef, 16
95 %tmp103 = icmp eq i32 %tmp102, 0
96 br i1 undef, label %bb130, label %bb104
97
98 bb104:
99 br i1 %tmp103, label %bb117, label %bb105
100
101 bb105:
102 br label %bb106
103
104 bb106:
105 %tmp107 = phi i16 [ 128, %bb105 ], [ %tmp113, %bb106 ]
106 %tmp108 = phi i64 [ undef, %bb105 ], [ %tmp111, %bb106 ]
107 %tmp109 = phi i8* [ undef, %bb105 ], [ %tmp110, %bb106 ]
108 %tmp110 = getelementptr inbounds i8, i8* %tmp109, i16 -1
109 %tmp111 = lshr i64 %tmp108, 4
110 %tmp112 = trunc i64 %tmp108 to i8
111 %tmp113 = add nsw i16 %tmp107, -1
112 %tmp114 = icmp eq i8* %tmp110, null
113 %tmp115 = or i1 undef, %tmp114
114 br i1 %tmp115, label %bb116, label %bb106
115
116 bb116:
117 call void @wibble(i16 %tmp113, i16 128)
118 unreachable
119
120 bb117:
121 %tmp118 = load i64, i64* %tmp, align 1
122 br i1 undef, label %bb120, label %bb119
123
124 bb119:
125 unreachable
126
127 bb120:
128 %tmp121 = icmp ugt i64 %tmp118, 9999
129 br i1 %tmp121, label %bb122, label %bb127
130
131 bb122:
132 br label %bb123
133
134 bb123:
135 %tmp124 = phi i64 [ %tmp125, %bb123 ], [ %tmp118, %bb122 ]
136 %tmp125 = udiv i64 %tmp124, 10000
137 %tmp126 = icmp ugt i64 %tmp124, 99999999
138 br label %bb123
139
140 bb127:
141 %tmp128 = load i32, i32* %tmp65, align 1
142 %tmp129 = icmp eq i32 undef, 0
143 br label %bb162
144
145 bb130:
146 br i1 %tmp103, label %bb142, label %bb131
147
148 bb131:
149 br label %bb132
150
151 bb132:
152 %tmp133 = phi i64 [ undef, %bb131 ], [ %tmp134, %bb132 ]
153 %tmp134 = lshr i64 %tmp133, 4
154 %tmp135 = trunc i64 %tmp133 to i8
155 %tmp136 = and i8 %tmp135, 15
156 %tmp137 = add nuw nsw i8 %tmp136, 87
157 %tmp138 = select i1 undef, i8 undef, i8 %tmp137
158 store i8 %tmp138, i8* undef, align 1
159 %tmp139 = icmp eq i8* undef, null
160 %tmp140 = or i1 undef, %tmp139
161 br i1 %tmp140, label %bb141, label %bb132
162
163 bb141:
164 unreachable
165
166 bb142:
167 %tmp143 = icmp eq i32 undef, 0
168 %tmp144 = load i64, i64* %tmp, align 1
169 br i1 %tmp143, label %bb156, label %bb145
170
171 bb145:
172 br label %bb146
173
174 bb146:
175 %tmp147 = phi i16 [ 128, %bb145 ], [ %tmp151, %bb146 ]
176 %tmp148 = phi i64 [ %tmp144, %bb145 ], [ %tmp150, %bb146 ]
177 %tmp149 = getelementptr inbounds i8, i8* null, i16 -1
178 %tmp150 = lshr i64 %tmp148, 4
179 %tmp151 = add nsw i16 %tmp147, -1
180 %tmp152 = icmp eq i64 %tmp150, 0
181 %tmp153 = icmp eq i8* %tmp149, null
182 %tmp154 = or i1 %tmp152, %tmp153
183 br i1 %tmp154, label %bb155, label %bb146
184
185 bb155:
186 call void @wibble(i16 %tmp151, i16 128)
187 unreachable
188
189 bb156:
190 br label %bb157
191
192 bb157:
193 %tmp158 = phi i64 [ %tmp159, %bb157 ], [ %tmp144, %bb156 ]
194 %tmp159 = udiv i64 %tmp158, 10000
195 %tmp160 = icmp ugt i64 %tmp158, 99999999
196 br i1 %tmp160, label %bb157, label %bb161
197
198 bb161:
199 unreachable
200
201 bb162:
202 br i1 %tmp129, label %bb164, label %bb163
203
204 bb163:
205 unreachable
206
207 bb164:
208 %tmp165 = and i32 %tmp128, 32
209 %tmp166 = icmp eq i32 %tmp165, 0
210 br i1 %tmp166, label %bb169, label %bb167
211
212 bb167:
213 br label %bb168
214
215 bb168:
216 br label %bb168
217
218 bb169:
219 br label %bb170
220
221 bb170:
222 br i1 undef, label %bb172, label %bb171
223
224 bb171:
225 store i32 0, i32* undef, align 1
226 call void @llvm.memcpy.p0i8.p0i8.i16(i8* align 1 undef, i8* align 1 null, i16 3, i1 false)
227 call void @llvm.memcpy.p0i8.p0i8.i16(i8* align 1 undef, i8* align 1 null, i16 3, i1 false)
228 br label %bb214
229
230 bb172:
231 %tmp173 = call zeroext i1 @zot(%struct.quux* noalias nonnull readonly dereferenceable(32) undef, %struct.foo* nonnull dereferenceable(15) %arg62)
232 br i1 %tmp173, label %bb214, label %bb174
233
234 bb174:
235 %tmp175 = load i32, i32* %tmp65, align 1
236 %tmp176 = icmp eq i32 undef, 0
237 br label %bb177
238
239 bb177:
240 br i1 %tmp176, label %bb190, label %bb178
241
242 bb178:
243 %tmp179 = getelementptr inbounds [128 x i8], [128 x i8]* %tmp63, i16 0, i16 0
244 br label %bb180
245
246 bb180:
247 %tmp181 = phi i64 [ 0, %bb178 ], [ %tmp182, %bb180 ]
248 %tmp182 = lshr i64 %tmp181, 4
249 %tmp183 = trunc i64 %tmp181 to i8
250 %tmp184 = and i8 %tmp183, 15
251 %tmp185 = add nuw nsw i8 %tmp184, 87
252 %tmp186 = select i1 false, i8 0, i8 %tmp185
253 store i8 %tmp186, i8* null, align 1
254 %tmp187 = icmp eq i8* null, %tmp179
255 %tmp188 = or i1 undef, %tmp187
256 br i1 %tmp188, label %bb189, label %bb180
257
258 bb189:
259 call void @wibble(i16 0, i16 128)
260 unreachable
261
262 bb190:
263 %tmp191 = and i32 %tmp175, 32
264 %tmp192 = icmp eq i32 %tmp191, 0
265 br i1 %tmp192, label %bb201, label %bb193
266
267 bb193:
268 br label %bb194
269
270 bb194:
271 %tmp195 = phi i64 [ 0, %bb193 ], [ %tmp196, %bb194 ]
272 %tmp196 = lshr i64 %tmp195, 4
273 %tmp197 = add nsw i16 0, -1
274 %tmp198 = icmp eq i64 %tmp196, 0
275 %tmp199 = or i1 %tmp198, undef
276 br i1 %tmp199, label %bb200, label %bb194
277
278 bb200:
279 call void @wibble(i16 %tmp197, i16 128)
280 unreachable
281
282 bb201:
283 br i1 undef, label %bb202, label %bb207
284
285 bb202:
286 br label %bb203
287
288 bb203:
289 %tmp204 = phi i64 [ %tmp205, %bb203 ], [ 0, %bb202 ]
290 %tmp205 = udiv i64 %tmp204, 10000
291 %tmp206 = icmp ugt i64 %tmp204, 99999999
292 br i1 %tmp206, label %bb203, label %bb207
293
294 bb207:
295 br label %bb208
296
297 bb208:
298 store i16* %tmp64, i16** undef, align 1
299 %tmp209 = load i32, i32* %tmp65, align 1
300 %tmp210 = icmp eq i32 undef, 0
301 %tmp211 = and i32 %tmp209, 16
302 %tmp212 = icmp eq i32 %tmp211, 0
303 br i1 %tmp210, label %bb215, label %bb213
304
305 bb213:
306 unreachable
307
308 bb214:
309 br label %bb221
310
311 bb215:
312 br i1 %tmp212, label %bb220, label %bb216
313
314 bb216:
315 br label %bb217
316
317 bb217:
318 br i1 undef, label %bb218, label %bb219
319
320 bb218:
321 unreachable
322
323 bb219:
324 br label %bb221
325
326 bb220:
327 unreachable
328
329 bb221:
330 store %struct.quux.1* %arg, %struct.quux.1** undef, align 1
331 ret i1 undef
332 }
333
334 declare void @llvm.memcpy.p0i8.p0i8.i16(i8* nocapture writeonly, i8* nocapture readonly, i16, i1)
335