llvm.org GIT mirror llvm / b4ace5f
[SCEV][NFC] Verify IR in isLoop[Entry,Backedge]GuardedByCond We have a lot of various bugs that are caused by misuse of SCEV (in particular in LV), all of them can simply be described as "we ask SCEV to prove some fact on invalid IR". Some of examples of those are PR36311, PR37221, PR39160. The problem is that these failues manifest differently (what we saw was failure of various asserts across SCEV, but there can also be miscompiles). This patch adds an assert into two SCEV methods that strongly rely on correctness of the IR and are involved in known failues. This will at least allow us to have a clear indication of what was wrong in this case. This patch also fixes a unit test with incorrect IR that fails this verification. Differential Revision: https://reviews.llvm.org/D52930 Reviewed By: fhahn git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346389 91177308-0d34-0410-b5e6-96231b3b80d8 Max Kazantsev 10 months ago
2 changed file(s) with 16 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
111111 #include "llvm/IR/Use.h"
112112 #include "llvm/IR/User.h"
113113 #include "llvm/IR/Value.h"
114 #include "llvm/IR/Verifier.h"
114115 #include "llvm/Pass.h"
115116 #include "llvm/Support/Casting.h"
116117 #include "llvm/Support/CommandLine.h"
160161 VerifySCEVMap("verify-scev-maps", cl::Hidden,
161162 cl::desc("Verify no dangling value in ScalarEvolution's "
162163 "ExprValueMap (slow)"));
164
165 static cl::opt VerifyIR(
166 "scev-verify-ir", cl::Hidden,
167 cl::desc("Verify IR correctness when making sensitive SCEV queries (slow)"),
168 cl::init(false));
163169
164170 static cl::opt MulOpsInlineThreshold(
165171 "scev-mulops-inline-threshold", cl::Hidden,
93699375 // (interprocedural conditions notwithstanding).
93709376 if (!L) return true;
93719377
9378 if (VerifyIR)
9379 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs()) &&
9380 "This cannot be done on broken IR!");
9381
9382
93729383 if (isKnownViaNonRecursiveReasoning(Pred, LHS, RHS))
93739384 return true;
93749385
94739484 // Interpret a null as meaning no loop, where there is obviously no guard
94749485 // (interprocedural conditions notwithstanding).
94759486 if (!L) return false;
9487
9488 if (VerifyIR)
9489 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs()) &&
9490 "This cannot be done on broken IR!");
94769491
94779492 // Both LHS and RHS must be available at loop entry.
94789493 assert(isAvailableAtLoopEntry(LHS, L) &&
700700 PN->addIncoming(Dec, IncBB);
701701 BranchInst::Create(CondBB, IncBB);
702702
703 Accum = GetElementPtrInst::Create(I8Ty, Accum, Dec, "gep", EndBB);
703 Accum = GetElementPtrInst::Create(I8Ty, Accum, PN, "gep", EndBB);
704704
705705 PrevBB = CondBB;
706706 CondBB = NextBB;