llvm.org GIT mirror llvm / b422d0b
Fixed disassembler for vstm/vldm ARM VFP instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156077 91177308-0d34-0410-b5e6-96231b3b80d8 Silviu Baranga 8 years ago
2 changed file(s) with 33 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
12231223 uint64_t Address, const void *Decoder) {
12241224 DecodeStatus S = MCDisassembler::Success;
12251225
1226 unsigned Vd = fieldFromInstruction32(Val, 8, 4);
1227 unsigned regs = Val & 0xFF;
1226 unsigned Vd = fieldFromInstruction32(Val, 8, 5);
1227 unsigned regs = fieldFromInstruction32(Val, 0, 8);
12281228
12291229 if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder)))
12301230 return MCDisassembler::Fail;
12401240 uint64_t Address, const void *Decoder) {
12411241 DecodeStatus S = MCDisassembler::Success;
12421242
1243 unsigned Vd = fieldFromInstruction32(Val, 8, 4);
1244 unsigned regs = (Val & 0xFF) / 2;
1243 unsigned Vd = fieldFromInstruction32(Val, 8, 5);
1244 unsigned regs = fieldFromInstruction32(Val, 0, 8);
1245
1246 regs = regs >> 1;
12451247
12461248 if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder)))
12471249 return MCDisassembler::Fail;
202202 # CHECK: vstmia r1, {d2, d3, d4, d5, d6, d7}
203203 # CHECK: vstmia r1, {s2, s3, s4, s5, s6, s7}
204204
205 0x05 0x9a 0xc0 0x0c
206 0x0c 0x0b 0xc7 0x0c
207 0x06 0x9a 0x93 0x0c
208 0x0a 0x5b 0xd2 0x0c
209 # CHECK: vstmiaeq r0, {s19, s20, s21, s22, s23}
210 # CHECK: vstmiaeq r7, {d16, d17, d18, d19, d20, d21}
211 # CHECK: vldmiaeq r3, {s18, s19, s20, s21, s22, s23}
212 # CHECK: vldmiaeq r2, {d21, d22, d23, d24, d25}
213
214 0x04 0xca 0x6c 0x0d
215 0x06 0x1b 0x69 0x0d
216 0x03 0xaa 0x75 0x0d
217 0x08 0xeb 0x37 0x0d
218 # CHECK: vstmdbeq r12!, {s25, s26, s27, s28}
219 # CHECK: vstmdbeq r9!, {d17, d18, d19}
220 # CHECK: vldmdbeq r5!, {s21, s22, s23}
221 # CHECK: vldmdbeq r7!, {d14, d15, d16, d17}
222
223 0x04 0x7a 0xa6 0x0c
224 0x0c 0xfb 0xa4 0x0c
225 0x03 0xaa 0xf8 0x0c
226 0x0a 0x3b 0xfb 0x0c
227 # CHECK: vstmiaeq r6!, {s14, s15, s16, s17}
228 # CHECK: vstmiaeq r4!, {d15, d16, d17, d18, d19, d20}
229 # CHECK: vldmiaeq r8!, {s21, s22, s23}
230 # CHECK: vldmiaeq r11!, {d19, d20, d21, d22, d23}
231
205232 0x40 0x0b 0xbd 0xee
206233 0x60 0x0a 0xbd 0xee
207234 0x40 0x0b 0xbc 0xee