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Use an IndexedMap for LiveVariables::VirtRegInfo. Provide MRI::getNumVirtRegs() and TRI::index2VirtReg() functions to allow iteration over virtual registers without depending on the representation of virtual register numbers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123098 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 9 years ago
4 changed file(s) with 26 addition(s) and 30 deletion(s). Raw diff Collapse all Expand all
3131 #include "llvm/CodeGen/MachineBasicBlock.h"
3232 #include "llvm/CodeGen/MachineFunctionPass.h"
3333 #include "llvm/CodeGen/MachineInstr.h"
34 #include "llvm/Target/TargetRegisterInfo.h"
3435 #include "llvm/ADT/BitVector.h"
3536 #include "llvm/ADT/DenseMap.h"
37 #include "llvm/ADT/IndexedMap.h"
3638 #include "llvm/ADT/SmallSet.h"
3739 #include "llvm/ADT/SmallVector.h"
3840 #include "llvm/ADT/SparseBitVector.h"
120122
121123 private:
122124 /// VirtRegInfo - This list is a mapping from virtual register number to
123 /// variable information. FirstVirtualRegister is subtracted from the virtual
124 /// register number before indexing into this list.
125 ///
126 std::vector VirtRegInfo;
125 /// variable information.
126 ///
127 IndexedMap VirtRegInfo;
127128
128129 /// PHIJoins - list of virtual registers that are PHI joins. These registers
129130 /// may have multiple definitions, and they require special handling when
215215 ///
216216 unsigned createVirtualRegister(const TargetRegisterClass *RegClass);
217217
218 /// getNumVirtRegs - Return the number of virtual registers created.
219 ///
220 unsigned getNumVirtRegs() const { return VRegInfo.size(); }
221
218222 /// getLastVirtReg - Return the highest currently assigned virtual register.
219223 ///
220224 unsigned getLastVirtReg() const {
221 return (unsigned)VRegInfo.size()+TargetRegisterInfo::FirstVirtualRegister-1;
225 return TargetRegisterInfo::index2VirtReg(getNumVirtRegs() - 1);
222226 }
223227
224228 /// getRegClassVirtRegs - Return the list of virtual registers of the given
320320 return Reg >= FirstVirtualRegister;
321321 }
322322
323 /// index2VirtReg - Convert a 0-based index to a virtual register number.
324 /// This is the inverse operation of VirtReg2IndexFunctor below.
325 static unsigned index2VirtReg(unsigned Index) {
326 return Index + FirstVirtualRegister;
327 }
328
323329 /// printReg - Print a virtual or physical register on OS.
324330 void printReg(unsigned Reg, raw_ostream &OS) const;
325331
3030 #include "llvm/CodeGen/MachineRegisterInfo.h"
3131 #include "llvm/CodeGen/Passes.h"
3232 #include "llvm/Support/Debug.h"
33 #include "llvm/Target/TargetRegisterInfo.h"
3433 #include "llvm/Target/TargetInstrInfo.h"
3534 #include "llvm/Target/TargetMachine.h"
3635 #include "llvm/ADT/DepthFirstIterator.h"
8180 LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) {
8281 assert(TargetRegisterInfo::isVirtualRegister(RegIdx) &&
8382 "getVarInfo: not a virtual register!");
84 RegIdx -= TargetRegisterInfo::FirstVirtualRegister;
85 if (RegIdx >= VirtRegInfo.size()) {
86 if (RegIdx >= 2*VirtRegInfo.size())
87 VirtRegInfo.resize(RegIdx*2);
88 else
89 VirtRegInfo.resize(2*VirtRegInfo.size());
90 }
83 VirtRegInfo.grow(RegIdx);
9184 return VirtRegInfo[RegIdx];
9285 }
9386
500493 std::fill(PhysRegUse, PhysRegUse + NumRegs, (MachineInstr*)0);
501494 PHIJoins.clear();
502495
503 /// Get some space for a respectable number of registers.
504 VirtRegInfo.resize(64);
505
506496 analyzePHINodes(mf);
507497
508498 // Calculate live variable information in depth first order on the CFG of the
630620
631621 // Convert and transfer the dead / killed information we have gathered into
632622 // VirtRegInfo onto MI's.
633 for (unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i)
634 for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j)
635 if (VirtRegInfo[i].Kills[j] ==
636 MRI->getVRegDef(i + TargetRegisterInfo::FirstVirtualRegister))
637 VirtRegInfo[i]
638 .Kills[j]->addRegisterDead(i +
639 TargetRegisterInfo::FirstVirtualRegister,
640 TRI);
623 for (unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i) {
624 const unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
625 for (unsigned j = 0, e2 = VirtRegInfo[Reg].Kills.size(); j != e2; ++j)
626 if (VirtRegInfo[Reg].Kills[j] == MRI->getVRegDef(Reg))
627 VirtRegInfo[Reg].Kills[j]->addRegisterDead(Reg, TRI);
641628 else
642 VirtRegInfo[i]
643 .Kills[j]->addRegisterKilled(i +
644 TargetRegisterInfo::FirstVirtualRegister,
645 TRI);
629 VirtRegInfo[Reg].Kills[j]->addRegisterKilled(Reg, TRI);
630 }
646631
647632 // Check to make sure there are no unreachable blocks in the MC CFG for the
648633 // function. If so, it is due to a bug in the instruction selector or some
777762 getVarInfo(BBI->getOperand(i).getReg()).AliveBlocks.set(NumNew);
778763
779764 // Update info for all live variables
780 for (unsigned Reg = TargetRegisterInfo::FirstVirtualRegister,
781 E = MRI->getLastVirtReg()+1; Reg != E; ++Reg) {
765 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
766 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
782767 VarInfo &VI = getVarInfo(Reg);
783768 if (!VI.AliveBlocks.test(NumNew) && VI.isLiveIn(*SuccBB, Reg, *MRI))
784769 VI.AliveBlocks.set(NumNew);