llvm.org GIT mirror llvm / b3e72a7
Removing several -Wunused-but-set-variable warnings; NFC intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242028 91177308-0d34-0410-b5e6-96231b3b80d8 Aaron Ballman 5 years ago
1 changed file(s) with 0 addition(s) and 26 deletion(s). Raw diff Collapse all Expand all
905905 unsigned Opcode = FirstMI->getOpcode();
906906 bool isNotVFP = isi32Load(Opcode) || isi32Store(Opcode);
907907 unsigned Size = getLSMultipleTransferSize(FirstMI);
908 // vldm / vstm limit are 32 for S variants, 16 for D variants.
909 unsigned Limit;
910 switch (Opcode) {
911 default:
912 Limit = UINT_MAX;
913 break;
914 case ARM::VSTRS:
915 Limit = 32;
916 break;
917 case ARM::VSTRD:
918 Limit = 16;
919 break;
920 case ARM::VLDRD:
921 Limit = 16;
922 break;
923 case ARM::VLDRS:
924 Limit = 32;
925 break;
926 }
927908
928909 unsigned SIndex = 0;
929910 unsigned EIndex = MemOps.size();
16331614 MemOpQueue MemOps;
16341615 unsigned CurrBase = 0;
16351616 unsigned CurrOpc = ~0u;
1636 unsigned CurrSize = 0;
16371617 ARMCC::CondCodes CurrPred = ARMCC::AL;
1638 unsigned CurrPredReg = 0;
16391618 unsigned Position = 0;
16401619 assert(Candidates.size() == 0);
16411620 assert(MergeBaseCandidates.size() == 0);
16511630
16521631 if (isMemoryOp(MBBI)) {
16531632 unsigned Opcode = MBBI->getOpcode();
1654 unsigned Size = getLSMultipleTransferSize(MBBI);
16551633 const MachineOperand &MO = MBBI->getOperand(0);
16561634 unsigned Reg = MO.getReg();
16571635 unsigned Base = getLoadStoreBaseOp(*MBBI).getReg();
16621640 // Start of a new chain.
16631641 CurrBase = Base;
16641642 CurrOpc = Opcode;
1665 CurrSize = Size;
16661643 CurrPred = Pred;
1667 CurrPredReg = PredReg;
16681644 MemOps.push_back(MemOpQueueEntry(MBBI, Offset, Position));
16691645 continue;
16701646 }
17361712 // Reset for the next chain.
17371713 CurrBase = 0;
17381714 CurrOpc = ~0u;
1739 CurrSize = 0;
17401715 CurrPred = ARMCC::AL;
1741 CurrPredReg = 0;
17421716 MemOps.clear();
17431717 }
17441718 }