llvm.org GIT mirror llvm / b341fac
Disable the Thumb no-return call optimization: mov lr, pc b.w _foo The "mov" instruction doesn't set bit zero to one, it's putting incorrect value in lr. It messes up backtraces. rdar://12663632 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167657 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 7 years ago
5 changed file(s) with 2 addition(s) and 62 deletion(s). Raw diff Collapse all Expand all
14121412 }
14131413 return;
14141414 }
1415 case ARM::t2BMOVPCB_CALL: {
1416 {
1417 MCInst TmpInst;
1418 TmpInst.setOpcode(ARM::tMOVr);
1419 TmpInst.addOperand(MCOperand::CreateReg(ARM::LR));
1420 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1421 // Add predicate operands.
1422 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1423 TmpInst.addOperand(MCOperand::CreateReg(0));
1424 OutStreamer.EmitInstruction(TmpInst);
1425 }
1426 {
1427 MCInst TmpInst;
1428 TmpInst.setOpcode(ARM::t2B);
1429 const GlobalValue *GV = MI->getOperand(0).getGlobal();
1430 MCSymbol *GVSym = Mang->getSymbol(GV);
1431 const MCExpr *GVSymExpr = MCSymbolRefExpr::Create(GVSym, OutContext);
1432 TmpInst.addOperand(MCOperand::CreateExpr(GVSymExpr));
1433 // Add predicate operands.
1434 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1435 TmpInst.addOperand(MCOperand::CreateReg(0));
1436 OutStreamer.EmitInstruction(TmpInst);
1437 }
1438 return;
1439 }
14401415 case ARM::MOVi16_ga_pcrel:
14411416 case ARM::t2MOVi16_ga_pcrel: {
14421417 MCInst TmpInst;
15981598 if (Subtarget->isThumb()) {
15991599 if ((!isDirect || isARMFunc) && !Subtarget->hasV5TOps())
16001600 CallOpc = ARMISD::CALL_NOLINK;
1601 else if (doesNotRet && isDirect && !isARMFunc &&
1602 Subtarget->hasRAS() && !Subtarget->isThumb1Only() &&
1603 // Emit regular call when code size is the priority
1604 !HasMinSizeAttr)
1605 // "mov lr, pc; b _foo" to avoid confusing the RSP
1606 CallOpc = ARMISD::CALL_NOLINK;
16071601 else
16081602 CallOpc = isARMFunc ? ARMISD::CALL : ARMISD::tCALL;
16091603 } else {
1610 if (!isDirect && !Subtarget->hasV5TOps()) {
1604 if (!isDirect && !Subtarget->hasV5TOps())
16111605 CallOpc = ARMISD::CALL_NOLINK;
1612 } else if (doesNotRet && isDirect && Subtarget->hasRAS() &&
1606 else if (doesNotRet && isDirect && Subtarget->hasRAS() &&
16131607 // Emit regular call when code size is the priority
16141608 !HasMinSizeAttr)
16151609 // "mov lr, pc; b _foo" to avoid confusing the RSP
33293329 (t2B uncondbrtarget:$dst, pred:$p)>,
33303330 Requires<[IsThumb2, IsIOS]>;
33313331 }
3332
3333 let isCall = 1, Defs = [LR], Uses = [SP] in {
3334 // mov lr, pc; b if callee is marked noreturn to avoid confusing the
3335 // return stack predictor.
3336 def t2BMOVPCB_CALL : tPseudoInst<(outs),
3337 (ins t_bltarget:$func),
3338 6, IIC_Br, [(ARMcall_nolink tglobaladdr:$func)]>,
3339 Requires<[IsThumb]>;
3340 }
3341
3342 // Direct calls
3343 def : T2Pat<(ARMcall_nolink texternalsym:$func),
3344 (t2BMOVPCB_CALL texternalsym:$func)>,
3345 Requires<[IsThumb]>;
33463332
33473333 // IT block
33483334 let Defs = [ITSTATE] in
0 ; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=ARM
11 ; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=swift | FileCheck %s -check-prefix=SWIFT
2 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=T2
32 ; rdar://12348580
43
54 define void @t1() noreturn minsize nounwind ssp {
98
109 ; SWIFT: t1:
1110 ; SWIFT: bl _bar
12
13 ; T2: t1:
14 ; T2: blx _bar
1511 tail call void @bar() noreturn nounwind
1612 unreachable
1713 }
2319
2420 ; SWIFT: t2:
2521 ; SWIFT: bl _t1
26
27 ; T2: t2:
28 ; T2: bl _t1
2922 tail call void @t1() noreturn nounwind
3023 unreachable
3124 }
0 ; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=ARM
11 ; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=swift | FileCheck %s -check-prefix=SWIFT
2 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=T2
32 ; rdar://8979299
43
54 define void @t1() noreturn nounwind ssp {
1110 ; SWIFT: t1:
1211 ; SWIFT: mov lr, pc
1312 ; SWIFT: b _bar
14
15 ; T2: t1:
16 ; T2: blx _bar
1713 tail call void @bar() noreturn nounwind
1814 unreachable
1915 }
2723 ; SWIFT: t2:
2824 ; SWIFT: mov lr, pc
2925 ; SWIFT: b _t1
30
31 ; T2: t2:
32 ; T2: mov lr, pc
33 ; T2: b.w _t1
3426 tail call void @t1() noreturn nounwind
3527 unreachable
3628 }