llvm.org GIT mirror llvm / b32f7a5
- Use a more appropriate name for Owen's ARM Parser isMCR hack since the same operands can be present in cdp/cdp2 instructions. Also increase the hack with cdp/cdp2 instructions. - Fix the encoding of cdp/cdp2 instructions for ARM (no thumb and thumb2 yet) and add testcases for t hem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123927 91177308-0d34-0410-b5e6-96231b3b80d8 Bruno Cardoso Lopes 9 years ago
3 changed file(s) with 67 addition(s) and 28 deletion(s). Raw diff Collapse all Expand all
35543554 // Coprocessor Instructions. For disassembly only.
35553555 //
35563556
3557 def CDP : ABI<0b1110, (outs), (ins nohash_imm:$cop, i32imm:$opc1,
3558 nohash_imm:$CRd, nohash_imm:$CRn, nohash_imm:$CRm, i32imm:$opc2),
3559 NoItinerary, "cdp", "\tp$cop, $opc1, cr$CRd, cr$CRn, cr$CRm, $opc2",
3560 [/* For disassembly only; pattern left blank */]> {
3561 let Inst{4} = 0;
3562 }
3563
3564 def CDP2 : ABXI<0b1110, (outs), (ins nohash_imm:$cop, i32imm:$opc1,
3565 nohash_imm:$CRd, nohash_imm:$CRn, nohash_imm:$CRm, i32imm:$opc2),
3566 NoItinerary, "cdp2\tp$cop, $opc1, cr$CRd, cr$CRn, cr$CRm, $opc2",
3557 def CDP : ABI<0b1110, (outs), (ins p_imm:$cop, i32imm:$opc1,
3558 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, i32imm:$opc2),
3559 NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
3560 [/* For disassembly only; pattern left blank */]> {
3561 bits<4> opc1;
3562 bits<4> CRn;
3563 bits<4> CRd;
3564 bits<4> cop;
3565 bits<3> opc2;
3566 bits<4> CRm;
3567
3568 let Inst{3-0} = CRm;
3569 let Inst{4} = 0;
3570 let Inst{7-5} = opc2;
3571 let Inst{11-8} = cop;
3572 let Inst{15-12} = CRd;
3573 let Inst{19-16} = CRn;
3574 let Inst{23-20} = opc1;
3575 }
3576
3577 def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, i32imm:$opc1,
3578 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, i32imm:$opc2),
3579 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
35673580 [/* For disassembly only; pattern left blank */]> {
35683581 let Inst{31-28} = 0b1111;
3569 let Inst{4} = 0;
3582 bits<4> opc1;
3583 bits<4> CRn;
3584 bits<4> CRd;
3585 bits<4> cop;
3586 bits<3> opc2;
3587 bits<4> CRm;
3588
3589 let Inst{3-0} = CRm;
3590 let Inst{4} = 0;
3591 let Inst{7-5} = opc2;
3592 let Inst{11-8} = cop;
3593 let Inst{15-12} = CRd;
3594 let Inst{19-16} = CRn;
3595 let Inst{23-20} = opc1;
35703596 }
35713597
35723598 class ACI
5252 bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
5353
5454 int TryParseRegister();
55 bool TryParseMCRName(SmallVectorImpl&);
55 bool TryParseCoprocessorOperandName(SmallVectorImpl&);
5656 bool TryParseRegisterWithWriteBack(SmallVectorImpl &);
5757 bool ParseRegisterList(SmallVectorImpl &);
5858 bool ParseMemory(SmallVectorImpl &);
59 bool ParseOperand(SmallVectorImpl &, bool isMCR);
59 bool ParseOperand(SmallVectorImpl &, bool hasCoprocOp);
6060 bool ParsePrefix(ARMMCExpr::VariantKind &RefKind);
6161 const MCExpr *ApplyPrefixToExpr(const MCExpr *E,
6262 MCSymbolRefExpr::VariantKind Variant);
601601 return false;
602602 }
603603
604 static int MatchMCRName(StringRef Name) {
604 static int MatchCoprocessorOperandName(StringRef Name) {
605605 // Use the same layout as the tablegen'erated register name matcher. Ugly,
606606 // but efficient.
607607 switch (Name.size()) {
642642 return -1;
643643 }
644644
645 /// TryParseMCRName - Try to parse an MCR/MRC symbolic operand
646 /// name. The token must be an Identifier when called, and if it is a MCR
647 /// operand name, the token is eaten and the operand is added to the
648 /// operand list.
645 /// TryParseCoprocessorOperandName - Try to parse an coprocessor related
646 /// instruction with a symbolic operand name. The token must be an Identifier
647 /// when called, and if it is a coprocessor related operand name, the token is
648 /// eaten and the operand is added to the operand list. Example: operands like
649 /// "p1", "p7", "c3", "c5", ...
649650 bool ARMAsmParser::
650 TryParseMCRName(SmallVectorImpl &Operands) {
651 TryParseCoprocessorOperandName(SmallVectorImpl &Operands) {
651652 SMLoc S = Parser.getTok().getLoc();
652653 const AsmToken &Tok = Parser.getTok();
653654 assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier");
654655
655 int Num = MatchMCRName(Tok.getString());
656 int Num = MatchCoprocessorOperandName(Tok.getString());
656657 if (Num == -1)
657658 return true;
658659
965966 /// Parse a arm instruction operand. For now this parses the operand regardless
966967 /// of the mnemonic.
967968 bool ARMAsmParser::ParseOperand(SmallVectorImpl &Operands,
968 bool isMCR){
969 bool hasCoprocOp){
969970 SMLoc S, E;
970971 switch (getLexer().getKind()) {
971972 default:
974975 case AsmToken::Identifier:
975976 if (!TryParseRegisterWithWriteBack(Operands))
976977 return false;
977 if (isMCR && !TryParseMCRName(Operands))
978 if (hasCoprocOp && !TryParseCoprocessorOperandName(Operands))
978979 return false;
979980
980981 // Fall though for the Identifier case that is not a register or a
12631264 Operands.push_back(ARMOperand::CreateToken(Head, NameLoc));
12641265 }
12651266
1266 bool isMCR = (Head == "mcr" || Head == "mcr2" ||
1267 Head == "mcrr" || Head == "mcrr2" ||
1268 Head == "mrc" || Head == "mrc2" ||
1269 Head == "mrrc" || Head == "mrrc2");
1267 // Enable the parsing of instructions containing coprocessor related
1268 // asm syntax, such as coprocessor names "p7, p15, ..." and coprocessor
1269 // registers "c1, c3, ..."
1270 // FIXME: we probably want AsmOperandClass and ParserMatchClass declarations
1271 // in the .td file rather than hacking the ASMParser for every symbolic
1272 // operand type.
1273 bool hasCoprocOp = (Head == "mcr" || Head == "mcr2" ||
1274 Head == "mcrr" || Head == "mcrr2" ||
1275 Head == "mrc" || Head == "mrc2" ||
1276 Head == "mrrc" || Head == "mrrc2" ||
1277 Head == "cdp" || Head == "cdp2");
12701278
12711279 // Read the remaining operands.
12721280 if (getLexer().isNot(AsmToken::EndOfStatement)) {
12731281 // Read the first operand.
1274 if (ParseOperand(Operands, isMCR)) {
1282 if (ParseOperand(Operands, hasCoprocOp)) {
12751283 Parser.EatToEndOfStatement();
12761284 return true;
12771285 }
12801288 Parser.Lex(); // Eat the comma.
12811289
12821290 // Parse and remember the operand.
1283 if (ParseOperand(Operands, isMCR)) {
1291 if (ParseOperand(Operands, hasCoprocOp)) {
12841292 Parser.EatToEndOfStatement();
12851293 return true;
12861294 }
153153 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
154154 mrrc2 p7, #1, r5, r4, c1
155155
156 @ CHECK: cdp p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xee]
157 cdp p7, #1, c1, c1, c1, #4
158 @ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe]
159 cdp2 p7, #1, c1, c1, c1, #4
160